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/playground/Antichambre/midibox_tia/setup_tia_cartridge.asm
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; $Id: setup_tia_base.asm bdupeyron.tech@gmail.com(Antichambre)
LIST R=DEC
;
; Prepared Setup File for TIA Cartridge version
;
 
;; here you can change the default device ID - if you are using
;; some cores as slave, set:
;; o DEFAULT_DEVICE_ID 0x01 ; for the first slave
;; o DEFAULT_DEVICE_ID 0x02 ; for the second slave
;; o DEFAULT_DEVICE_ID 0x03 ; for the third slave
#define DEFAULT_DEVICE_ID 0x00
 
;; if this option is enabled (1), the DEFAULT_DEVICE_ID won't be used, but
;; it will be automatically derived from the MIOS Device ID instead
#define AUTO_DEVICE_ID 0
 
;; default MIDI channel:
#define DEFAULT_MIDI_CHANNEL 1
 
;; if != 0, special variations for cartridge version hardware:
#define DEFAULT_IS_CARTRIDGE 1
 
;; Kit and Wavetable fisrt:
;; position, banks start at this bankstick address(id):
;; Becarrefull! Change this value may reformat your BankStick
;; look at DEFAULT_BS_FPROTECT Value *!
#define DEFAULT_BS_KBANK_ID 4
;; Default BankStick format protection:
;; 0: No protection.
;; *1: Protects banks which are not good type or position.
;; Depend on DEFAULT_BS_KBANK_ID.
;; 2: Never format at startup.
#define DEFAULT_BS_FPROTECT 1
;; BankStick read only:
#define DEFAULT_BS_READONLY 0
 
;; Default EEPROM Protection:
;; Eeprom read only:
#define DEFAULT_EE_READONLY 0
;; internal patch Protection
 
;; Adjustable Gate fade out option:
;; to avoid click when envelope is off or envelope release is null.
;; Uses USER_Timer period N * 819 (us), default N=2 (1.638ms).
#define DEFAULT_TIA_GATE_FADEOUT 2
 
 
;; here you can change Serial DOG LCD connection pins
;; for Cartridge version
#if DEFAULT_IS_CARTRIDGE
;; Clock/data/DC
#define USER_LCD_TRIS_SCLK TRISA
#define USER_LCD_LAT_SCLK LATA ; Pin B.3
#define USER_LCD_PIN_SCLK 3
#define USER_LCD_TRIS_SDA TRISA
#define USER_LCD_LAT_SDA LATA ; Pin B.2
#define USER_LCD_PIN_SDA 2
#define USER_LCD_TRIS_DC TRISA
#define USER_LCD_LAT_DC LATA ; Pin B.1
#define USER_LCD_PIN_DC 1
 
;; Chip Select Line
#define USER_LCD_TRIS_CS TRISB
#define USER_LCD_LAT_CS LATB ; B.0 Only 1 LCD supported
#define USER_LCD_PIN_CS0 3
#endif
 
 
;; use PORTA and PORTE (J5 of the core module) as output
;; you can address these pins in cs_menu_io_tables.inc as "shift register" #0
#define ENABLE_J5 0
 
#define TIA_LEDMTR_ENABLE 1
;; define the shift registers (note: HERE the shift register begin with 0: 1st SR is 0, 2nd is 1, 3rd is 2, ...)
#define TIA_LEDMTR_REG 0 ; shift register for led metering (HERE: first shift register in the chain)
 
;; For MIDI activity monitor:
#define DEFAULT_MIDI_MONITOR_ENABLED 1 ; if 1, the Tx/Rx LEDs are enabled
;;define the DOUT pins for the Rx and Tx LED:
;; if 0: MIDI Rx/Tx LEDs are assigned to the DOUT chain, pin 0x00-0x7f
;; if 1: MIDI Rx/Tx LEDs are assigned to specials pins
#define MIDI_RXTX_USE_IO 1
#if MIDI_RXTX_USE_IO
#define DEFAULT_MIDI_RX_LAT LATD
#define DEFAULT_MIDI_RX_TRIS TRISD
#define DEFAULT_MIDI_RX_PIN 6 ; Pin D.6
#define DEFAULT_MIDI_TX_LAT LATD
#define DEFAULT_MIDI_TX_TRIS TRISD
#define DEFAULT_MIDI_TX_PIN 7 ; Pin D.7
#else
#define DEFAULT_MIDI_RX_LED 0x41 ; DOUT SR#9, pin D1
#define DEFAULT_MIDI_TX_LED 0x42 ; DOUT SR#9, pin D2
#endif
 
;; define the AOUT interface which is used here:
;; 1: one MBHP_AOUT module
;; 2: up to 4 (chained) MBHP_AOUT_LC modules
;; 3: one MBHP_AOUT_NG module
;; all other values invalid!
#define AOUT_INTERFACE_TYPE 0
 
;; only relevant if one or more AOUT_LC modules are used:
;; define the resolution configuration here
;; 0: first channel 12bit, second channel 4bit
;; 1: first channel 8bit, second channel 8bit
;; 2: combines M1,M2 and/or M3/M4: first channel 12bit, second channel 12bit, third channel 8bit, fourth channel ignored!
;; all other values invalid!
#define AOUT_LC_RESOLUTION_OPTION_M1 0
#define AOUT_LC_RESOLUTION_OPTION_M2 0
#define AOUT_LC_RESOLUTION_OPTION_M3 0
#define AOUT_LC_RESOLUTION_OPTION_M4 0
 
;; enable the 6th LFO waveform (analog inputs)
#define ENABLE_AIN_LFO_WAVEFORM 0
 
#include "src/main.inc"
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+*
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Index: Antichambre/midibox_tia/setup_tia_cartridge.lst
===================================================================
--- Antichambre/midibox_tia/setup_tia_cartridge.lst (revision 0)
+++ Antichambre/midibox_tia/setup_tia_cartridge.lst (revision 1218)
@@ -0,0 +1,19967 @@
+gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 1
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00001 ; $Id: setup_tia_base.asm bdupeyron.tech@gmail.com(Antichambre)
+ 00002 LIST R=DEC
+ 00003 ;
+ 00004 ; Prepared Setup File for TIA Cartridge version
+ 00005 ;
+ 00006
+ 00007 ;; here you can change the default device ID - if you are using
+ 00008 ;; some cores as slave, set:
+ 00009 ;; o DEFAULT_DEVICE_ID 0x01 ; for the first slave
+ 00010 ;; o DEFAULT_DEVICE_ID 0x02 ; for the second slave
+ 00011 ;; o DEFAULT_DEVICE_ID 0x03 ; for the third slave
+0000 00012 #define DEFAULT_DEVICE_ID 0x00
+ 00013
+ 00014 ;; if this option is enabled (1), the DEFAULT_DEVICE_ID won't be used, but
+ 00015 ;; it will be automatically derived from the MIOS Device ID instead
+0000 00016 #define AUTO_DEVICE_ID 0
+ 00017
+ 00018 ;; default MIDI channel:
+0000 00019 #define DEFAULT_MIDI_CHANNEL 1
+ 00020
+ 00021 ;; if != 0, special variations for cartridge version hardware:
+0000 00022 #define DEFAULT_IS_CARTRIDGE 1
+ 00023
+ 00024 ;; Kit and Wavetable fisrt:
+ 00025 ;; position, banks start at this bankstick address(id):
+ 00026 ;; Becarrefull! Change this value may reformat your BankStick
+ 00027 ;; look at DEFAULT_BS_FPROTECT Value *!
+0000 00028 #define DEFAULT_BS_KBANK_ID 4
+ 00029 ;; Default BankStick format protection:
+ 00030 ;; 0: No protection.
+ 00031 ;; *1: Protects banks which are not good type or position.
+ 00032 ;; Depend on DEFAULT_BS_KBANK_ID.
+ 00033 ;; 2: Never format at startup.
+0000 00034 #define DEFAULT_BS_FPROTECT 1
+ 00035 ;; BankStick read only:
+0000 00036 #define DEFAULT_BS_READONLY 0
+ 00037
+ 00038 ;; Default EEPROM Protection:
+ 00039 ;; Eeprom read only:
+0000 00040 #define DEFAULT_EE_READONLY 0
+ 00041 ;; internal patch Protection
+ 00042
+ 00043 ;; Adjustable Gate fade out option:
+ 00044 ;; to avoid click when envelope is off or envelope release is null.
+ 00045 ;; Uses USER_Timer period N * 819 (us), default N=2 (1.638ms).
+0000 00046 #define DEFAULT_TIA_GATE_FADEOUT 2
+ 00047
+ 00048
+ 00049 ;; here you can change Serial DOG LCD connection pins
+ 00050 ;; for Cartridge version
+ 00051 #if DEFAULT_IS_CARTRIDGE
+ 00052 ;; Clock/data/DC
+0000 00053 #define USER_LCD_TRIS_SCLK TRISA
+0000 00054 #define USER_LCD_LAT_SCLK LATA ; Pin B.3
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 2
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+0000 00055 #define USER_LCD_PIN_SCLK 3
+0000 00056 #define USER_LCD_TRIS_SDA TRISA
+0000 00057 #define USER_LCD_LAT_SDA LATA ; Pin B.2
+0000 00058 #define USER_LCD_PIN_SDA 2
+0000 00059 #define USER_LCD_TRIS_DC TRISA
+0000 00060 #define USER_LCD_LAT_DC LATA ; Pin B.1
+0000 00061 #define USER_LCD_PIN_DC 1
+ 00062
+ 00063 ;; Chip Select Line
+0000 00064 #define USER_LCD_TRIS_CS TRISB
+0000 00065 #define USER_LCD_LAT_CS LATB ; B.0 Only 1 LCD supported
+0000 00066 #define USER_LCD_PIN_CS0 3
+ 00067 #endif
+ 00068
+ 00069
+ 00070 ;; use PORTA and PORTE (J5 of the core module) as output
+ 00071 ;; you can address these pins in cs_menu_io_tables.inc as "shift register" #0
+0000 00072 #define ENABLE_J5 0
+ 00073
+0000 00074 #define TIA_LEDMTR_ENABLE 1
+ 00075 ;; define the shift registers (note: HERE the shift register begin with 0: 1st SR is 0, 2nd is 1, 3rd is 2, ...)
+0000 00076 #define TIA_LEDMTR_REG 0 ; shift register for led metering (HERE: first shift register in the chain)
+ 00077
+ 00078 ;; For MIDI activity monitor:
+0000 00079 #define DEFAULT_MIDI_MONITOR_ENABLED 1 ; if 1, the Tx/Rx LEDs are enabled
+ 00080 ;;define the DOUT pins for the Rx and Tx LED:
+ 00081 ;; if 0: MIDI Rx/Tx LEDs are assigned to the DOUT chain, pin 0x00-0x7f
+ 00082 ;; if 1: MIDI Rx/Tx LEDs are assigned to specials pins
+0000 00083 #define MIDI_RXTX_USE_IO 1
+ 00084 #if MIDI_RXTX_USE_IO
+0000 00085 #define DEFAULT_MIDI_RX_LAT LATD
+0000 00086 #define DEFAULT_MIDI_RX_TRIS TRISD
+0000 00087 #define DEFAULT_MIDI_RX_PIN 6 ; Pin D.6
+0000 00088 #define DEFAULT_MIDI_TX_LAT LATD
+0000 00089 #define DEFAULT_MIDI_TX_TRIS TRISD
+0000 00090 #define DEFAULT_MIDI_TX_PIN 7 ; Pin D.7
+ 00091 #else
+ 00092 #define DEFAULT_MIDI_RX_LED 0x41 ; DOUT SR#9, pin D1
+ 00093 #define DEFAULT_MIDI_TX_LED 0x42 ; DOUT SR#9, pin D2
+ 00094 #endif
+ 00095
+ 00096 ;; define the AOUT interface which is used here:
+ 00097 ;; 1: one MBHP_AOUT module
+ 00098 ;; 2: up to 4 (chained) MBHP_AOUT_LC modules
+ 00099 ;; 3: one MBHP_AOUT_NG module
+ 00100 ;; all other values invalid!
+0000 00101 #define AOUT_INTERFACE_TYPE 0
+ 00102
+ 00103 ;; only relevant if one or more AOUT_LC modules are used:
+ 00104 ;; define the resolution configuration here
+ 00105 ;; 0: first channel 12bit, second channel 4bit
+ 00106 ;; 1: first channel 8bit, second channel 8bit
+ 00107 ;; 2: combines M1,M2 and/or M3/M4: first channel 12bit, second channel 12bit, third channel 8bit, fourth channel ignored!
+ 00108 ;; all other values invalid!
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 3
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+0000 00109 #define AOUT_LC_RESOLUTION_OPTION_M1 0
+0000 00110 #define AOUT_LC_RESOLUTION_OPTION_M2 0
+0000 00111 #define AOUT_LC_RESOLUTION_OPTION_M3 0
+0000 00112 #define AOUT_LC_RESOLUTION_OPTION_M4 0
+ 00113
+ 00114 ;; enable the 6th LFO waveform (analog inputs)
+0000 00115 #define ENABLE_AIN_LFO_WAVEFORM 0
+ 00116
+ 00117 #include "src/main.inc"
+ 00001 ; $Id: main.inc bdupeyron.tech@gmail.com(Antichambre)
+ 00002 ;
+ 00003 ; MIOS Application
+ 00004 ; MIDIbox TIA
+ 00005 ;
+ 00006 ; -> see README.txt for details
+ 00007 ;
+ 00008 ; ==========================================================================
+ 00009 ;
+ 00010 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00011 ; Licensed for personal non-commercial use only.
+ 00012 ; All other rights reserved.
+ 00013 ;
+ 00014 ; ==========================================================================
+ 00015 ;
+ 00016 ; Version: <-------------------->
+0000 00017 #define MBTIA_VERSION_STR "MIDIboxTIA V1.beta "
+ 00018 ; (fixed string length - 20 characters!)
+ 00019 ;
+ 00020
+ 00021 ;; ---[ MIOS header file ]---
+ 00022 #include <mios.h>
+ 00001 ; $Id: mios.h 822 2009-09-17 18:39:53Z tk $
+ 00002 ;
+ 00003 ; MIOS Definitions file
+ 00004 ;
+ 00005 ; ==========================================================================
+ 00006 ;
+ 00007 ; Copyright 1998-2008 Thorsten Klose (tk@midibox.org)
+ 00008 ; Licensed for personal non-commercial use only.
+ 00009 ; All other rights reserved.
+ 00010 ;
+ 00011 ; ==========================================================================
+ 00012
+ 00013
+ 00014 ;; ==========================================================================
+ 00015 ;; Include basic defines which characterize the derivative to
+ 00016 ;; simplify dependencies within MIOS source code
+ 00017 ;; ==========================================================================
+ 00018 #include <hw_flags.h>
+ 00001
+ 00002 #ifndef _HW_FLAGS_H
+0000 00003 #define _HW_FLAGS_H
+ 00004
+ 00005 #ifdef __18F452
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 4
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00006 #define PIC_DERIVATIVE_CODE_SIZE 0x08000
+ 00007 #define PIC_DERIVATIVE_RAM_SIZE 0x600
+ 00008 #define PIC_DERIVATIVE_EEPROM_SIZE 0x100
+ 00009 #define PIC_DERIVATIVE_IRQ_WORKAROUND 0
+ 00010 #define PIC_DERIVATIVE_NEW_ADC 0
+ 00011 #define PIC_DERIVATIVE_CMCON_INIT 0
+ 00012 #define PIC_DERIVATIVE_T08BIT_INVERTED 0
+ 00013 #define PIC_DERIVATIVE_SET_LCD_4BIT 0
+ 00014 #endif
+ 00015
+ 00016 #ifdef __18F4620
+ 00017 #define PIC_DERIVATIVE_CODE_SIZE 0x10000
+ 00018 #define PIC_DERIVATIVE_RAM_SIZE 0xf80
+ 00019 #define PIC_DERIVATIVE_EEPROM_SIZE 0x400
+ 00020 #define PIC_DERIVATIVE_IRQ_WORKAROUND 1
+ 00021 #define PIC_DERIVATIVE_NEW_ADC 1
+ 00022 #define PIC_DERIVATIVE_CMCON_INIT 1
+ 00023 #define PIC_DERIVATIVE_T08BIT_INVERTED 1
+ 00024 #define PIC_DERIVATIVE_SET_LCD_4BIT 0
+ 00025 #endif
+ 00026
+ 00027 #ifdef __18F4520
+ 00028 #define PIC_DERIVATIVE_CODE_SIZE 0x08000
+ 00029 #define PIC_DERIVATIVE_RAM_SIZE 0x600
+ 00030 #define PIC_DERIVATIVE_EEPROM_SIZE 0x100
+ 00031 #define PIC_DERIVATIVE_IRQ_WORKAROUND 1
+ 00032 #define PIC_DERIVATIVE_NEW_ADC 1
+ 00033 #define PIC_DERIVATIVE_CMCON_INIT 1
+ 00034 #define PIC_DERIVATIVE_T08BIT_INVERTED 0
+ 00035 #define PIC_DERIVATIVE_SET_LCD_4BIT 0
+ 00036 #endif
+ 00037
+ 00038 #ifdef __18F4682
+ 00039 #define PIC_DERIVATIVE_CODE_SIZE 0x14000
+ 00040 #define PIC_DERIVATIVE_RAM_SIZE 0xd00
+ 00041 #define PIC_DERIVATIVE_EEPROM_SIZE 0x400
+ 00042 #define PIC_DERIVATIVE_IRQ_WORKAROUND 0
+ 00043 #define PIC_DERIVATIVE_NEW_ADC 1
+ 00044 #define PIC_DERIVATIVE_CMCON_INIT 1
+ 00045 #define PIC_DERIVATIVE_T08BIT_INVERTED 0
+ 00046 #define PIC_DERIVATIVE_SET_LCD_4BIT 1
+ 00047 #endif
+ 00048
+ 00049 #ifdef __18F4685
+0000 00050 #define PIC_DERIVATIVE_CODE_SIZE 0x18000
+0000 00051 #define PIC_DERIVATIVE_RAM_SIZE 0xd00
+0000 00052 #define PIC_DERIVATIVE_EEPROM_SIZE 0x400
+0000 00053 #define PIC_DERIVATIVE_IRQ_WORKAROUND 0
+0000 00054 #define PIC_DERIVATIVE_NEW_ADC 1
+0000 00055 #define PIC_DERIVATIVE_CMCON_INIT 1
+0000 00056 #define PIC_DERIVATIVE_T08BIT_INVERTED 0
+0000 00057 #define PIC_DERIVATIVE_SET_LCD_4BIT 1
+ 00058 #endif
+ 00059
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 5
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00060 #endif
+ 00019
+ 00020 ;; ==========================================================================
+ 00021 ;; Assembler directives & device specific include file
+ 00022 ;;
+ 00023 ;; Natively supported devices are listed here.
+ 00024 ;; ==========================================================================
+ 00025
+ 00026 #ifdef __18F452
+ 00027 LIST R=DEC
+ 00028 #include <p18f452.inc>
+ 00029 #endif
+ 00030
+ 00031 #ifdef __18F4620
+ 00032 LIST R=DEC
+ 00033 #include <p18f4620.inc>
+ 00034 #endif
+ 00035
+ 00036 #ifdef __18F4520
+ 00037 LIST R=DEC
+ 00038 #include <p18f4520.inc>
+ 00039 #endif
+ 00040
+ 00041 #ifdef __18F4682
+ 00042 LIST R=DEC
+ 00043 #include <p18f4682.inc>
+ 00044 #endif
+ 00045
+ 00046 #ifdef __18F4685
+ 00047 LIST R=DEC
+ 00048 #include <p18f4685.inc>
+ 00001 LIST
+ 00002
+ 00003 ;==========================================================================
+ 00004 ; MPASM PIC18F4685 processor include
+ 00005 ;
+ 00006 ; (c) Copyright 1999-2007 Microchip Technology, All rights reserved
+ 00007 ;==========================================================================
+ 00008
+ 04822 LIST
+ 00049 #endif
+ 00050
+ 00051
+ 00052 ;; ==========================================================================
+ 00053 ;; General constants
+ 00054 ;; ==========================================================================
+ 00055
+ 00056 ;; used by MIOS_MIDI_Interface*
+ 00000000 00057 MIOS_MIDI_INTERFACE_COMMON EQU 0x00
+ 00000001 00058 MIOS_MIDI_INTERFACE_TO_HOST EQU 0x01
+ 00059
+ 00060 ;; used by MIOS_MIDI_Merger*
+ 00000000 00061 MIOS_MIDI_MERGER_DISABLED EQU 0x00
+ 00000001 00062 MIOS_MIDI_MERGER_ENABLED EQU 0x01
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 6
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00000002 00063 MIOS_MIDI_MERGER_MBLINK_EP EQU 0x02
+ 00000003 00064 MIOS_MIDI_MERGER_MBLINK_FP EQU 0x03
+ 00065
+ 00066 ;; used by MIOS_ENC_PIN_TABLE
+ 00067 #ifdef MIOS_OLD_ENCODER_MODES
+ 00068 MIOS_ENC_MODE_NON_DETENTED EQU 0x00
+ 00069 MIOS_ENC_MODE_DETENTED EQU 0x80
+ 00070 MIOS_ENC_MODE_DETENTED1 EQU 0x80
+ 00071 MIOS_ENC_MODE_DETENTED2 EQU 0x81
+ 00072 MIOS_ENC_MODE_DETENTED3 EQU 0x82
+ 00073 #else
+ 00074 ;; new encoder modes: each bit of MIOS_ENC_MODE_xx tells, if an INC / DEC is
+ 00075 ;; being triggered on the corresponding edge.
+ 00076 ;; Bit 7 6 5 4
+ 00077 ;; DEC <- <- <- <-
+ 00078 ;; Pin A ___|-------|_______
+ 00079 ;; Pin B _______|-------|___
+ 00080 ;; INC -> -> -> ->
+ 00081 ;; Bit 0 1 2 3
+ 00082 ;; Ex.: Bit 76543210
+ 00083 ;; DETENTED2 = 0b00100010 = 0x22
+ 00084 ;; -> INC will be triggered on edge 1, DEC on edge 5
+ 000000FF 00085 MIOS_ENC_MODE_NON_DETENTED EQU 0xff
+ 000000AA 00086 MIOS_ENC_MODE_DETENTED EQU 0xaa
+ 000000AA 00087 MIOS_ENC_MODE_DETENTED1 EQU 0xaa
+ 00000022 00088 MIOS_ENC_MODE_DETENTED2 EQU 0x22
+ 00000088 00089 MIOS_ENC_MODE_DETENTED3 EQU 0x88
+ 000000A5 00090 MIOS_ENC_MODE_DETENTED4 EQU 0xa5
+ 0000005A 00091 MIOS_ENC_MODE_DETENTED5 EQU 0x5a
+ 00092 #endif
+ 00093
+ 00094 ;; used by MIOS_ENC_Speed*
+ 00000000 00095 MIOS_ENC_SPEED_SLOW EQU 0
+ 00000001 00096 MIOS_ENC_SPEED_NORMAL EQU 1
+ 00000002 00097 MIOS_ENC_SPEED_FAST EQU 2
+ 00098
+ 00099 ;; used by MIOS_LCD_Type*
+ 00000000 00100 MIOS_LCD_TYPE_CLCD EQU 0x00
+ 00000001 00101 MIOS_LCD_TYPE_GLCD0 EQU 0x01
+ 00000002 00102 MIOS_LCD_TYPE_GLCD1 EQU 0x02
+ 00000003 00103 MIOS_LCD_TYPE_GLCD2 EQU 0x03
+ 00000004 00104 MIOS_LCD_TYPE_GLCD3 EQU 0x04
+ 00000005 00105 MIOS_LCD_TYPE_GLCD4 EQU 0x05
+ 00000006 00106 MIOS_LCD_TYPE_MLCD EQU 0x06
+ 00000007 00107 MIOS_LCD_TYPE_GLCD_CUSTOM EQU 0x07
+ 00108
+ 00109 ;; location of default 5x8 font for graphical displays
+ 00007CFC 00110 MIOS_GLCD_FONT EQU 0x7cfc
+ 00111
+ 00112 ;; general config flags (never overwrite this flags directly!!!)
+ 00000000 00113 MIOS_BOX_CFG0_LCD_TYPE0 EQU 0 ; selects LCD type, bit 0
+ 00000001 00114 MIOS_BOX_CFG0_LCD_TYPE1 EQU 1 ; selects LCD type, bit 1
+ 00000002 00115 MIOS_BOX_CFG0_LCD_TYPE2 EQU 2 ; selects LCD type, bit 2
+ 00000003 00116 MIOS_BOX_CFG0_USE_GLCD EQU 3 ; if 1, graphical LCD is connected
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 7
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00000004 00117 MIOS_BOX_CFG0_MERGER EQU 4 ; if 1, MIDI merger is enabled
+ 00000005 00118 MIOS_BOX_CFG0_MBLINK EQU 5 ; if 1, MIDIbox Link is enabled
+ 00000006 00119 MIOS_BOX_CFG0_TO_HOST EQU 6 ; if 1, MIDI interface will run with 38400 baud instead of 31250
+ 00000007 00120 MIOS_BOX_CFG0_20MHz EQU 7 ; if 1, it is assumed that box is running with 20 MHz, else with 40 MHz
+ 00121
+ 00000000 00122 MIOS_BOX_CFG1_BS_A0 EQU 0 ; A0 of BankStick (never change the bit position)
+ 00000001 00123 MIOS_BOX_CFG1_BS_A1 EQU 1 ; A1 of BankStick (never change the bit position)
+ 00000002 00124 MIOS_BOX_CFG1_BS_A2 EQU 2 ; A2 of BankStick (never change the bit position)
+ 00000003 00125 MIOS_BOX_CFG1_BS_DIS_VERIFY EQU 3 ; if 1, writes to the BankStick will not be verified
+ 00000004 00126 MIOS_BOX_CFG1_IIC_STRETCH_CLK EQU 4 ; if 1, IIC clock stretching enabled
+ 00127
+ 00128 ;; general status flags (never overwrite this flags directly!!!)
+ 00000000 00129 MIOS_BOX_STAT_BS_AVAILABLE EQU 0 ; if 1, BankStick is available
+ 00000001 00130 MIOS_BOX_STAT_MBLINK_TUNNEL_PASS EQU 1 ; if 1, a MBLinked event will be tunnled
+ 00000002 00131 MIOS_BOX_STAT_SUSPEND_ALL EQU 2 ; if 1, all system and user tasks are suspended
+ 00000003 00132 MIOS_BOX_STAT_SUSPEND_USER EQU 3 ; if 1, all user tasks are suspended
+ 00000004 00133 MIOS_BOX_STAT_AUTOREPEAT EQU 4 ; if 1, start the auto-repeat handler
+ 00000005 00134 MIOS_BOX_STAT_MLCD_TRANSFER EQU 5 ; if 1, a transfer to the MLCD has been started
+ 00000006 00135 MIOS_BOX_STAT_FERR EQU 6 ; if 1, a frame error happened during MIDI receive
+ 00136
+ 00137 ;; ==========================================================================
+ 00138 ;; MIOS Special Function Registers
+ 00139 ;; ==========================================================================
+ 00140
+ 00000000 00141 MIOS_BOX_CFG0 EQU 0x000
+ 00000001 00142 MIOS_BOX_CFG1 EQU 0x001
+ 00000002 00143 MIOS_BOX_STAT EQU 0x002
+ 00000003 00144 MIOS_PARAMETER1 EQU 0x003
+ 00000004 00145 MIOS_PARAMETER2 EQU 0x004
+ 00000005 00146 MIOS_PARAMETER3 EQU 0x005
+ 00147
+ 00148 ;; ==========================================================================
+ 00149 ;; temporary registers for main programs
+ 00150 ;; ==========================================================================
+ 00000006 00151 TMP1 EQU 0x006
+ 00000007 00152 TMP2 EQU 0x007
+ 00000008 00153 TMP3 EQU 0x008
+ 00000009 00154 TMP4 EQU 0x009
+ 0000000A 00155 TMP5 EQU 0x00a
+ 00156
+ 00157 ;; ==========================================================================
+ 00158 ;; temporary registers for IRQs
+ 00159 ;; ==========================================================================
+ 0000000B 00160 IRQ_TMP1 EQU 0x00b
+ 0000000C 00161 IRQ_TMP2 EQU 0x00c
+ 0000000D 00162 IRQ_TMP3 EQU 0x00d
+ 0000000E 00163 IRQ_TMP4 EQU 0x00e
+ 0000000F 00164 IRQ_TMP5 EQU 0x00f
+ 00165
+ 00166 ;; ==========================================================================
+ 00167 ;; free memory space for user application:
+ 00168 ;; ==========================================================================
+ 00169 ;; 0x010-0x37f
+ 00170
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 8
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00171 ;; ==========================================================================
+ 00172 ;; MIOS System Registers -- not defined here --
+ 00173 ;; never use these memory locations!
+ 00174 ;; ==========================================================================
+ 00175 ;; 0x380-0x6ff
+ 00176
+ 00177 ;; ==========================================================================
+ 00178 ;; MIOS System Registers for custom LCD driver
+ 00179 ;; ==========================================================================
+ 00000570 00180 MIOS_GLCD_BUFFER EQU 0x570 ; note: the buffer must be located at ...0-...7
+ 00000578 00181 MIOS_LCD_OPTION1 EQU 0x578 ; contains the first LCD option given by MIOS_LCD_TypeSet
+ 00000579 00182 MIOS_LCD_OPTION2 EQU 0x579 ; contains the second LCD option given by MIOS_LCD_TypeSet
+ 0000057A 00183 MIOS_LCD_CURSOR_POS EQU 0x57a ; the current cursor pos of characters (GLCD: multiplied by width)
+ 0000057B 00184 MIOS_GLCD_GCURSOR_X EQU 0x57b ; for GLCDs: the current X position of graphical cursor
+ 0000057C 00185 MIOS_GLCD_GCURSOR_Y EQU 0x57c ; for GLCDs: the current Y position of graphical cursor
+ 0000057D 00186 MIOS_GLCD_FONT_WIDTH EQU 0x57d ; for GLCDs: the fontwidth given by MIOS_GLCD_FontInit
+ 0000057E 00187 MIOS_GLCD_FONT_HEIGHT EQU 0x57e ; for GLCDs: the fontheight given by MIOS_GLCD_FontInit
+ 0000057F 00188 MIOS_GLCD_FONT_X0 EQU 0x57f ; for GLCDs: the first byte within a char entry
+ 00000580 00189 MIOS_GLCD_FONT_OFFSET EQU 0x580 ; for GLCDs: the byte offset between the characters
+ 00000581 00190 MIOS_GLCD_FONT_PTRL EQU 0x581 ; for GLCDs: pointer to the character table, low-byte
+ 00000582 00191 MIOS_GLCD_FONT_PTRH EQU 0x582 ; for GLCDs: pointer to the character table, high-byte
+ 00000583 00192 MIOS_LCD_TIMEOUT0 EQU 0x583 ; can be used for timeout loops
+ 00000584 00193 MIOS_LCD_TIMEOUT1 EQU 0x584 ; can be used for timeout loops
+ 00000585 00194 MIOS_GLCD_TMP1 EQU 0x585 ; can be used as temporary buffer
+ 00000586 00195 MIOS_GLCD_TMP2 EQU 0x586 ; can be used as temporary buffer
+ 00000587 00196 MIOS_GLCD_TMP3 EQU 0x587 ; can be used as temporary buffer
+ 00000588 00197 MIOS_GLCD_TMP4 EQU 0x588 ; can be used as temporary buffer
+ 00000589 00198 MIOS_LCD_Y0_OFFSET EQU 0x589 ; Y0 offset of LCD
+ 0000058A 00199 MIOS_LCD_Y1_OFFSET EQU 0x58a ; Y1 offset of LCD
+ 0000058B 00200 MIOS_LCD_Y2_OFFSET EQU 0x58b ; Y2 offset of LCD
+ 0000058C 00201 MIOS_LCD_Y3_OFFSET EQU 0x58c ; Y3 offset of LCD
+ 0000058D 00202 MIOS_LCD_CURSOR_POS_REAL EQU 0x58d ; unmapped cursor position which has been set with MIOS_LCD_CursorSet
+ 0000058E 00203 MIOS_GLCD_FONT_PTRU EQU 0x58e ; for GLCDs: pointer to the character table, upper-byte (>64k flash derivatives only)
+ 00023
+ 00024 ;; ---[ useful macros ]---
+ 00025 #include <macros.h>
+ 00001 ; $Id: macros.h 49 2008-01-30 21:47:31Z tk $
+ 00002 ;
+ 00003 ; Macro Definitions
+ 00004 ;
+ 00005 ; ==========================================================================
+ 00006 ;
+ 00007 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00008 ; Licensed for personal non-commercial use only.
+ 00009 ; All other rights reserved.
+ 00010 ;
+ 00011 ; ==========================================================================
+ 00012
+ 00013 BRA_IFSET MACRO reg, bit, reg_a, label
+ 00014 btfsc reg, bit, reg_a
+ 00015 bra label
+ 00016 ENDM
+ 00017
+ 00018
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 9
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00019 BRA_IFCLR MACRO reg, bit, reg_a, label
+ 00020 btfss reg, bit, reg_a
+ 00021 bra label
+ 00022 ENDM
+ 00023
+ 00024 GOTO_IFSET MACRO reg, bit, reg_a, label
+ 00025 btfsc reg, bit, reg_a
+ 00026 goto label
+ 00027 ENDM
+ 00028
+ 00029
+ 00030 GOTO_IFCLR MACRO reg, bit, reg_a, label
+ 00031 btfss reg, bit, reg_a
+ 00032 goto label
+ 00033 ENDM
+ 00034
+ 00035 CALL_IFSET MACRO reg, bit, reg_a, label
+ 00036 btfsc reg, bit, reg_a
+ 00037 call label
+ 00038 ENDM
+ 00039
+ 00040
+ 00041 CALL_IFCLR MACRO reg, bit, reg_a, label
+ 00042 btfss reg, bit, reg_a
+ 00043 call label
+ 00044 ENDM
+ 00045
+ 00046 RCALL_IFSET MACRO reg, bit, reg_a, label
+ 00047 btfsc reg, bit, reg_a
+ 00048 rcall label
+ 00049 ENDM
+ 00050
+ 00051
+ 00052 RCALL_IFCLR MACRO reg, bit, reg_a, label
+ 00053 btfss reg, bit, reg_a
+ 00054 rcall label
+ 00055 ENDM
+ 00056
+ 00057 ;; ==========================================================================
+ 00058
+ 00059 IRQ_DISABLE MACRO
+ 00060 bcf INTCON, GIE
+ 00061 ENDM
+ 00062
+ 00063 IRQ_ENABLE MACRO
+ 00064 bsf INTCON, GIE
+ 00065 ENDM
+ 00066
+ 00067 ;; ==========================================================================
+ 00068
+ 00069 TABLE_ADDR_FULL MACRO addr
+ 00070 movlw LOW(addr) ; store Lo Byte
+ 00071 movwf TBLPTRL
+ 00072 movlw HIGH(addr) ; store Hi Byte
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 10
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00073 movwf TBLPTRH
+ 00074 movlw UPPER(addr) ; store upper Byte
+ 00075 movwf TBLPTRU
+ 00076 ENDM
+ 00077
+ 00078 TABLE_ADDR MACRO addr
+ 00079 movlw LOW(addr) ; store Lo Byte
+ 00080 movwf TBLPTRL
+ 00081 movlw HIGH(addr) ; store Hi Byte
+ 00082 movwf TBLPTRH
+ 00083 #if PIC_DERIVATIVE_CODE_SIZE > 0x10000
+ 00084 movlw UPPER(addr) ; store Upper Byte
+ 00085 movwf TBLPTRU
+ 00086 #endif
+ 00087 ENDM
+ 00088
+ 00089 TABLE_H MACRO addr
+ 00090 movlw HIGH(addr) ; store Hi Byte
+ 00091 movwf TBLPTRH
+ 00092 ENDM
+ 00093
+ 00094 TABLE_L MACRO addr
+ 00095 movlw LOW(addr) ; store Lo Byte
+ 00096 movwf TBLPTRL
+ 00097 ENDM
+ 00098
+ 00099 TABLE_ADD_W MACRO
+ 00100 addwf TBLPTRL, F
+ 00101 movlw 0x00
+ 00102 addwfc TBLPTRH, F
+ 00103 #if PIC_DERIVATIVE_CODE_SIZE > 0x10000
+ 00104 movlw 0x00
+ 00105 addwfc TBLPTRU, F
+ 00106 #endif
+ 00107 ENDM
+ 00108
+ 00109 TABLE_ADDR_MUL_W MACRO addr, multiplicator
+ 00110 mullw multiplicator
+ 00111 movlw LOW(addr)
+ 00112 addwf PRODL, W
+ 00113 movwf TBLPTRL
+ 00114 movlw HIGH(addr)
+ 00115 addwfc PRODH, W
+ 00116 movwf TBLPTRH
+ 00117 #if PIC_DERIVATIVE_CODE_SIZE > 0x10000
+ 00118 clrf TBLPTRU
+ 00119 movlw UPPER(addr)
+ 00120 addwfc TBLPTRU, F
+ 00121 #endif
+ 00122 ENDM
+ 00123
+ 00124 ;; ==========================================================================
+ 00125
+ 00126 JUMPTABLE_2BYTES MACRO max_value
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 11
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00127 addlw -(max_value) ; ensure that jump index is not greater than (max_value-1)
+ 00128 skpnc
+ 00129 movlw -(max_value)
+ 00130 addlw max_value
+ 00131 call MIOS_HLP_GetIndex_2bytes
+ 00132 ENDM
+ 00133
+ 00134 JUMPTABLE_2BYTES_UNSECURE MACRO
+ 00135 call MIOS_HLP_GetIndex_2bytes
+ 00136 ENDM
+ 00137
+ 00138 JUMPTABLE_4BYTES MACRO max_value
+ 00139 addlw -(max_value) ; ensure that jump index is not greater than (max_value-1)
+ 00140 skpnc
+ 00141 return
+ 00142 addlw (max_value)
+ 00143 call MIOS_HLP_GetIndex_4bytes
+ 00144 ENDM
+ 00145
+ 00146 JUMPTABLE_4BYTES_UNSECURE MACRO
+ 00147 call MIOS_HLP_GetIndex_4bytes
+ 00148 ENDM
+ 00149
+ 00150 ;; ==========================================================================
+ 00151
+ 00152 TWOBYTE_ENTRY MACRO low_byte, high_byte
+ 00153 dw (high_byte << 8) | (low_byte)
+ 00154 ENDM
+ 00155
+ 00156 ;; ==========================================================================
+ 00157
+0000 00158 #define skpnz btfsc STATUS, Z
+0000 00159 #define skpz btfss STATUS, Z
+0000 00160 #define skpndc btfsc STATUS, DC
+0000 00161 #define skpdc btfss STATUS, DC
+0000 00162 #define skpnc btfsc STATUS, C
+0000 00163 #define skpc btfss STATUS, C
+0000 00164 #define clrc bcf STATUS, C
+0000 00165 #define setc bsf STATUS, C
+0000 00166 #define clrz bcf STATUS, Z
+0000 00167 #define setz bsf STATUS, Z
+0000 00168 #define rrf rrcf
+0000 00169 #define rlf rlcf
+ 00170
+ 00171 rgoto MACRO label
+ 00172 bra label
+ 00173 ENDM
+ 00174
+ 00175 SET_BSR MACRO reg
+ 00176 movlb HIGH(reg)
+ 00177 ENDM
+ 00178
+ 00179 ;; ==========================================================================
+ 00180
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 12
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00181 FONT_ENTRY MACRO width, height, x0, char_offset
+ 00182 dw ((height) << 8) | (width), ((char_offset) << 8) | (x0)
+ 00183 ENDM
+ 00184
+ 00185 ;; ==========================================================================
+ 00186
+ 00187 STRING MACRO length, pos, str
+ 00188 da ((length) << 8) | (pos), str
+ 00189 ENDM
+ 00190
+ 00191 ;; ==========================================================================
+ 00026
+ 00027 ;; ---[ vectors to MIOS functions (never change!) ]---
+ 00028 #include <mios_vectors.inc>
+ 00001 ; $Id: mios_vectors.inc 49 2008-01-30 21:47:31Z tk $
+ 00002
+ 00002C00 00003 MIOS_MIDI_BeginStream EQU 0x2c00
+ 00002C04 00004 MIOS_MIDI_DeviceIDAutoSet EQU 0x2c04
+ 00002C08 00005 MIOS_MIDI_DeviceIDGet EQU 0x2c08
+ 00002C0C 00006 MIOS_MIDI_DeviceIDSet EQU 0x2c0c
+ 00002C10 00007 MIOS_MIDI_EndStream EQU 0x2c10
+ 00002C14 00008 MIOS_MIDI_Init EQU 0x2c14
+ 00002C18 00009 MIOS_MIDI_InterfaceAutoSet EQU 0x2c18
+ 00002C1C 00010 MIOS_MIDI_InterfaceGet EQU 0x2c1c
+ 00002C20 00011 MIOS_MIDI_InterfaceSet EQU 0x2c20
+ 00002C24 00012 MIOS_MIDI_MergerGet EQU 0x2c24
+ 00002C28 00013 MIOS_MIDI_MergerSet EQU 0x2c28
+ 00002C2C 00014 MIOS_MIDI_RxBufferFree EQU 0x2c2c
+ 00002C30 00015 MIOS_MIDI_RxBufferGet EQU 0x2c30
+ 00002C34 00016 MIOS_MIDI_RxBufferPut EQU 0x2c34
+ 00002C38 00017 MIOS_MIDI_RxBufferUsed EQU 0x2c38
+ 00002C3C 00018 MIOS_MIDI_TxBufferFlush EQU 0x2c3c
+ 00002C40 00019 MIOS_MIDI_TxBufferFree EQU 0x2c40
+ 00002C44 00020 MIOS_MIDI_TxBufferGet EQU 0x2c44
+ 00002C48 00021 MIOS_MIDI_TxBufferPut EQU 0x2c48
+ 00002C4C 00022 MIOS_MIDI_TxBufferUsed EQU 0x2c4c
+ 00002C50 00023 MIOS_MPROC_MergerDisable EQU 0x2c50
+ 00002C54 00024 MIOS_MPROC_MergerEnable EQU 0x2c54
+ 00002C58 00025 MIOS_MPROC_MergerGet EQU 0x2c58
+ 00002C5C 00026 MIOS_AIN_DeadbandGet EQU 0x2c5c
+ 00002C60 00027 MIOS_AIN_DeadbandSet EQU 0x2c60
+ 00002C64 00028 MIOS_AIN_Muxed EQU 0x2c64
+ 00002C68 00029 MIOS_AIN_NumberGet EQU 0x2c68
+ 00002C6C 00030 MIOS_AIN_NumberSet EQU 0x2c6c
+ 00002C70 00031 MIOS_AIN_Pin7bitGet EQU 0x2c70
+ 00002C74 00032 MIOS_AIN_PinGet EQU 0x2c74
+ 00002C78 00033 MIOS_AIN_PinLSBGet EQU 0x2c78
+ 00002C7C 00034 MIOS_AIN_PinMSBGet EQU 0x2c7c
+ 00002C80 00035 MIOS_AIN_UnMuxed EQU 0x2c80
+ 00002C84 00036 MIOS_MF_PWM_DutyCycleDownGet EQU 0x2c84
+ 00002C88 00037 MIOS_MF_PWM_DutyCycleDownSet EQU 0x2c88
+ 00002C8C 00038 MIOS_MF_PWM_DutyCycleUpGet EQU 0x2c8c
+ 00002C90 00039 MIOS_MF_PWM_DutyCycleUpSet EQU 0x2c90
+ 00002C94 00040 MIOS_MF_DeadbandGet EQU 0x2c94
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 13
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00002C98 00041 MIOS_MF_DeadbandSet EQU 0x2c98
+ 00002C9C 00042 MIOS_MF_Disable EQU 0x2c9c
+ 00002CA0 00043 MIOS_MF_Enable EQU 0x2ca0
+ 00002CA4 00044 MIOS_MF_FaderMove EQU 0x2ca4
+ 00002CA8 00045 MIOS_MF_SuspendDisable EQU 0x2ca8
+ 00002CAC 00046 MIOS_MF_SuspendEnable EQU 0x2cac
+ 00002CB0 00047 MIOS_MF_SuspendGet EQU 0x2cb0
+ 00002CB4 00048 MIOS_DIN_PinGet EQU 0x2cb4
+ 00002CB8 00049 MIOS_DIN_SRGet EQU 0x2cb8
+ 00002CBC 00050 MIOS_DOUT_PinGet EQU 0x2cbc
+ 00002CC0 00051 MIOS_DOUT_PinSet EQU 0x2cc0
+ 00002CC4 00052 MIOS_DOUT_PinSet0 EQU 0x2cc4
+ 00002CC8 00053 MIOS_DOUT_PinSet1 EQU 0x2cc8
+ 00002CCC 00054 MIOS_DOUT_SRGet EQU 0x2ccc
+ 00002CD0 00055 MIOS_DOUT_SRSet EQU 0x2cd0
+ 00002CD4 00056 MIOS_ENC_Abs7bitAdd EQU 0x2cd4
+ 00002CD8 00057 MIOS_ENC_Abs7bitGet EQU 0x2cd8
+ 00002CDC 00058 MIOS_ENC_Abs7bitSet EQU 0x2cdc
+ 00002CE0 00059 MIOS_ENC_NumberGet EQU 0x2ce0
+ 00002CE4 00060 MIOS_ENC_SpeedGet EQU 0x2ce4
+ 00002CE8 00061 MIOS_ENC_SpeedSet EQU 0x2ce8
+ 00002CEC 00062 MIOS_SRIO_NumberGet EQU 0x2cec
+ 00002CF0 00063 MIOS_SRIO_NumberSet EQU 0x2cf0
+ 00002CF4 00064 MIOS_SRIO_TS_SensitivityGet EQU 0x2cf4
+ 00002CF8 00065 MIOS_SRIO_TS_SensitivitySet EQU 0x2cf8
+ 00002CFC 00066 MIOS_SRIO_UpdateFrqGet EQU 0x2cfc
+ 00002D00 00067 MIOS_SRIO_UpdateFrqSet EQU 0x2d00
+ 00002D04 00068 MIOS_LCD_Clear EQU 0x2d04
+ 00002D08 00069 MIOS_LCD_Cmd EQU 0x2d08
+ 00002D0C 00070 MIOS_LCD_CursorGet EQU 0x2d0c
+ 00002D10 00071 MIOS_LCD_CursorSet EQU 0x2d10
+ 00002D14 00072 MIOS_LCD_Data EQU 0x2d14
+ 00002D18 00073 MIOS_LCD_Init EQU 0x2d18
+ 00002D1C 00074 MIOS_LCD_PrintBCD1 EQU 0x2d1c
+ 00002D20 00075 MIOS_LCD_PrintBCD2 EQU 0x2d20
+ 00002D24 00076 MIOS_LCD_PrintBCD3 EQU 0x2d24
+ 00002D28 00077 MIOS_LCD_PrintChar EQU 0x2d28
+ 00002D2C 00078 MIOS_LCD_PrintHex1 EQU 0x2d2c
+ 00002D30 00079 MIOS_LCD_PrintHex2 EQU 0x2d30
+ 00002D34 00080 MIOS_LCD_PrintMessage EQU 0x2d34
+ 00002D38 00081 MIOS_LCD_PrintPreconfString EQU 0x2d38
+ 00002D3C 00082 MIOS_LCD_PrintString EQU 0x2d3c
+ 00002D40 00083 MIOS_LCD_TypeAutoSet EQU 0x2d40
+ 00002D44 00084 MIOS_LCD_TypeGet EQU 0x2d44
+ 00002D48 00085 MIOS_LCD_TypeSet EQU 0x2d48
+ 00002D4C 00086 MIOS_LCD_YAddressGet EQU 0x2d4c
+ 00002D50 00087 MIOS_LCD_YAddressSet EQU 0x2d50
+ 00002D54 00088 MIOS_GLCD_FontInit EQU 0x2d54
+ 00002D58 00089 MIOS_GLCD_GCursorGet EQU 0x2d58
+ 00002D5C 00090 MIOS_GLCD_GCursorSet EQU 0x2d5c
+ 00002D60 00091 MIOS_EEPROM_Read EQU 0x2d60
+ 00002D64 00092 MIOS_EEPROM_Write EQU 0x2d64
+ 00002D68 00093 MIOS_FLASH_Read EQU 0x2d68
+ 00002D6C 00094 MIOS_FLASH_Write EQU 0x2d6c
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 14
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00002D70 00095 MIOS_BANKSTICK_Read EQU 0x2d70
+ 00002D74 00096 MIOS_BANKSTICK_Write EQU 0x2d74
+ 00002D78 00097 MIOS_TIMER_Init EQU 0x2d78
+ 00002D7C 00098 MIOS_TIMER_Start EQU 0x2d7c
+ 00002D80 00099 MIOS_TIMER_Stop EQU 0x2d80
+ 00002D84 00100 MIOS_HLP_AddressFromTable EQU 0x2d84
+ 00002D88 00101 MIOS_HLP_GetBitANDMask EQU 0x2d88
+ 00002D8C 00102 MIOS_HLP_GetBitORMask EQU 0x2d8c
+ 00002D90 00103 MIOS_HLP_GetIndex_2bytes EQU 0x2d90
+ 00002D94 00104 MIOS_HLP_GetIndex_4bytes EQU 0x2d94
+ 00002D98 00105 MIOS_HLP_IndirectJump EQU 0x2d98
+ 00002D9C 00106 MIOS_Delay EQU 0x2d9c
+ 00002DA0 00107 MIOS_GPCounterGet EQU 0x2da0
+ 00002DA4 00108 MIOS_Reset EQU 0x2da4
+ 00002DA8 00109 MIOS_SystemResume EQU 0x2da8
+ 00002DAC 00110 MIOS_SystemSuspend EQU 0x2dac
+ 00002DB0 00111 MIOS_UserResume EQU 0x2db0
+ 00002DB4 00112 MIOS_UserSuspend EQU 0x2db4
+ 00002DB8 00113 MIOS_HLP_16bitAddSaturate EQU 0x2db8
+ 00002DBC 00114 MIOS_DIN_PinAutoRepeatEnable EQU 0x2dbc
+ 00002DC0 00115 MIOS_DIN_PinAutoRepeatDisable EQU 0x2dc0
+ 00002DC4 00116 MIOS_DIN_PinAutoRepeatGet EQU 0x2dc4
+ 00002DC8 00117 MIOS_CLCD_SpecialCharInit EQU 0x2dc8
+ 00002DCC 00118 MIOS_CLCD_SpecialCharsInit EQU 0x2dcc
+ 00002DD0 00119 MIOS_AIN_DynamicPrioSet EQU 0x2dd0
+ 00002DD4 00120 MIOS_AIN_DynamicPrioGet EQU 0x2dd4
+ 00002DD8 00121 MIOS_AIN_LastPinsGet EQU 0x2dd8
+ 00002DDC 00122 MIOS_BANKSTICK_CtrlSet EQU 0x2ddc
+ 00002DE0 00123 MIOS_BANKSTICK_CtrlGet EQU 0x2de0
+ 00002DE4 00124 MIOS_BANKSTICK_WritePage EQU 0x2de4
+ 00002DE8 00125 MIOS_HLP_Dec2BCD EQU 0x2de8
+ 00002DEC 00126 MIOS_LCD_PrintBCD4 EQU 0x2dec
+ 00002DF0 00127 MIOS_LCD_PrintBCD5 EQU 0x2df0
+ 00002DF4 00128 MIOS_LCD_MessageStart EQU 0x2df4
+ 00002DF8 00129 MIOS_LCD_MessageStop EQU 0x2df8
+ 00002DFC 00130 MIOS_MF_PWM_PeriodGet EQU 0x2dfc
+ 00002E00 00131 MIOS_MF_PWM_PeriodSet EQU 0x2e00
+ 00002E04 00132 MIOS_IIC_Start EQU 0x2e04
+ 00002E08 00133 MIOS_IIC_Stop EQU 0x2e08
+ 00002E0C 00134 MIOS_IIC_ByteSend EQU 0x2e0c
+ 00002E10 00135 MIOS_IIC_ByteReceive EQU 0x2e10
+ 00002E14 00136 MIOS_IIC_AckSend EQU 0x2e14
+ 00002E18 00137 MIOS_IIC_NakSend EQU 0x2e18
+ 00002E1C 00138 MIOS_IIC_CtrlSet EQU 0x2e1c
+ 00002E20 00139 MIOS_IIC_CtrlGet EQU 0x2e20
+ 00002E24 00140 MIOS_SRIO_DebounceSet EQU 0x2e24
+ 00002E28 00141 MIOS_SRIO_DebounceGet EQU 0x2e28
+ 00002E2C 00142 MIOS_MF_TouchDetectionReset EQU 0x2e2c
+ 00002E30 00143 MIOS_BANKSTICK_ReadPage EQU 0x2e30
+ 00002E34 00144 MIOS_EEPROM_ReadPage EQU 0x2e34
+ 00002E38 00145 MIOS_EEPROM_WritePage EQU 0x2e38
+ 00002E3C 00146 MIOS_TIMER_ReInit EQU 0x2e3c
+ 00002E40 00147 MIOS_RESERVED_144 EQU 0x2e40
+ 00002E44 00148 MIOS_RESERVED_145 EQU 0x2e44
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 15
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00002E48 00149 MIOS_RESERVED_146 EQU 0x2e48
+ 00002E4C 00150 MIOS_RESERVED_147 EQU 0x2e4c
+ 00002E50 00151 MIOS_RESERVED_148 EQU 0x2e50
+ 00002E54 00152 MIOS_RESERVED_149 EQU 0x2e54
+ 00002E58 00153 MIOS_RESERVED_150 EQU 0x2e58
+ 00002E5C 00154 MIOS_RESERVED_151 EQU 0x2e5c
+ 00002E60 00155 MIOS_RESERVED_152 EQU 0x2e60
+ 00002E64 00156 MIOS_RESERVED_153 EQU 0x2e64
+ 00002E68 00157 MIOS_RESERVED_154 EQU 0x2e68
+ 00002E6C 00158 MIOS_RESERVED_155 EQU 0x2e6c
+ 00002E70 00159 MIOS_RESERVED_156 EQU 0x2e70
+ 00002E74 00160 MIOS_RESERVED_157 EQU 0x2e74
+ 00002E78 00161 MIOS_RESERVED_158 EQU 0x2e78
+ 00002E7C 00162 MIOS_RESERVED_159 EQU 0x2e7c
+ 00002E80 00163 MIOS_RESERVED_160 EQU 0x2e80
+ 00002E84 00164 MIOS_RESERVED_161 EQU 0x2e84
+ 00002E88 00165 MIOS_RESERVED_162 EQU 0x2e88
+ 00002E8C 00166 MIOS_RESERVED_163 EQU 0x2e8c
+ 00002E90 00167 MIOS_RESERVED_164 EQU 0x2e90
+ 00002E94 00168 MIOS_RESERVED_165 EQU 0x2e94
+ 00002E98 00169 MIOS_RESERVED_166 EQU 0x2e98
+ 00002E9C 00170 MIOS_RESERVED_167 EQU 0x2e9c
+ 00002EA0 00171 MIOS_RESERVED_168 EQU 0x2ea0
+ 00002EA4 00172 MIOS_RESERVED_169 EQU 0x2ea4
+ 00002EA8 00173 MIOS_RESERVED_170 EQU 0x2ea8
+ 00002EAC 00174 MIOS_RESERVED_171 EQU 0x2eac
+ 00002EB0 00175 MIOS_RESERVED_172 EQU 0x2eb0
+ 00002EB4 00176 MIOS_RESERVED_173 EQU 0x2eb4
+ 00002EB8 00177 MIOS_RESERVED_174 EQU 0x2eb8
+ 00002EBC 00178 MIOS_RESERVED_175 EQU 0x2ebc
+ 00002EC0 00179 MIOS_RESERVED_176 EQU 0x2ec0
+ 00002EC4 00180 MIOS_RESERVED_177 EQU 0x2ec4
+ 00002EC8 00181 MIOS_RESERVED_178 EQU 0x2ec8
+ 00002ECC 00182 MIOS_RESERVED_179 EQU 0x2ecc
+ 00002ED0 00183 MIOS_RESERVED_180 EQU 0x2ed0
+ 00002ED4 00184 MIOS_RESERVED_181 EQU 0x2ed4
+ 00002ED8 00185 MIOS_RESERVED_182 EQU 0x2ed8
+ 00002EDC 00186 MIOS_RESERVED_183 EQU 0x2edc
+ 00002EE0 00187 MIOS_RESERVED_184 EQU 0x2ee0
+ 00002EE4 00188 MIOS_RESERVED_185 EQU 0x2ee4
+ 00002EE8 00189 MIOS_RESERVED_186 EQU 0x2ee8
+ 00002EEC 00190 MIOS_RESERVED_187 EQU 0x2eec
+ 00002EF0 00191 MIOS_RESERVED_188 EQU 0x2ef0
+ 00002EF4 00192 MIOS_RESERVED_189 EQU 0x2ef4
+ 00002EF8 00193 MIOS_RESERVED_190 EQU 0x2ef8
+ 00002EFC 00194 MIOS_RESERVED_191 EQU 0x2efc
+ 00002F00 00195 MIOS_RESERVED_192 EQU 0x2f00
+ 00002F04 00196 MIOS_RESERVED_193 EQU 0x2f04
+ 00002F08 00197 MIOS_RESERVED_194 EQU 0x2f08
+ 00002F0C 00198 MIOS_RESERVED_195 EQU 0x2f0c
+ 00002F10 00199 MIOS_RESERVED_196 EQU 0x2f10
+ 00002F14 00200 MIOS_RESERVED_197 EQU 0x2f14
+ 00002F18 00201 MIOS_RESERVED_198 EQU 0x2f18
+ 00002F1C 00202 MIOS_RESERVED_199 EQU 0x2f1c
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 16
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00002F20 00203 MIOS_RESERVED_200 EQU 0x2f20
+ 00002F24 00204 MIOS_RESERVED_201 EQU 0x2f24
+ 00002F28 00205 MIOS_RESERVED_202 EQU 0x2f28
+ 00002F2C 00206 MIOS_RESERVED_203 EQU 0x2f2c
+ 00002F30 00207 MIOS_RESERVED_204 EQU 0x2f30
+ 00002F34 00208 MIOS_RESERVED_205 EQU 0x2f34
+ 00002F38 00209 MIOS_RESERVED_206 EQU 0x2f38
+ 00002F3C 00210 MIOS_RESERVED_207 EQU 0x2f3c
+ 00002F40 00211 MIOS_RESERVED_208 EQU 0x2f40
+ 00002F44 00212 MIOS_RESERVED_209 EQU 0x2f44
+ 00002F48 00213 MIOS_RESERVED_210 EQU 0x2f48
+ 00002F4C 00214 MIOS_RESERVED_211 EQU 0x2f4c
+ 00002F50 00215 MIOS_RESERVED_212 EQU 0x2f50
+ 00002F54 00216 MIOS_RESERVED_213 EQU 0x2f54
+ 00002F58 00217 MIOS_RESERVED_214 EQU 0x2f58
+ 00002F5C 00218 MIOS_RESERVED_215 EQU 0x2f5c
+ 00002F60 00219 MIOS_RESERVED_216 EQU 0x2f60
+ 00002F64 00220 MIOS_RESERVED_217 EQU 0x2f64
+ 00002F68 00221 MIOS_RESERVED_218 EQU 0x2f68
+ 00002F6C 00222 MIOS_RESERVED_219 EQU 0x2f6c
+ 00002F70 00223 MIOS_RESERVED_220 EQU 0x2f70
+ 00002F74 00224 MIOS_RESERVED_221 EQU 0x2f74
+ 00002F78 00225 MIOS_RESERVED_222 EQU 0x2f78
+ 00002F7C 00226 MIOS_RESERVED_223 EQU 0x2f7c
+ 00002F80 00227 MIOS_RESERVED_224 EQU 0x2f80
+ 00002F84 00228 MIOS_RESERVED_225 EQU 0x2f84
+ 00002F88 00229 MIOS_RESERVED_226 EQU 0x2f88
+ 00002F8C 00230 MIOS_RESERVED_227 EQU 0x2f8c
+ 00002F90 00231 MIOS_RESERVED_228 EQU 0x2f90
+ 00002F94 00232 MIOS_RESERVED_229 EQU 0x2f94
+ 00002F98 00233 MIOS_RESERVED_230 EQU 0x2f98
+ 00002F9C 00234 MIOS_RESERVED_231 EQU 0x2f9c
+ 00002FA0 00235 MIOS_RESERVED_232 EQU 0x2fa0
+ 00002FA4 00236 MIOS_RESERVED_233 EQU 0x2fa4
+ 00002FA8 00237 MIOS_RESERVED_234 EQU 0x2fa8
+ 00002FAC 00238 MIOS_RESERVED_235 EQU 0x2fac
+ 00002FB0 00239 MIOS_RESERVED_236 EQU 0x2fb0
+ 00002FB4 00240 MIOS_RESERVED_237 EQU 0x2fb4
+ 00002FB8 00241 MIOS_RESERVED_238 EQU 0x2fb8
+ 00002FBC 00242 MIOS_RESERVED_239 EQU 0x2fbc
+ 00002FC0 00243 MIOS_RESERVED_240 EQU 0x2fc0
+ 00002FC4 00244 MIOS_RESERVED_241 EQU 0x2fc4
+ 00002FC8 00245 MIOS_RESERVED_242 EQU 0x2fc8
+ 00002FCC 00246 MIOS_RESERVED_243 EQU 0x2fcc
+ 00002FD0 00247 MIOS_RESERVED_244 EQU 0x2fd0
+ 00002FD4 00248 MIOS_RESERVED_245 EQU 0x2fd4
+ 00002FD8 00249 MIOS_RESERVED_246 EQU 0x2fd8
+ 00002FDC 00250 MIOS_RESERVED_247 EQU 0x2fdc
+ 00002FE0 00251 MIOS_RESERVED_248 EQU 0x2fe0
+ 00002FE4 00252 MIOS_RESERVED_249 EQU 0x2fe4
+ 00002FE8 00253 MIOS_RESERVED_250 EQU 0x2fe8
+ 00002FEC 00254 MIOS_RESERVED_251 EQU 0x2fec
+ 00002FF0 00255 MIOS_RESERVED_252 EQU 0x2ff0
+ 00002FF4 00256 MIOS_RESERVED_253 EQU 0x2ff4
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 17
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00002FF8 00257 MIOS_RESERVED_254 EQU 0x2ff8
+ 00002FFC 00258 MIOS_RESERVED_255 EQU 0x2ffc
+ 00029
+ 00030 ;; ---[ user hooks (never change!) ]---
+ 00031 #include <user_vectors.inc>
+ 00001 ; $Id: user_vectors.inc 49 2008-01-30 21:47:31Z tk $
+ 00002 ;
+ 00003 ; User vectortable - contains user hooks to MIOS
+ 00004 ;
+ 00005 ; ==========================================================================
+ 00006 ;
+ 00007 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00008 ; Licensed for personal non-commercial use only.
+ 00009 ; All other rights reserved.
+ 00010 ;
+ 00011 ; ==========================================================================
+ 00012
+ 00013 ;; never change the origin or the order of entries!
+3000 00014 org 0x3000
+3000 00015 _User_Init
+3000 EF69 F01A 00016 goto USER_Init
+3004 00017 _USER_Tick
+3004 EF94 F01A 00018 goto USER_Tick
+3008 00019 _USER_Timer
+3008 EF9B F01A 00020 goto USER_Timer
+300C 00021 _USER_MPROC_DebugTrigger
+300C EF9E F01A 00022 goto USER_MPROC_DebugTrigger
+3010 00023 _USER_DISPLAY_Init
+3010 EFB3 F01A 00024 goto USER_DISPLAY_Init
+3014 00025 _USER_DISPLAY_Tick
+3014 EFC6 F01A 00026 goto USER_DISPLAY_Tick
+3018 00027 _USER_SR_Service_Prepare
+3018 EFEA F01A 00028 goto USER_SR_Service_Prepare
+301C 00029 _USER_SR_Service_Finish
+301C EFEB F01A 00030 goto USER_SR_Service_Finish
+3020 00031 _USER_DIN_NotifyToggle
+3020 EFE8 F01A 00032 goto USER_DIN_NotifyToggle
+3024 00033 _USER_ENC_NotifyChange
+3024 EFE9 F01A 00034 goto USER_ENC_NotifyChange
+3028 00035 _USER_AIN_NotifyChange
+3028 EFEC F01A 00036 goto USER_AIN_NotifyChange
+302C 00037 _USER_MPROC_NotifyReceivedByte
+302C EFD2 F01A 00038 goto USER_MPROC_NotifyReceivedByte
+3030 00039 _USER_MPROC_NotifyTimeout
+3030 EFCF F01A 00040 goto USER_MPROC_NotifyTimeout
+3034 00041 _USER_MPROC_NotifyReceivedEvent
+3034 EFCB F01A 00042 goto USER_MPROC_NotifyReceivedEvent
+3038 00043 _USER_MPROC_NotifyFoundEvent
+3038 EFCE F01A 00044 goto USER_MPROC_NotifyFoundEvent
+303C 00045 _USER_LCD_Init
+303C EF80 F019 00046 goto USER_LCD_Init
+3040 00047 _USER_LCD_Clear
+3040 EFF5 F019 00048 goto USER_LCD_Clear
+3044 00049 _USER_LCD_CursorSet
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 18
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3044 EF0C F01A 00050 goto USER_LCD_CursorSet
+3048 00051 _USER_LCD_PrintChar
+3048 EF35 F01A 00052 goto USER_LCD_PrintChar
+304C 00053 _USER_MIDI_NotifyRx
+304C EFD8 F01A 00054 goto USER_MIDI_NotifyRx
+3050 00055 _USER_MIDI_NotifyTx
+3050 EFD5 F01A 00056 goto USER_MIDI_NotifyTx
+3054 00057 _USER_LCD_Data
+3054 EF9E F019 00058 goto USER_LCD_Data
+3058 00059 _USER_LCD_Cmd
+3058 EFC0 F019 00060 goto USER_LCD_Cmd
+305C 00061 _USER_LCD_SpecialCharInit
+305C EF68 F01A 00062 goto USER_LCD_SpecialCharInit
+3060 00063 USER_RESERVED_25
+3060 0012 00064 return
+3062 0000 00065 nop
+3064 00066 USER_RESERVED_26
+3064 0012 00067 return
+3066 0000 00068 nop
+3068 00069 USER_RESERVED_27
+3068 0012 00070 return
+306A 0000 00071 nop
+306C 00072 USER_RESERVED_28
+306C 0012 00073 return
+306E 0000 00074 nop
+3070 00075 USER_RESERVED_29
+3070 0012 00076 return
+3072 0000 00077 nop
+3074 00078 USER_RESERVED_30
+3074 0012 00079 return
+3076 0000 00080 nop
+3078 00081 USER_RESERVED_31
+3078 0012 00082 return
+307A 0000 00083 nop
+307C 00084 USER_RESERVED_32
+307C 0012 00085 return
+307E 0000 00086 nop
+ 00032
+ 00033
+ 00034
+ 00035 ;; ---[ variables used by application ]---
+ 00036 #include "app_defines.h"
+ 00001 ; $Id: app_defines.h bdupeyron.tech@gmail.com(Antichambre)
+ 00002 ;
+ 00003 ; Specific Defines and variables of MIOS Application
+ 00004 ;
+ 00005 ; ==========================================================================
+ 00006 ;
+ 00007 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00008 ; Licensed for personal non-commercial use only.
+ 00009 ; All other rights reserved.
+ 00010 ;
+ 00011 ; ==========================================================================
+ 00012
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 19
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3080 00013 #define TIA_STAT_ENGINE_DISABLE 0 ; if set, TIA tick and TIA interrupt will not be processed
+3080 00014 #define TIA_STAT_FORCE_REFRESH 1 ; if set, a refresh will be forced with next TIA_Tick
+3080 00015 #define TIA_STAT_CC_DUMP_REQ 2 ; if set, a CC dump will be sent
+3080 00016 #define TIA_STAT_SAVED_GIE 3 ; save the GIE bit for nested interrupt disables
+3080 00017 #define TIA_STAT_TRIGGER_RESET 4 ; if set, the TIA will be reset with next TIA_Tick
+ 00018
+ 00019 ;; ==========================================================================
+ 00020
+3080 00021 #define TIA_PLAY_MODE_POLY 0
+3080 00022 #define TIA_PLAY_MODE_SUS_KEY 1
+3080 00023 #define TIA_PLAY_MODE_LEGATO_OFF 2
+3080 00024 #define TIA_PLAY_MODE_ONLY_WT_OFF 3
+ 00025
+ 00026 ;; ==========================================================================
+3080 00027 #define TIA_MIDI_SYNC_SEND_CLK 0 ; send MIDI clock
+3080 00028 #define TIA_MIDI_SYNC_F8 4 ; bit 4 notifies a received MIDI clock
+3080 00029 #define TIA_MIDI_SYNC_FA 5 ; bit 5 notifies a received MIDI clock start
+3080 00030 #define TIA_MIDI_SYNC_TICK_1 6 ; bit 6 notifies that the TIA_SW engine should be clocked with common resolution
+3080 00031 #define TIA_MIDI_SYNC_TICK_2 7 ; bit 7 notifies that the TIA_SW engine should be clocked with double resolution
+ 00032
+ 00033 ;; ==========================================================================
+ 00034
+3080 00035 #define TIA_MOD_SYNC_LFO1 0 ; sync LFO1
+3080 00036 #define TIA_MOD_SYNC_LFO2 1 ; sync LFO2
+3080 00037 #define TIA_MOD_SYNC_LFO3 2 ; sync LFO3
+3080 00038 #define TIA_MOD_SYNC_LFO4 3 ; sync LFO4
+3080 00039 #define TIA_MOD_SYNC_ENV1 4 ; sync ENV1
+3080 00040 #define TIA_MOD_SYNC_ENV2 5 ; sync ENV2
+ 00041
+ 00042 ;; ==========================================================================
+ 00043
+3080 00044 #define BANKSTICK_MAGIC0 0x77; magic numbers - if they don't exists in bankstick at BANK_MAGIC_ADDRESS,
+3080 00045 #define BANKSTICK_MAGICP 0x12 ; the stick will be ignored until it has been formatted
+3080 00046 #define BANKSTICK_MAGICK BANKSTICK_MAGICP+1 ; the stick will be ignored until it has been formatted
+ 00047
+ 00048 ;; ==========================================================================
+ 00049 ;; free memory for user applications:
+ 00050 ;; 0x010-0x37f
+ 00051
+ 00052 ;; ==========================================================================
+ 00053 ;; General TIA Control Variables in ACCESS page
+ 00054 ;; ==========================================================================
+ 00000010 00055 TIA_STAT EQU 0x010
+ 00056
+ 00000011 00057 TIA_BANK EQU 0x011
+ 00000012 00058 TIA_PRESET EQU 0x012
+ 00000013 00059 TIA_PATCH EQU 0x013
+ 00000014 00060 TIA_PBANK EQU 0x014
+ 00000015 00061 TIA_KIT EQU 0x015 ;;a degager
+ 00000016 00062 TIA_KBANK EQU 0x016 ;;a degager
+ 00000017 00063 TIA_WT EQU 0x017 ;;a degager
+ 00000018 00064 TIA_WBANK EQU 0x018 ;;a degager
+ 00000019 00065 TIA_BANKSTICK_CHK_CTR EQU 0x019
+ 0000001A 00066 TIA_BANKSTICK_ID EQU 0x01a
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 20
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 0000001B 00067 TIA_BANKSTICK_RDY EQU 0x01b
+ 0000001C 00068 TIA_BANKSTICK_STAT EQU 0x01c
+ 0000001D 00069 TIA_BANKSTICK_SIZE EQU 0x01d
+ 00070
+ 00000020 00071 TIA_MIDI_DEVICE EQU 0x020
+ 00072
+ 00073 ;; ==========================================================================
+ 00074 ;; Variables used by the MIDI processor in tia_sysex.inc
+ 00075 ;; ==========================================================================
+ 00000021 00076 TIA_SYSEX_STATE EQU 0x021
+ 00000022 00077 TIA_SYSEX_ACTION EQU 0x022
+ 00000023 00078 TIA_SYSEX_IN EQU 0x023
+ 00000024 00079 TIA_SYSEX_CHECKSUM EQU 0x024
+ 00000025 00080 TIA_SYSEX_ADDRESS EQU 0x025
+ 00000026 00081 TIA_SYSEX_ERROR EQU 0x026
+ 00082
+ 00083 ;; ==========================================================================
+ 00000027 00084 TIA_WT_VOICE EQU 0x027
+ 00085 ;; free: 0x28-0x66
+ 00086
+ 00087 ;; ==========================================================================
+ 00088
+ 00000067 00089 MIDI_RXTX_RX_CTR EQU 0x067
+ 00000068 00090 MIDI_RXTX_TX_CTR EQU 0x068
+ 00000069 00091 MIDI_RXTX_BEAT_CTR EQU 0x069
+ 00092
+ 00093 ;; ==========================================================================
+ 00094
+ 0000006A 00095 TIA_LEDMTR_STAT EQU 0x06a
+ 0000006B 00096 TIA_LEDMTR_VALUE EQU 0x06b
+ 00097
+ 00098 ;; ==========================================================================
+ 00099
+ 0000006C 00100 AOUT_FILTER_TMP_L EQU 0x06c ; used in tia_sw.inc as temporary storage for [filter value
+ 0000006D 00101 AOUT_FILTER_TMP_H EQU 0x06d
+ 00102
+ 00103 ;; ==========================================================================
+ 00104
+ 0000006E 00105 AOUT_INVERTED EQU 0x06e
+ 0000006F 00106 AOUT_UPDATE_REQ EQU 0x06f
+ 00000070 00107 AOUT_VALUES EQU 0x070 ; ..0x07f (8 * 16bit words)
+ 00108
+ 00109 ;; ==========================================================================
+ 00110 ;; note: 0x080-0x0ff used by CS_TIAS1
+ 00111 ;; ==========================================================================
+ 00112 ;; a lot of TIA control variables in BANKED page
+ 00113 ;; ==========================================================================
+ 00000100 00114 TIA_SW_CLEAR_BEGIN EQU 0x100 ; used to initialize the whole TIA_SW memory
+ 000001FF 00115 TIA_SW_CLEAR_END EQU 0x1ff ; also used as 256 byte download buffer (!)
+ 00116
+ 00000100 00117 TIA_BASE EQU 0x100 ; address space of TIA chip (used: 0x00-0x05)
+ 00118
+ 00000100 00119 TIA_AUDC0 EQU TIA_BASE+0x00 ;; control. for voice 1 (Aud0)
+ 00000101 00120 TIA_AUDC1 EQU TIA_BASE+0x01 ;; control. for voice 2 (Aud1)
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 21
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00000102 00121 TIA_AUDF0 EQU TIA_BASE+0x02 ;; freq. for voice 1 (Aud0)
+ 00000103 00122 TIA_AUDF1 EQU TIA_BASE+0x03 ;; freq. for voice 2 (Aud1)
+ 00000104 00123 TIA_AUDV0 EQU TIA_BASE+0x04 ;; vol. for voice 1 (Aud0)
+ 00000105 00124 TIA_AUDV1 EQU TIA_BASE+0x05 ;; vol. for voice 2 (Aud1)
+ 00125
+ 0000010B 00126 TIA_MASTER_VOL EQU TIA_BASE+0x0b ; internal TIA_SW register
+ 0000010C 00127 TIA_PLAY_MODE EQU TIA_BASE+0x0c ; internal TIA_SW register
+ 0000010D 00128 TIA_SE_OPTION EQU TIA_BASE+0x0d ; internal TIA_SW register
+ 0000010E 00129 TIA_SW_VOICE EQU TIA_BASE+0x0e ; internal TIA_SW register
+ 0000010F 00130 TIA_SW_LFO_NUMBER EQU TIA_BASE+0x0f ; internal TIA_SW register
+ 0000010F 00131 TIA_SW_ENV_NUMBER EQU TIA_SW_LFO_NUMBER
+ 00132
+ 0000010F 00133 TIA_BASE_END EQU 0x10f
+ 00134
+ 00135 ;; ==========================================================================
+ 00136
+ 00000110 00137 TIA_SHADOW_BASE EQU 0x110 ; shadow addresses, necessary to determine changes (used: 0x00-0x05)
+ 00138
+ 00139 ;; (TIA_SHADOW_BASE + 0x00) to (TIA_SHADOW_BASE + 0x05) allocated by shadow registers
+ 00140
+ 0000011B 00141 TIA_Vx_ENV_CURVES EQU TIA_SHADOW_BASE+0x0b ; internal TIA_SW register
+ 0000011C 00142 TIA_LFO_RANDOM_SEED_L EQU TIA_SHADOW_BASE+0x0c ; internal TIA_SW register
+ 0000011D 00143 TIA_LFO_RANDOM_SEED_H EQU TIA_SHADOW_BASE+0x0d ; internal TIA_SW register
+ 0000011E 00144 TIA_ENVx_CURVES EQU TIA_SHADOW_BASE+0x0e ; internal TIA_SW register
+ 0000011F 00145 TIA_MOD_SYNC EQU TIA_SHADOW_BASE+0x0f ; internal TIA_SW register
+ 00146
+ 00147
+ 0000011F 00148 TIA_SHADOW_END EQU 0x11f
+ 00149
+ 00150 ;; ==========================================================================
+ 00151
+ 00000040 00152 TIA_Vx_RECORD_LEN EQU 64 ;; 64 Max
+ 00153
+ 00000000 00154 TIA_Vx_MIDI_CHANNEL EQU 0x00
+ 00000001 00155 TIA_Vx_SPLIT_LOWER EQU 0x01
+ 00000002 00156 TIA_Vx_SPLIT_UPPER EQU 0x02
+ 00000003 00157 TIA_Vx_STAT EQU 0x03
+ 00000004 00158 TIA_Vx_MODE EQU 0x04 ; Always follow TIA_Vx_STAT
+ 00000005 00159 TIA_Vx_KEY_OFFSET EQU 0x05
+ 00000006 00160 TIA_Vx_KEY_LENGTH EQU 0x06
+ 00000007 00161 TIA_Vx_TARGET_FRQ_L EQU 0x07
+ 00000008 00162 TIA_Vx_TARGET_FRQ_H EQU 0x08
+ 00000009 00163 TIA_Vx_FRQ_L EQU 0x09
+ 0000000A 00164 TIA_Vx_FRQ_H EQU 0x0a
+ 0000000B 00165 TIA_Vx_PITCHBENDER EQU 0x0b
+ 0000000C 00166 TIA_Vx_TRANSPOSE EQU 0x0c
+ 0000000D 00167 TIA_Vx_PITCHRANGE EQU 0x0d
+ 0000000E 00168 TIA_Vx_PORTA_RATE EQU 0x0e
+ 0000000F 00169 TIA_Vx_VOLUME EQU 0x0f
+ 00000010 00170 TIA_Vx_NOTE EQU 0x10
+ 00000011 00171 TIA_Vx_NOTE_DELAY EQU 0x11
+ 00000012 00172 TIA_Vx_NOTE_DELAY_CTR EQU 0x12
+ 00000013 00173 TIA_Vx_ARP_RATE EQU 0x13
+ 00000014 00174 TIA_Vx_ARP_NOTE_NUMBER EQU 0x14
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 22
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00000015 00175 TIA_Vx_ARP_CTR EQU 0x15
+ 00000016 00176 TIA_Vx_PITCH_MOD EQU 0x16
+ 00000017 00177 TIA_Vx_AMP_MOD EQU 0x17
+ 00000018 00178 TIA_Vx_SPARE EQU 0x18
+ 00179
+ 00000019 00180 TIA_Vx_SPARE1 EQU 0x19 ; allocated
+ 0000001A 00181 TIA_Vx_SPARE2 EQU 0x1a ; only free of constant time portamento not activated
+ 0000001B 00182 TIA_Vx_SPARE3 EQU 0x1b ; only free of constant time portamento not activated
+ 0000001C 00183 TIA_Vx_SPARE4 EQU 0x1c ; only free of constant time portamento not activated
+ 0000001D 00184 TIA_Vx_SPARE5 EQU 0x1d ; only free of constant time portamento not activated
+ 00185
+ 0000001A 00186 TIA_Vx_PORTA_CTR_L EQU TIA_Vx_SPARE2
+ 0000001B 00187 TIA_Vx_PORTA_CTR_H EQU TIA_Vx_SPARE3
+ 0000001C 00188 TIA_Vx_PORTA_FRQ_L EQU TIA_Vx_SPARE4
+ 0000001D 00189 TIA_Vx_PORTA_FRQ_H EQU TIA_Vx_SPARE5
+ 00190
+ 0000001E 00191 TIA_Vx_ARP_NOTE_0 EQU 0x1e
+ 0000001F 00192 TIA_Vx_ARP_NOTE_1 EQU 0x1f
+ 00000020 00193 TIA_Vx_ARP_NOTE_2 EQU 0x20
+ 00000021 00194 TIA_Vx_ARP_NOTE_3 EQU 0x21
+ 00000022 00195 TIA_Vx_NOTE_STACK_0 EQU 0x22
+ 00000023 00196 TIA_Vx_NOTE_STACK_1 EQU 0x23
+ 00000024 00197 TIA_Vx_NOTE_STACK_2 EQU 0x24
+ 00000025 00198 TIA_Vx_NOTE_STACK_3 EQU 0x25
+ 00000004 00199 TIA_NOTE_STACK_LEN EQU TIA_Vx_NOTE_STACK_3-TIA_Vx_NOTE_STACK_0+1
+ 00200
+ 00000026 00201 TIA_Vx_ASSIGN_VEL EQU 0x26
+ 00000027 00202 TIA_Vx_INIT_VEL EQU 0x27
+ 00000028 00203 TIA_Vx_LAST_VEL EQU 0x28
+ 00000029 00204 TIA_Vx_DEPTH_VEL EQU 0x29
+ 00205
+ 0000002A 00206 TIA_Vx_ENV_MODE EQU 0x2a
+ 0000002B 00207 TIA_Vx_OPTION EQU 0x2b
+ 00208
+ 0000002C 00209 TIA_Vx_WBANK EQU 0x2c ;; don't change order
+ 0000002D 00210 TIA_Vx_WT EQU 0x2d ;; don't change order
+ 0000002E 00211 TIA_Vx_WT_STATE EQU 0x2e ;; don't change order
+ 0000002F 00212 TIA_Vx_WT_RATE EQU 0x2f
+ 00000030 00213 TIA_Vx_WT_CLK_REQ_CTR EQU 0x30
+ 00000031 00214 TIA_Vx_WT_CTR EQU 0x31
+ 00000032 00215 TIA_Vx_WT_POS EQU 0x32
+ 00000033 00216 TIA_Vx_WT_ASSIGN_P1 EQU 0x33
+ 00000034 00217 TIA_Vx_WT_ASSIGN_P2 EQU 0x34
+ 00000035 00218 TIA_Vx_WT_ASSIGN_P3 EQU 0x35
+ 00000036 00219 TIA_Vx_WT_303_TICK_CTR EQU 0x36
+ 00220
+ 00000037 00221 TIA_Vx_WT_ATTACK EQU 0x37 ;; don't change order
+ 00000038 00222 TIA_Vx_WT_DECAY EQU 0x38 ;; don't change order
+ 00000039 00223 TIA_Vx_WT_SUSTAIN EQU 0x39 ;; don't change order
+ 0000003A 00224 TIA_Vx_WT_RELEASE EQU 0x3a ;; don't change order
+ 00225
+ 0000003B 00226 TIA_Vx_FREE1 EQU 0x3b
+ 0000003C 00227 TIA_Vx_FREE2 EQU 0x3c
+ 0000003D 00228 TIA_Vx_FREE3 EQU 0x3d
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 23
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 0000003E 00229 TIA_Vx_FREE4 EQU 0x3e
+ 0000003F 00230 TIA_Vx_FREE5 EQU 0x3f
+ 00231
+ 00000120 00232 TIA_V1_BASE EQU 0x120 + 0 * TIA_Vx_RECORD_LEN ; 0x0120-0x15f
+ 00000160 00233 TIA_V2_BASE EQU 0x120 + 1 * TIA_Vx_RECORD_LEN ; 0x0160-0x19f
+ 00234
+ 00235 ;; ==========================================================================
+ 00236
+ 00000007 00237 TIA_LFOx_RECORD_LEN EQU 7
+ 00000000 00238 TIA_LFOx_MODE EQU 0x00
+ 00000001 00239 TIA_LFOx_RATE EQU 0x01
+ 00000002 00240 TIA_LFOx_CTR EQU 0x02
+ 00000003 00241 TIA_LFOx_VALUE EQU 0x03
+ 00000004 00242 TIA_LFOx_DEPTH EQU 0x04
+ 00000005 00243 TIA_LFOx_RVALUE_L EQU 0x05
+ 00000006 00244 TIA_LFOx_RVALUE_H EQU 0x06
+ 00245
+ 000001A0 00246 TIA_LFO1_BASE EQU 0x1a0 + 0 * TIA_LFOx_RECORD_LEN ; 0x1a0-0x1a6
+ 000001A7 00247 TIA_LFO2_BASE EQU 0x1a0 + 1 * TIA_LFOx_RECORD_LEN ; 0x1a7-0x1ad
+ 000001AE 00248 TIA_LFO3_BASE EQU 0x1a0 + 2 * TIA_LFOx_RECORD_LEN ; 0x1ae-0x1b4
+ 000001B5 00249 TIA_LFO4_BASE EQU 0x1a0 + 3 * TIA_LFOx_RECORD_LEN ; 0x1b5-0x1bb
+ 00250
+ 00251 ;; ==========================================================================
+ 00252
+ 0000000B 00253 TIA_ENVx_RECORD_LEN EQU 11
+ 00000000 00254 TIA_ENVx_MODE EQU 0x00
+ 00000001 00255 TIA_ENVx_CTR_L EQU 0x01
+ 00000002 00256 TIA_ENVx_CTR_H EQU 0x02
+ 00000003 00257 TIA_ENVx_ATTACK EQU 0x03 ;; don't change order
+ 00000004 00258 TIA_ENVx_DECAY EQU 0x04 ;; don't change order
+ 00000005 00259 TIA_ENVx_SUSTAIN EQU 0x05 ;; don't change order
+ 00000006 00260 TIA_ENVx_RELEASE EQU 0x06 ;; don't change order
+ 00000007 00261 TIA_ENVx_CURVE EQU 0x07
+ 00000008 00262 TIA_ENVx_DEPTH EQU 0x08
+ 00000009 00263 TIA_ENVx_RVALUE_L EQU 0x09
+ 0000000A 00264 TIA_ENVx_RVALUE_H EQU 0x0a
+ 00265
+ 000001BC 00266 TIA_V1_ENV_BASE EQU 0x1bc + 0 * TIA_ENVx_RECORD_LEN ; 0x1bc-0x1c6
+ 000001C7 00267 TIA_V2_ENV_BASE EQU 0x1bc + 1 * TIA_ENVx_RECORD_LEN ; 0x1c7-0x1d1
+ 000001D2 00268 TIA_ENV1_BASE EQU 0x1bc + 2 * TIA_ENVx_RECORD_LEN ; 0x1d2-0x1dc
+ 000001DD 00269 TIA_ENV2_BASE EQU 0x1bc + 3 * TIA_ENVx_RECORD_LEN ; 0x1dd-0x1e7
+ 00270
+ 00271 ;; ==========================================================================
+ 00272
+ 00000004 00273 TIA_CTRLx_RECORD_LEN EQU 4
+ 00000000 00274 TIA_CTRLx_ASSIGN EQU 0x00
+ 00000001 00275 TIA_CTRLx_INIT EQU 0x01
+ 00000002 00276 TIA_CTRLx_LAST EQU 0x02
+ 00000003 00277 TIA_CTRLx_DEPTH EQU 0x03
+ 00278
+ 000001E8 00279 TIA_CTRL_AFTERTOUCH_BASE EQU 0x1e8 + 0 * TIA_CTRLx_RECORD_LEN ; 0x1e8-0x1eb
+ 000001EC 00280 TIA_CTRL_MODWHEEL_BASE EQU 0x1e8 + 1 * TIA_CTRLx_RECORD_LEN ; 0x1ec-0x1ef
+ 00281
+ 00282 ;; ==========================================================================
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 24
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00283
+ 000001F0 00284 TIA_MIDI_SYNC EQU 0x1f0
+ 000001F1 00285 TIA_MIDI_SYNC_CTR EQU 0x1f1
+ 000001F2 00286 TIA_MIDI_SYNC_CTR_REG EQU 0x1f2
+ 00287
+ 00288 ;; ==========================================================================
+ 00289
+ 00290 ; free 0x1f4-0x1f5
+ 00291 ;; ==========================================================================
+ 00292
+ 000001F6 00293 SAVED_PRODL EQU 0x1f6 ; used by tia_sw.inc
+ 000001F7 00294 SAVED_PRODH EQU 0x1f7 ; used by tia_sw.inc
+ 00295
+ 00296 ;; ==========================================================================
+ 000001F8 00297 MUL_A_L EQU 0x1f8 ; used by math_mul16_16.inc
+ 000001F9 00298 MUL_A_H EQU 0x1f9
+ 000001FA 00299 MUL_B_L EQU 0x1fa
+ 000001FB 00300 MUL_B_H EQU 0x1fb
+ 000001FC 00301 MUL_R_0 EQU 0x1fc
+ 000001FD 00302 MUL_R_1 EQU 0x1fd
+ 000001FE 00303 MUL_R_2 EQU 0x1fe
+ 000001FF 00304 MUL_R_3 EQU 0x1ff
+ 00305
+ 00306
+ 000001F8 00307 DIV_A_0 EQU MUL_A_L ; used by math_div16_16.inc
+ 000001F9 00308 DIV_A_1 EQU MUL_A_H
+ 000001FA 00309 DIV_A_2 EQU MUL_B_L
+ 000001FB 00310 DIV_B_0 EQU MUL_B_H
+ 000001FC 00311 DIV_B_1 EQU MUL_R_0
+ 000001FD 00312 DIV_COUNT EQU MUL_R_1
+ 000001FE 00313 DIV_REM_0 EQU MUL_R_2
+ 000001FF 00314 DIV_REM_1 EQU MUL_R_3
+ 00315
+ 00316
+ 00317 ;; ==========================================================================
+ 00000200 00318 BANKSTICK_FORMAT_BEGIN EQU 0x200 ; buffer temporary used to format the BankStick
+ 000002FF 00319 BANKSTICK_FORMAT_END EQU 0x2ff ; CS reserved
+ 00320
+ 00321 ;; ==========================================================================
+ 00000007 00322 TIA_Vx_KIT_RECORD_LEN EQU 7
+ 00323
+ 00000000 00324 TIA_Vx_KBANK EQU 0x00 ;; don't change order
+ 00000001 00325 TIA_Vx_KIT EQU 0x01 ;; don't change order
+ 00000002 00326 TIA_Vx_KIT_STATE EQU 0x02 ;; don't change order
+ 00000003 00327 TIA_Vx_KIT_RATE EQU 0x03
+ 00000004 00328 TIA_Vx_KIT_CLK_REQ_CTR EQU 0x04
+ 00000005 00329 TIA_Vx_KIT_CTR EQU 0x05
+ 00000006 00330 TIA_Vx_KIT_POS EQU 0x06
+ 00331
+ 00000300 00332 TIA_V1_KIT EQU 0x300 + 0 * TIA_Vx_RECORD_LEN ; 0x0300-0x306
+ 00000340 00333 TIA_V2_KIT EQU 0x300 + 1 * TIA_Vx_RECORD_LEN ; 0x0307-0x30d
+ 00334
+ 00335 ;;free 0x30e-0x37f
+ 00037
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 25
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00038
+ 00039 ; ==========================================================================
+ 00040
+ 00041 ;; ---[ configuration table for MIDI processor and rotary encoders ]---
+ 00042 #include "mios_tables.inc"
+ 00001 ; $Id: mios_tables.inc 339 2008-05-14 20:26:50Z tk $
+ 00002 ;
+ 00003 ; Configuration Tables for MIOS Application
+ 00004 ;
+ 00005 ; ==========================================================================
+ 00006 ;
+ 00007 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00008 ; Licensed for personal non-commercial use only.
+ 00009 ; All other rights reserved.
+ 00010 ;
+ 00011 ; ==========================================================================
+ 00012
+3080 00013 org 0x3080 ; never change the origin!
+ 00014
+ 00015 ;; --------------------------------------------------------------------------
+ 00016 ;; The MIDI Trigger table maps incoming MIDI events to control elements
+ 00017 ;; (pots/faders, encoders, buttons, LEDs, ...)
+ 00018 ;;
+ 00019 ;; After the MIOS MIDI processor (MPROC) has received a complete event, it
+ 00020 ;; searches in this table for a matching entry and calls USER_MPROC_NotifyFoundEvent
+ 00021 ;; with the table index in WREG and the MIDI event in MIOS_PARAMETER[123]
+ 00022 ;;
+ 00023 ;; Note also that the MIDI processor stops scanning the table after
+ 00024 ;; the first MT_EOT entry
+ 00025 ;;
+ 00026 ;; Note2: never change the origin (memory location) of this table!
+ 00027 ;;
+ 00028 ;; Optionally this table can also be used to define events, which should be
+ 00029 ;; transmitted (Example: see example_ain64_din128_dout128), so that incoming
+ 00030 ;; and outgoing events are located at one place
+ 00031 ;;
+ 00032 ;; The table *must* contain 256 entries. Unused entries should be filled with
+ 00033 ;; MT_EOT.
+ 00034 ;; --------------------------------------------------------------------------
+ 00035
+ 00036 ;; MIDI Trigger entry structure
+ 00037 MT_ENTRY MACRO event_0, event_1
+ 00038 dw (event_1 << 8) | event_0
+ 00039 ENDM
+ 00040
+ 00041 MT_EOT MACRO
+ 00042 dw 0xffff
+ 00043 ENDM
+ 00044
+ 00045
+3080 00046 MIOS_MPROC_EVENT_TABLE
+ 00047 ;; this "end of table" entry ensures that MIOS will stop searching here
+ 00048 MT_EOT
+3080 FFFF M dw 0xffff
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 26
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00049
+ 00050
+ 00051 ;; dirty but allowed so long as MT_EOT can be found at 0x3080:
+ 00052 ;; since the MIDIbox TIA application doesn't get use of the MPROC_EVENT_TABLE,
+ 00053 ;; we are using the address range from 0x3082 to 0x327f for other
+ 00054 ;; application specific tables
+ 00055
+ 00056 #include "tia_frq_table.inc"
+ 00001 ; $Id: tia_frq_table.inc 111 2008-02-22 00:41:21Z tk $
+ 00002 ;
+ 00003 ; MIDIbox TIA
+ 00004 ; Frequency Table (refer to the TIA spec)
+ 00005 ;
+ 00006 ; ==========================================================================
+ 00007 ;
+ 00008 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00009 ; Licensed for personal non-commercial use only.
+ 00010 ; All other rights reserved.
+ 00011 ;
+ 00012 ; ==========================================================================
+ 00013
+ 00014 ;; --------------------------------------------------------------------------
+ 00015 ;; In: note index (0x00-0x7f) in WREG
+ 00016 ;; Out: frq low byte in WREG and MIOS_PARAMETER1, frq high byte in MIOS_PARAMETER2
+ 00017 ;; --------------------------------------------------------------------------
+3082 00018 TIA_FRQ_TABLE_Get
+3082 90D8 00019 clrc
+3084 34E8 00020 rlf WREG, W
+3086 0FA0 00021 addlw TIA_FRQ_TABLE & 0xff
+3088 6EF6 00022 movwf TBLPTRL
+308A 6AF7 00023 clrf TBLPTRH
+308C 0E30 00024 movlw TIA_FRQ_TABLE >> 8
+308E 22F7 00025 addwfc TBLPTRH, F
+ 00026
+3090 0009 00027 tblrd*+
+3092 CFF5 F003 00028 movff TABLAT, MIOS_PARAMETER1
+3096 0009 00029 tblrd*+
+3098 CFF5 F004 00030 movff TABLAT, MIOS_PARAMETER2
+309C 5003 00031 movf MIOS_PARAMETER1, W
+309E 0012 00032 return
+ 00033
+ 00034 ; ==========================================================================
+ 00035
+30A0 00036 TIA_FRQ_TABLE
+30A0 0028 002B 00037 dw 0x0028,0x002b,0x002d,0x0030,0x0033,0x0036,0x0039,0x003d,0x0040,0x0044,0x0048,0x004c
+ 002D 0030
+ 0033 0036
+ 0039 003D
+ 0040 0044
+ 0048 004C
+30B8 0051 0056 00038 dw 0x0051,0x0056,0x005b,0x0060,0x0066,0x006c,0x0073,0x007a,0x0081
+ 005B 0060
+ 0066 006C
+ 0073 007A
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 27
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 0081
+ 00039
+30CA 0089 0091 00040 dw 0x0089,0x0091,0x0099,0x00a3,0x00ac,0x00b7,0x00c1,0x00cd,0x00d9,0x00e6,0x00f4,0x0102 ; c-2
+ 0099 00A3
+ 00AC 00B7
+ 00C1 00CD
+ 00D9 00E6
+ 00F4 0102
+30E2 0112 0122 00041 dw 0x0112,0x0122,0x0133,0x0146,0x0159,0x016e,0x0183,0x019b,0x01b3,0x01cd,0x01e8,0x0205 ; c-1
+ 0133 0146
+ 0159 016E
+ 0183 019B
+ 01B3 01CD
+ 01E8 0205
+30FA 0224 0245 00042 dw 0x0224,0x0245,0x0267,0x028c,0x02b3,0x02da,0x0307,0x0336,0x0366,0x039a,0x03d1,0x040b ; c-0
+ 0267 028C
+ 02B3 02DA
+ 0307 0336
+ 0366 039A
+ 03D1 040B
+3112 0449 048A 00043 dw 0x0449,0x048a,0x04cf,0x0518,0x0566,0x05b8,0x060f,0x066c,0x06cd,0x0735,0x07a3,0x0817 ; C-1
+ 04CF 0518
+ 0566 05B8
+ 060F 066C
+ 06CD 0735
+ 07A3 0817
+312A 0892 0915 00044 dw 0x0892,0x0915,0x099f,0x0A31,0x0Acd,0x0B71,0x0C1f,0x0Cd8,0x0D9b,0x0E6a,0x0F46,0x102e ; C-2
+ 099F 0A31
+ 0ACD 0B71
+ 0C1F 0CD8
+ 0D9B 0E6A
+ 0F46 102E
+3142 1125 122A 00045 dw 0x1125,0x122a,0x133e,0x1463,0x159a,0x16e3,0x183f,0x19b0,0x1B37,0x1Cd5,0x1E8c,0x205d ; C-3
+ 133E 1463
+ 159A 16E3
+ 183F 19B0
+ 1B37 1CD5
+ 1E8C 205D
+315A 224A 2454 00046 dw 0x224a,0x2454,0x267d,0x28c7,0x2B34,0x2Dc6,0x307e,0x3361,0x366f,0x39ab,0x3D19,0x40bc ; C-4
+ 267D 28C7
+ 2B34 2DC6
+ 307E 3361
+ 366F 39AB
+ 3D19 40BC
+3172 4495 48A8 00047 dw 0x4495,0x48a8,0x4Cfc,0x518f,0x5668,0x5B8c,0x60fe,0x66c2,0x6Cde,0x7357,0x7A34,0x8177 ; C-5
+ 4CFC 518F
+ 5668 5B8C
+ 60FE 66C2
+ 6CDE 7357
+ 7A34 8177
+318A 892A 9153 00048 dw 0x892a,0x9153,0x99f6,0xA31e,0xACd1,0xB718,0xC1fc,0xCD85,0xD9bc,0xE6af,0xF467 ; C-6
+ 99F6 A31E
+ ACD1 B718
+ C1FC CD85
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 28
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ D9BC E6AF
+ F467
+ 00049
+ 00057 #include "tia_sin_table.inc"
+ 00001 ; $Id: tia_sin_table.inc 111 2008-02-22 00:41:21Z tk $
+ 00002 ;
+ 00003 ; MIDIbox TIA
+ 00004 ; Sinus Table
+ 00005 ; generated with tiatab.pl
+ 00006 ;
+ 00007 ; ==========================================================================
+ 00008 ;
+ 00009 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00010 ; Licensed for personal non-commercial use only.
+ 00011 ; All other rights reserved.
+ 00012 ;
+ 00013 ; ==========================================================================
+ 00014
+ 00015 ;; --------------------------------------------------------------------------
+ 00016 ;; In: index (0x00-0xff) in WREG
+ 00017 ;; Out: Sin value in WREG and MIOS_PARAMETER1
+ 00018 ;; --------------------------------------------------------------------------
+31A0 00019 TIA_SIN_TABLE_Get
+ 00020 ;; note: the table has only 128 entries, the upper entries are just
+ 00021 ;; inverted, so we can save some memory
+31A0 6E03 00022 movwf MIOS_PARAMETER1
+31A2 AE03 00023 btfss MIOS_PARAMETER1, 7
+31A4 0A7F 00024 xorlw 0x7f
+31A6 0B7F 00025 andlw 0x7f
+ 00026
+31A8 0FBE 00027 addlw TIA_SIN_TABLE & 0xff
+31AA 6EF6 00028 movwf TBLPTRL
+31AC 6AF7 00029 clrf TBLPTRH
+31AE 0E31 00030 movlw TIA_SIN_TABLE >> 8
+31B0 22F7 00031 addwfc TBLPTRH, F
+ 00032
+31B2 0009 00033 tblrd*+
+31B4 50F5 00034 movf TABLAT, W
+31B6 BE03 00035 btfsc MIOS_PARAMETER1, 7
+31B8 0980 00036 iorlw 0x80
+31BA 6E03 00037 movwf MIOS_PARAMETER1
+31BC 0012 00038 return
+ 00039
+ 00040 ; ==========================================================================
+ 00041
+31BE 00042 TIA_SIN_TABLE
+31BE 0100 00043 db 0x00, 0x01
+31C0 0403 00044 db 0x03, 0x04
+31C2 0706 00045 db 0x06, 0x07
+31C4 0A09 00046 db 0x09, 0x0a
+31C6 0E0C 00047 db 0x0c, 0x0e
+31C8 110F 00048 db 0x0f, 0x11
+31CA 1412 00049 db 0x12, 0x14
+31CC 1715 00050 db 0x15, 0x17
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 29
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+31CE 1A18 00051 db 0x18, 0x1a
+31D0 1D1C 00052 db 0x1c, 0x1d
+31D2 201F 00053 db 0x1f, 0x20
+31D4 2322 00054 db 0x22, 0x23
+31D6 2625 00055 db 0x25, 0x26
+31D8 2928 00056 db 0x28, 0x29
+31DA 2C2B 00057 db 0x2b, 0x2c
+31DC 2F2E 00058 db 0x2e, 0x2f
+31DE 3230 00059 db 0x30, 0x32
+31E0 3533 00060 db 0x33, 0x35
+31E2 3836 00061 db 0x36, 0x38
+31E4 3A39 00062 db 0x39, 0x3a
+31E6 3D3C 00063 db 0x3c, 0x3d
+31E8 403F 00064 db 0x3f, 0x40
+31EA 4341 00065 db 0x41, 0x43
+31EC 4544 00066 db 0x44, 0x45
+31EE 4847 00067 db 0x47, 0x48
+31F0 4A49 00068 db 0x49, 0x4a
+31F2 4D4C 00069 db 0x4c, 0x4d
+31F4 4F4E 00070 db 0x4e, 0x4f
+31F6 5251 00071 db 0x51, 0x52
+31F8 5453 00072 db 0x53, 0x54
+31FA 5755 00073 db 0x55, 0x57
+31FC 5958 00074 db 0x58, 0x59
+31FE 5B5A 00075 db 0x5a, 0x5b
+3200 5D5C 00076 db 0x5c, 0x5d
+3202 5F5E 00077 db 0x5e, 0x5f
+3204 6160 00078 db 0x60, 0x61
+3206 6362 00079 db 0x62, 0x63
+3208 6564 00080 db 0x64, 0x65
+320A 6766 00081 db 0x66, 0x67
+320C 6968 00082 db 0x68, 0x69
+320E 6B6A 00083 db 0x6a, 0x6b
+3210 6C6C 00084 db 0x6c, 0x6c
+3212 6E6D 00085 db 0x6d, 0x6e
+3214 706F 00086 db 0x6f, 0x70
+3216 7170 00087 db 0x70, 0x71
+3218 7372 00088 db 0x72, 0x73
+321A 7473 00089 db 0x73, 0x74
+321C 7575 00090 db 0x75, 0x75
+321E 7676 00091 db 0x76, 0x76
+3220 7777 00092 db 0x77, 0x77
+3222 7978 00093 db 0x78, 0x79
+3224 7A79 00094 db 0x79, 0x7a
+3226 7A7A 00095 db 0x7a, 0x7a
+3228 7B7B 00096 db 0x7b, 0x7b
+322A 7C7C 00097 db 0x7c, 0x7c
+322C 7D7C 00098 db 0x7c, 0x7d
+322E 7D7D 00099 db 0x7d, 0x7d
+3230 7E7E 00100 db 0x7e, 0x7e
+3232 7E7E 00101 db 0x7e, 0x7e
+3234 7F7F 00102 db 0x7f, 0x7f
+3236 7F7F 00103 db 0x7f, 0x7f
+3238 7F7F 00104 db 0x7f, 0x7f
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 30
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+323A 7F7F 00105 db 0x7f, 0x7f
+323C 7F7F 00106 db 0x7f, 0x7f
+ 00058 #include "tia_depth_table.inc"
+ 00001 ; $Id: tia_depth_table.inc 111 2008-02-22 00:41:21Z tk $
+ 00002 ;
+ 00003 ; MIDIbox TIA
+ 00004 ; Depth Table
+ 00005 ; derived from MIDIbox TIA V1.5
+ 00006 ; required since the frequency table has been changed to keep the influence
+ 00007 ; of the depth parameter compatible with older firmware versions
+ 00008 ;
+ 00009 ; ==========================================================================
+ 00010 ;
+ 00011 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00012 ; Licensed for personal non-commercial use only.
+ 00013 ; All other rights reserved.
+ 00014 ;
+ 00015 ; ==========================================================================
+ 00016
+323E 00017 TIA_DEPTH_TABLE
+323E 0100 0302 00018 db 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
+ 0504 0706
+3246 0A08 0E0C 00019 db 0x08, 0x0a, 0x0c, 0x0e, 0x11, 0x12, 0x13, 0x14
+ 1211 1413
+324E 1615 1818 00020 db 0x15, 0x16, 0x18, 0x18, 0x1b, 0x1c, 0x1e, 0x20
+ 1C1B 201E
+3256 2422 2826 00021 db 0x22, 0x24, 0x26, 0x28, 0x2b, 0x2d, 0x30, 0x33
+ 2D2B 3330
+325E 3936 403D 00022 db 0x36, 0x39, 0x3d, 0x40, 0x44, 0x48, 0x4d, 0x51
+ 4844 514D
+3266 5B56 6661 00023 db 0x56, 0x5b, 0x61, 0x66, 0x6c, 0x73, 0x7a, 0x81
+ 736C 817A
+326E 9189 A399 00024 db 0x89, 0x91, 0x99, 0xa3, 0xac, 0xb7, 0xc2, 0xcd
+ B7AC CDC2
+3276 E6D9 FFF4 00025 db 0xd9, 0xe6, 0xf4, 0xff, 0xff, 0xff, 0xff, 0xff
+ FFFF FFFF
+ 00059
+ 00060 ; ==========================================================================
+ 00061
+3280 00062 org 0x3280 ; never change the origin!
+ 00063
+ 00064 ;; --------------------------------------------------------------------------
+ 00065 ;; In this table DIN pins have to be assigned to rotary encoders for the
+ 00066 ;; MIOS_ENC driver
+ 00067 ;;
+ 00068 ;; up to 64 entries are provided
+ 00069 ;;
+ 00070 ;; The table must be terminated with an ENC_EOT entry. Unused entries should
+ 00071 ;; be filled with ENC_EOT
+ 00072 ;;
+ 00073 ;; ENC_ENTRY provides following parameters
+ 00074 ;; o first parameter: number of shift register - 1, 2, 3, ... 16
+ 00075 ;; o second parameter: number of pin; since two pins are necessary
+ 00076 ;; for each encoder, an even number is expected: 0, 2, 4 or 6
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 31
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00077 ;; o the third parameter contains the encoder mode:
+ 00078 ;; either MIOS_ENC_MODE_NON_DETENTED
+ 00079 ;; or MIOS_ENC_MODE_DETENTED
+ 00080 ;; or MIOS_ENC_MODE_DETENTED2
+ 00081 ;;
+ 00082 ;; Configuration Examples:
+ 00083 ;; ENC_ENTRY 1, 0, MIOS_ENC_MODE_NON_DETENTED ; non-detented encoder at pin 0 and 1 of SR 1
+ 00084 ;; ENC_ENTRY 1, 2, MIOS_ENC_MODE_DETENTED ; detented encoder at pin 2 and 3 of SR 1
+ 00085 ;; ENC_ENTRY 9, 6, MIOS_ENC_MODE_NON_DETENTED ; non-detented encoder at pin 6 and 7 of SR 9
+ 00086 ;; --------------------------------------------------------------------------
+ 00087
+ 00088 ;; encoder entry structure
+ 00089 ENC_ENTRY MACRO sr, din_0, mode
+ 00090 dw (mode << 8) | (din_0 + 8*(sr-1))
+ 00091 ENDM
+ 00092 ENC_EOT MACRO
+ 00093 dw 0xffff
+ 00094 ENDM
+ 00095
+3280 00096 MIOS_ENC_PIN_TABLE
+ 00097 ;; encoders 1-16
+ 00098 ENC_EOT
+3280 FFFF M dw 0xffff
+ 00099 ENC_EOT
+3282 FFFF M dw 0xffff
+ 00100 ENC_EOT
+3284 FFFF M dw 0xffff
+ 00101 ENC_EOT
+3286 FFFF M dw 0xffff
+ 00102 ENC_EOT
+3288 FFFF M dw 0xffff
+ 00103 ENC_EOT
+328A FFFF M dw 0xffff
+ 00104 ENC_EOT
+328C FFFF M dw 0xffff
+ 00105 ENC_EOT
+328E FFFF M dw 0xffff
+ 00106 ENC_EOT
+3290 FFFF M dw 0xffff
+ 00107 ENC_EOT
+3292 FFFF M dw 0xffff
+ 00108 ENC_EOT
+3294 FFFF M dw 0xffff
+ 00109 ENC_EOT
+3296 FFFF M dw 0xffff
+ 00110 ENC_EOT
+3298 FFFF M dw 0xffff
+ 00111 ENC_EOT
+329A FFFF M dw 0xffff
+ 00112 ENC_EOT
+329C FFFF M dw 0xffff
+ 00113 ENC_EOT
+329E FFFF M dw 0xffff
+ 00114
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 32
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00115 ;; encoders 17-32
+ 00116 ENC_EOT
+32A0 FFFF M dw 0xffff
+ 00117 ENC_EOT
+32A2 FFFF M dw 0xffff
+ 00118 ENC_EOT
+32A4 FFFF M dw 0xffff
+ 00119 ENC_EOT
+32A6 FFFF M dw 0xffff
+ 00120 ENC_EOT
+32A8 FFFF M dw 0xffff
+ 00121 ENC_EOT
+32AA FFFF M dw 0xffff
+ 00122 ENC_EOT
+32AC FFFF M dw 0xffff
+ 00123 ENC_EOT
+32AE FFFF M dw 0xffff
+ 00124 ENC_EOT
+32B0 FFFF M dw 0xffff
+ 00125 ENC_EOT
+32B2 FFFF M dw 0xffff
+ 00126 ENC_EOT
+32B4 FFFF M dw 0xffff
+ 00127 ENC_EOT
+32B6 FFFF M dw 0xffff
+ 00128 ENC_EOT
+32B8 FFFF M dw 0xffff
+ 00129 ENC_EOT
+32BA FFFF M dw 0xffff
+ 00130 ENC_EOT
+32BC FFFF M dw 0xffff
+ 00131 ENC_EOT
+32BE FFFF M dw 0xffff
+ 00132
+ 00133 ;; encoders 33-48
+ 00134 ENC_EOT
+32C0 FFFF M dw 0xffff
+ 00135 ENC_EOT
+32C2 FFFF M dw 0xffff
+ 00136 ENC_EOT
+32C4 FFFF M dw 0xffff
+ 00137 ENC_EOT
+32C6 FFFF M dw 0xffff
+ 00138 ENC_EOT
+32C8 FFFF M dw 0xffff
+ 00139 ENC_EOT
+32CA FFFF M dw 0xffff
+ 00140 ENC_EOT
+32CC FFFF M dw 0xffff
+ 00141 ENC_EOT
+32CE FFFF M dw 0xffff
+ 00142 ENC_EOT
+32D0 FFFF M dw 0xffff
+ 00143 ENC_EOT
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 33
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+32D2 FFFF M dw 0xffff
+ 00144 ENC_EOT
+32D4 FFFF M dw 0xffff
+ 00145 ENC_EOT
+32D6 FFFF M dw 0xffff
+ 00146 ENC_EOT
+32D8 FFFF M dw 0xffff
+ 00147 ENC_EOT
+32DA FFFF M dw 0xffff
+ 00148 ENC_EOT
+32DC FFFF M dw 0xffff
+ 00149 ENC_EOT
+32DE FFFF M dw 0xffff
+ 00150
+ 00151 ;; encoders 49-64
+ 00152 ENC_EOT
+32E0 FFFF M dw 0xffff
+ 00153 ENC_EOT
+32E2 FFFF M dw 0xffff
+ 00154 ENC_EOT
+32E4 FFFF M dw 0xffff
+ 00155 ENC_EOT
+32E6 FFFF M dw 0xffff
+ 00156 ENC_EOT
+32E8 FFFF M dw 0xffff
+ 00157 ENC_EOT
+32EA FFFF M dw 0xffff
+ 00158 ENC_EOT
+32EC FFFF M dw 0xffff
+ 00159 ENC_EOT
+32EE FFFF M dw 0xffff
+ 00160 ENC_EOT
+32F0 FFFF M dw 0xffff
+ 00161 ENC_EOT
+32F2 FFFF M dw 0xffff
+ 00162 ENC_EOT
+32F4 FFFF M dw 0xffff
+ 00163 ENC_EOT
+32F6 FFFF M dw 0xffff
+ 00164 ENC_EOT
+32F8 FFFF M dw 0xffff
+ 00165 ENC_EOT
+32FA FFFF M dw 0xffff
+ 00166 ENC_EOT
+32FC FFFF M dw 0xffff
+ 00167 ENC_EOT
+32FE FFFF M dw 0xffff
+ 00168
+ 00169
+3300 00170 org 0x3300 ; never change the origin!
+ 00043
+ 00044 ;; ---[ Custom LCD driver ]---
+ 00045 #include "app_lcd.inc"
+ 00001 ; $Id: app_lcd.inc 69 2008-02-01 00:20:18Z tk $
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 34
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00002 ;
+ 00003 ; MIOS Custom LCD Driver Example
+ 00004 ; for up to 8 * DOG GLCD (every display provides a resolution of 128x64)
+ 00005 ;;
+ 00006 ; This driver allows to drive up to 8 of them, every display is connected
+ 00007 ; to a dedicated chip select line at port B. They can be addressed with
+ 00008 ; following (graphical) cursor positions:
+ 00009 ;
+ 00010 ; I have swapped these round to make it easier for people with PIC18f4685
+ 00011 ; so they are limited to 4x displays. Therefore the first display is on PortB.7
+ 00012 ;
+ 00013 ; CS at PortB.7 CS at PortB.6
+ 00014 ; +--------------+ +--------------+
+ 00015 ; | | | |
+ 00016 ; | X = 0..127 | | X = 128..255 |
+ 00017 ; | Y = 0.. 7 | | Y = 0.. 7 |
+ 00018 ; | | | |
+ 00019 ; +--------------+ +--------------+
+ 00020 ;
+ 00021 ; CS at PortB.5 CS at PortB.4
+ 00022 ; +--------------+ +--------------+
+ 00023 ; | | | |
+ 00024 ; | X = 0..127 | | X = 128..255 |
+ 00025 ; | Y = 8.. 15 | | Y = 8.. 15 |
+ 00026 ; | | | |
+ 00027 ; +--------------+ +--------------+
+ 00028 ;
+ 00029 ; CS at PortB.3 CS at PortB.2
+ 00030 ; +--------------+ +--------------+
+ 00031 ; | | | |
+ 00032 ; | X = 0..127 | | X = 128..255 |
+ 00033 ; | Y = 16.. 23 | | Y = 16.. 23 |
+ 00034 ; | | | |
+ 00035 ; +--------------+ +--------------+
+ 00036 ;
+ 00037 ; CS at PortB.1 CS at PortB.0
+ 00038 ; +--------------+ +--------------+
+ 00039 ; | | | |
+ 00040 ; | X = 0..127 | | X = 128..255 |
+ 00041 ; | Y = 24.. 31 | | Y = 24.. 31 |
+ 00042 ; | | | |
+ 00043 ; +--------------+ +--------------+
+ 00044 ;
+ 00045 ; The arrangement can be modified below the USER_LCD_Data_CS and USER_LCD_GCursorSet label
+ 00046 ;
+ 00047 ; ==========================================================================
+ 00048 ;
+ 00049 ; Copyright (C) 2009 Phil Taylor (phil@taylor.org.uk)
+ 00050 ; Copyright (C) 2003 Thorsten Klose (tk@midibox.org)
+ 00051 ; Licensed for personal non-commercial use only.
+ 00052 ; All other rights reserved.
+ 00053 ;
+ 00054 ; ==========================================================================
+ 00055
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 35
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00056 ;; --------------------------------------------------------------------------
+ 00057 ;; Following system variables are given by MIOS and can be directly
+ 00058 ;; accessed by the driver. The addresses are defined in mios.h and
+ 00059 ;; should not be changed
+ 00060 ;;
+ 00061 ;; MIOS_GLCD_BUFFER a 8 byte buffer for data transfers
+ 00062 ;; MIOS_LCD_OPTION1 contains the first LCD option given by MIOS_LCD_TypeSet
+ 00063 ;; MIOS_LCD_OPTION2 contains the second LCD option given by MIOS_LCD_TypeSet
+ 00064 ;; MIOS_LCD_CURSOR_POS the current cursor pos of characters (GLCD: multiplied by width)
+ 00065 ;; MIOS_GLCD_GCURSOR_X for GLCDs: the current X position of graphical cursor
+ 00066 ;; MIOS_GLCD_GCURSOR_Y for GLCDs: the current Y position of graphical cursor
+ 00067 ;; MIOS_GLCD_FONT_WIDTH for GLCDs: the fontwidth given by MIOS_GLCD_FontInit
+ 00068 ;; MIOS_GLCD_FONT_HEIGHT for GLCDs: the fontheight given by MIOS_GLCD_FontInit
+ 00069 ;; MIOS_GLCD_FONT_X0 for GLCDs: the first byte within a char entry
+ 00070 ;; MIOS_GLCD_FONT_OFFSET for GLCDs: the byte offset between the characters
+ 00071 ;; MIOS_GLCD_FONT_PTRL for GLCDs: pointer to the character table, low-byte
+ 00072 ;; MIOS_GLCD_FONT_PTRH for GLCDs: pointer to the character table, high-byte
+ 00073 ;; MIOS_LCD_TIMEOUT0 can be used for timeout loops
+ 00074 ;; MIOS_LCD_TIMEOUT1 can be used for timeout loops
+ 00075 ;; MIOS_GLCD_TMP1 can be used as temporary buffer
+ 00076 ;; MIOS_GLCD_TMP2 can be used as temporary buffer
+ 00077 ;; MIOS_GLCD_TMP3 can be used as temporary buffer
+ 00078 ;; MIOS_GLCD_TMP4 can be used as temporary buffer
+ 00079 ;; MIOS_LCD_Y0_OFFSET Y0 offset of LCD
+ 00080 ;; MIOS_LCD_Y1_OFFSET Y1 offset of LCD
+ 00081 ;; MIOS_LCD_Y2_OFFSET Y2 offset of LCD
+ 00082 ;; MIOS_LCD_Y3_OFFSET Y3 offset of LCD
+ 00083 ;; MIOS_LCD_CURSOR_POS_REAL unmapped cursor position which has been set with MIOS_LCD_CursorSet
+ 00084 ;;
+ 00085 ;; Note: the addresses are located in an upper bank and therefore have to
+ 00086 ;; be accessed with the BANKED flag. Also the BSR has to be justified
+ 00087 ;; before using the registers
+ 00088 ;; Example:
+ 00089 ;; SET_BSR MIOS_LCD_OPTION1 ; sets BSR to the bank where MIOS_LCD_*
+ 00090 ;; ; has been located. You don't need to
+ 00091 ;; ; change the BSR for the other LCD registers
+ 00092 ;; movf MIOS_LCD_OPTION1, W, BANKED ; get LCD option #1
+ 00093 ;;
+ 00094 ;; Important: to allow a proper interaction with MIOS applications, you are
+ 00095 ;; only allowed to modify MIOS_PARAMETER[123], the mutliplication registers
+ 00096 ;; and FSR1. You are not allowed to change TMP[1-5] or FSR0
+ 00097 ;; if you need some temporary registers, use the given addresses above or
+ 00098 ;; locate them to addresses which are not used by the application
+ 00099 ;; --------------------------------------------------------------------------
+ 00100
+ 00101 ;; Clock/data/DC
+ 00102 #ifndef USER_LCD_TRIS_SCLK
+ 00103 #define USER_LCD_TRIS_SCLK TRISD
+ 00104 #endif
+ 00105 #ifndef USER_LCD_TRIS_SCLK
+ 00106 #define USER_LCD_LAT_SCLK LATD ; Pin D.7
+ 00107 #endif
+ 00108 #ifndef USER_LCD_PIN_SCLK
+ 00109 #define USER_LCD_PIN_SCLK 7
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 36
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00110 #endif
+ 00111 #ifndef USER_LCD_TRIS_SDA
+ 00112 #define USER_LCD_TRIS_SDA TRISD
+ 00113 #endif
+ 00114 #ifndef USER_LCD_LAT_SDA
+ 00115 #define USER_LCD_LAT_SDA LATD ; Pin D.6
+ 00116 #endif
+ 00117 #ifndef USER_LCD_PIN_SDA
+ 00118 #define USER_LCD_PIN_SDA 6
+ 00119 #endif
+ 00120 #ifndef USER_LCD_TRIS_DC
+ 00121 #define USER_LCD_TRIS_DC TRISD
+ 00122 #endif
+ 00123 #ifndef USER_LCD_LAT_DC
+ 00124 #define USER_LCD_LAT_DC LATD ; Pin D.5
+ 00125 #endif
+ 00126 #ifndef USER_LCD_PIN_DC
+ 00127 #define USER_LCD_PIN_DC 5
+ 00128 #endif
+ 00129 ;; Chip Select Lines 0-7
+ 00130 #ifndef USER_LCD_TRIS_CS
+ 00131 #define USER_LCD_TRIS_CS TRISB
+ 00132 #endif
+ 00133 #ifndef USER_LCD_LAT_CS
+ 00134 #define USER_LCD_LAT_CS LATB ; Pin B.7 .. B.0
+ 00135 #endif
+ 00136 #ifndef USER_LCD_PIN_CS0
+ 00137 #define USER_LCD_PIN_CS0 7
+ 00138 #endif
+ 00139 #if DEFAULT_IS_CARTRIDGE==0
+ 00140 #ifndef USER_LCD_PIN_CS1
+ 00141 #define USER_LCD_PIN_CS1 6
+ 00142 #endif
+ 00143 #ifndef USER_LCD_PIN_CS2
+ 00144 #define USER_LCD_PIN_CS2 5
+ 00145 #endif
+ 00146 #ifndef USER_LCD_PIN_CS3
+ 00147 #define USER_LCD_PIN_CS3 4
+ 00148 #endif
+ 00149 #endif
+ 00150
+ 00151 ;; --------------------------------------------------------------------------
+ 00152 ;; This function is called by MIOS when the custom LCD should be initialized
+ 00153 ;; In: MIOS_LCD_OPTION1 - contains the first LCD option given by MIOS_LCD_TypeSet
+ 00154 ;; MIOS_LCD_OPTION2 - contains the second LCD option given by MIOS_LCD_TypeSet
+ 00155 ;; Out: -
+ 00156 ;; --------------------------------------------------------------------------
+3300 00157 USER_LCD_Init
+ 00158 ;; notify that a graphical LCD has been connected
+3300 8600 00159 bsf MIOS_BOX_CFG0, MIOS_BOX_CFG0_USE_GLCD
+ 00160
+ 00161 ;movlw 100 ; 100 ms delay
+ 00162 ;call MIOS_Delay
+ 00163 ;; initialization sequence based on the example from the DOG datasheet
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 37
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3302 0E40 00164 movlw 0x40 ; 2 - Display start line = 0
+3304 D83D 00165 rcall USER_LCD_Cmd
+3306 0EA1 00166 movlw 0xA1 ; 8 - ADC Normal mode = 0
+3308 D83B 00167 rcall USER_LCD_Cmd
+330A 0EC0 00168 movlw 0xC0 ; 15 - COMS normal = 1/65 duty
+330C D839 00169 rcall USER_LCD_Cmd
+330E 0EA6 00170 movlw 0xA6 ; 9 - Display = normal
+3310 D837 00171 rcall USER_LCD_Cmd
+3312 0EA2 00172 movlw 0xA2 ; 11 - 1/65 duty 1/9 bias for 65x132 display
+3314 D835 00173 rcall USER_LCD_Cmd
+3316 0E2F 00174 movlw 0x2F ; 16 - Power control set = B.,R,F all ON
+3318 D833 00175 rcall USER_LCD_Cmd
+331A 0EF8 00176 movlw 0xF8 ; 20-1 - select Booster ratio set
+331C D831 00177 rcall USER_LCD_Cmd
+331E 0E00 00178 movlw 0x00 ; 20-2 - Booster ratio register
+3320 D82F 00179 rcall USER_LCD_Cmd ; (must be preceeded by 20-1)
+3322 0E27 00180 movlw 0x27 ; 17 - VO volt reg set
+3324 D82D 00181 rcall USER_LCD_Cmd
+3326 0E81 00182 movlw 0x81 ; 18-1 - Elect vol control - contrast
+3328 D82B 00183 rcall USER_LCD_Cmd
+332A 0E10 00184 movlw 0x10 ; 18-2 - Contrast level dec 22
+332C D829 00185 rcall USER_LCD_Cmd; (must be preceeded by 18-1)
+332E 0EAC 00186 movlw 0xAC ; 19-1 - Static Indicator - set off
+3330 D827 00187 rcall USER_LCD_Cmd
+3332 0E00 00188 movlw 0x00 ; 19-2 - No Indicator
+3334 D825 00189 rcall USER_LCD_Cmd; (must be preceeded with 19-1)
+3336 0EAF 00190 movlw 0xAF ; 20 - Display ON
+3338 D823 00191 rcall USER_LCD_Cmd
+ 00192
+ 00193
+ 00194 ;; clear display
+ 00195 rgoto USER_LCD_Clear
+333A D057 M bra label
+ 00196
+ 00197
+ 00198 ;; --------------------------------------------------------------------------
+ 00199 ;; FUNCTION: USER_LCD_Data
+ 00200 ;; DESCRIPTION: sends a data value to the LCD display.<BR>
+ 00201 ;; On CLCDs: branch directly to USER_LCD_PrintChar<BR>
+ 00202 ;; On GLCDs: ignore this function!
+ 00203 ;; IN: data which should be sent
+ 00204 ;; OUT: -
+ 00205 ;; --------------------------------------------------------------------------
+333C 00206 USER_LCD_Data
+ 00207 ;; store byte in buffer
+ 00208 SET_BSR MIOS_GLCD_BUFFER
+333C 0105 M movlb HIGH(reg)
+333E 6F70 00209 movwf MIOS_GLCD_BUFFER+0, BANKED
+ 00210 ;; data byte
+3340 9292 00211 bcf USER_LCD_TRIS_DC, USER_LCD_PIN_DC
+3342 8289 00212 bsf USER_LCD_LAT_DC, USER_LCD_PIN_DC
+ 00213
+ 00214 ;; deselect all CS
+3344 9693 00215 bcf USER_LCD_TRIS_CS, USER_LCD_PIN_CS0
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 38
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3346 868A 00216 bsf USER_LCD_LAT_CS, USER_LCD_PIN_CS0
+ 00217 #ifdef USER_LCD_PIN_CS1
+ 00218 bcf USER_LCD_TRIS_CS, USER_LCD_PIN_CS1
+ 00219 bsf USER_LCD_LAT_CS, USER_LCD_PIN_CS1
+ 00220 #endif
+ 00221 #ifdef USER_LCD_PIN_CS2
+ 00222 bcf USER_LCD_TRIS_CS, USER_LCD_PIN_CS2
+ 00223 bsf USER_LCD_LAT_CS, USER_LCD_PIN_CS2
+ 00224 #endif
+ 00225 #ifdef USER_LCD_PIN_CS3
+ 00226 bcf USER_LCD_TRIS_CS, USER_LCD_PIN_CS3
+ 00227 bsf USER_LCD_LAT_CS, USER_LCD_PIN_CS3
+ 00228 #endif
+ 00229
+ 00230 ;; select display depending on current cursor position
+ 00231 ;; THIS PART COULD BE CHANGED FOR DIFFERENT DISPLAY CONFIGURATIONS
+ 00232 ;;
+3348 00233 USER_LCD_Data_CS
+3348 0E07 00234 movlw 1*8-1
+334A 657C 00235 cpfsgt MIOS_GLCD_GCURSOR_Y, BANKED
+ 00236 rgoto USER_LCD_Data_CS_BANKA
+334C D007 M bra label
+334E 0E0F 00237 movlw 2*8-1
+3350 657C 00238 cpfsgt MIOS_GLCD_GCURSOR_Y, BANKED
+ 00239
+3352 00240 USER_LCD_Data_CS_BANKB
+3352 0E7F 00241 movlw 1*128-1
+3354 657B 00242 cpfsgt MIOS_GLCD_GCURSOR_X, BANKED
+ 00243 rgoto USER_LCD_Data_CS_BANKB_LOW
+3356 D001 M bra label
+3358 00244 USER_LCD_Data_CS_BANKB_HIGH
+ 00245 #ifdef USER_LCD_PIN_CS3
+ 00246 bcf USER_LCD_LAT_CS, USER_LCD_PIN_CS3
+ 00247 #endif
+ 00248 rgoto USER_LCD_Data_CS_Done
+3358 D006 M bra label
+335A 00249 USER_LCD_Data_CS_BANKB_LOW
+ 00250 #ifdef USER_LCD_PIN_CS2
+ 00251 bcf USER_LCD_LAT_CS, USER_LCD_PIN_CS2
+ 00252 #endif
+ 00253 rgoto USER_LCD_Data_CS_Done
+335A D005 M bra label
+ 00254
+335C 00255 USER_LCD_Data_CS_BANKA
+335C 0E7F 00256 movlw 1*128-1
+335E 657B 00257 cpfsgt MIOS_GLCD_GCURSOR_X, BANKED
+ 00258 rgoto USER_LCD_Data_CS_BANKA_LOW
+3360 D001 M bra label
+3362 00259 USER_LCD_Data_CS_BANKA_HIGH
+ 00260 #ifdef USER_LCD_PIN_CS1
+ 00261 bcf USER_LCD_LAT_CS, USER_LCD_PIN_CS1
+ 00262 #endif
+ 00263 rgoto USER_LCD_Data_CS_Done
+3362 D001 M bra label
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 39
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3364 00264 USER_LCD_Data_CS_BANKA_LOW
+3364 968A 00265 bcf USER_LCD_LAT_CS, USER_LCD_PIN_CS0
+ 00266 ;rgoto USER_LCD_Data_CS_Done
+ 00267
+3366 00268 USER_LCD_Data_CS_Done
+ 00269 ;; transfer data to display
+3366 5170 00270 movf MIOS_GLCD_BUFFER+0, W, BANKED
+3368 D812 00271 rcall USER_LCD_ShiftByte
+ 00272 ;; increment graphical cursor
+ 00273 SET_BSR MIOS_GLCD_GCURSOR_X;
+336A 0105 M movlb HIGH(reg)
+336C 2B7B 00274 incf MIOS_GLCD_GCURSOR_X, F, BANKED
+ 00275 ;; deselect displays
+ 00276 #ifdef USER_LCD_PIN_CS0
+336E 868A 00277 bsf USER_LCD_LAT_CS, USER_LCD_PIN_CS0
+ 00278 #endif
+ 00279 #ifdef USER_LCD_PIN_CS1
+ 00280 bsf USER_LCD_LAT_CS, USER_LCD_PIN_CS1
+ 00281 #endif
+ 00282 #ifdef USER_LCD_PIN_CS2
+ 00283 bsf USER_LCD_LAT_CS, USER_LCD_PIN_CS2
+ 00284 #endif
+ 00285 #ifdef USER_LCD_PIN_CS3
+ 00286 bsf USER_LCD_LAT_CS, USER_LCD_PIN_CS3
+ 00287 #endif
+ 00288
+ 00289 ;; if new X position reached, set LCD cursor of all displays to 0
+3370 00290 USER_LCD_Data_RstTst2
+3370 517B 00291 movf MIOS_GLCD_GCURSOR_X, W, BANKED
+3372 0A7F 00292 xorlw 1*128-1
+3374 E004 00293 bz USER_LCD_Data_Rst
+3376 517B 00294 movf MIOS_GLCD_GCURSOR_X, W, BANKED
+3378 0AFF 00295 xorlw 2*128-1
+337A E001 00296 bz USER_LCD_Data_Rst
+337C 0012 00297 return
+ 00298
+337E 00299 USER_LCD_Data_Rst
+337E 0E80 00300 movlw 0x80
+ 00301 ;;rgoto USER_LCD_Cmd
+ 00302
+ 00303 ;; --------------------------------------------------------------------------
+ 00304 ;; FUNCTION: USER_LCD_Cmd
+ 00305 ;; DESCRIPTION: sends a command to the LCD display.<BR>
+ 00306 ;; On CLCDs: use this function to decode the HD44780 commands if required<BR>
+ 00307 ;; On GLCDs: ignore this function!
+ 00308 ;; IN: command which should be sent
+ 00309 ;; OUT: -
+ 00310 ;; --------------------------------------------------------------------------
+3380 00311 USER_LCD_Cmd
+ 00312 ;; command byte
+3380 9292 00313 bcf USER_LCD_TRIS_DC, USER_LCD_PIN_DC
+3382 9289 00314 bcf USER_LCD_LAT_DC, USER_LCD_PIN_DC
+ 00315 ;; select all LCDs
+3384 9693 00316 bcf USER_LCD_TRIS_CS, USER_LCD_PIN_CS0
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 40
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3386 968A 00317 bcf USER_LCD_LAT_CS, USER_LCD_PIN_CS0
+ 00318 #ifdef USER_LCD_PIN_CS1
+ 00319 bcf USER_LCD_TRIS_CS, USER_LCD_PIN_CS1
+ 00320 bcf USER_LCD_LAT_CS, USER_LCD_PIN_CS1
+ 00321 #endif
+ 00322 #ifdef USER_LCD_PIN_CS2
+ 00323 bcf USER_LCD_TRIS_CS, USER_LCD_PIN_CS2
+ 00324 bcf USER_LCD_LAT_CS, USER_LCD_PIN_CS2
+ 00325 #endif
+ 00326 #ifdef USER_LCD_PIN_CS3
+ 00327 bcf USER_LCD_TRIS_CS, USER_LCD_PIN_CS3
+ 00328 bcf USER_LCD_LAT_CS, USER_LCD_PIN_CS3
+ 00329 #endif
+ 00330 ;; transfer command to display
+3388 D802 00331 rcall USER_LCD_ShiftByte
+ 00332 ;; deselect displays and exit
+338A 868A 00333 bsf USER_LCD_LAT_CS, USER_LCD_PIN_CS0
+ 00334 #ifdef USER_LCD_PIN_CS1
+ 00335 bsf USER_LCD_LAT_CS, USER_LCD_PIN_CS1
+ 00336 #endif
+ 00337 #ifdef USER_LCD_PIN_CS2
+ 00338 bsf USER_LCD_LAT_CS, USER_LCD_PIN_CS2
+ 00339 #endif
+ 00340 #ifdef USER_LCD_PIN_CS3
+ 00341 bsf USER_LCD_LAT_CS, USER_LCD_PIN_CS3
+ 00342 #endif
+338C 0012 00343 return
+ 00344
+ 00345 ;; --------------------------------------------------------------------------
+ 00346 ;; This function is NOT called by MIOS, but only used by the custom driver
+ 00347 ;; to transfer a data/command byte
+ 00348 ;; In: WREG - data/command byte
+ 00349 ;; chip select lines must be set before calling this function!
+ 00350 ;; Out: -
+ 00351 ;; --------------------------------------------------------------------------
+338E 00352 USER_LCD_ShiftByte
+338E 9692 00353 bcf USER_LCD_TRIS_SCLK, USER_LCD_PIN_SCLK
+3390 9492 00354 bcf USER_LCD_TRIS_SDA, USER_LCD_PIN_SDA
+ 00355
+ 00356 USER_LCD_ShiftByte_HLP MACRO bit
+ 00357 bsf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; rising clock edge
+ 00358 ;btfss WREG, bit
+ 00359 bcf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA ; set SDA depending on current MSB
+ 00360 btfsc WREG, bit
+ 00361 bsf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA
+ 00362 bcf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; falling clock edge
+ 00363 ENDM
+ 00364
+ 00365 USER_LCD_ShiftByte_HLP 7
+3392 8689 M bsf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; rising clock edge
+ M ;btfss WREG, bit
+3394 9489 M bcf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA ; set SDA depending on current MSB
+3396 BEE8 M btfsc WREG, bit
+3398 8489 M bsf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 41
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+339A 9689 M bcf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; falling clock edge
+ 00366 USER_LCD_ShiftByte_HLP 6
+339C 8689 M bsf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; rising clock edge
+ M ;btfss WREG, bit
+339E 9489 M bcf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA ; set SDA depending on current MSB
+33A0 BCE8 M btfsc WREG, bit
+33A2 8489 M bsf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA
+33A4 9689 M bcf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; falling clock edge
+ 00367 USER_LCD_ShiftByte_HLP 5
+33A6 8689 M bsf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; rising clock edge
+ M ;btfss WREG, bit
+33A8 9489 M bcf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA ; set SDA depending on current MSB
+33AA BAE8 M btfsc WREG, bit
+33AC 8489 M bsf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA
+33AE 9689 M bcf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; falling clock edge
+ 00368 USER_LCD_ShiftByte_HLP 4
+33B0 8689 M bsf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; rising clock edge
+ M ;btfss WREG, bit
+33B2 9489 M bcf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA ; set SDA depending on current MSB
+33B4 B8E8 M btfsc WREG, bit
+33B6 8489 M bsf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA
+33B8 9689 M bcf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; falling clock edge
+ 00369 USER_LCD_ShiftByte_HLP 3
+33BA 8689 M bsf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; rising clock edge
+ M ;btfss WREG, bit
+33BC 9489 M bcf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA ; set SDA depending on current MSB
+33BE B6E8 M btfsc WREG, bit
+33C0 8489 M bsf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA
+33C2 9689 M bcf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; falling clock edge
+ 00370 USER_LCD_ShiftByte_HLP 2
+33C4 8689 M bsf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; rising clock edge
+ M ;btfss WREG, bit
+33C6 9489 M bcf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA ; set SDA depending on current MSB
+33C8 B4E8 M btfsc WREG, bit
+33CA 8489 M bsf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA
+33CC 9689 M bcf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; falling clock edge
+ 00371 USER_LCD_ShiftByte_HLP 1
+33CE 8689 M bsf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; rising clock edge
+ M ;btfss WREG, bit
+33D0 9489 M bcf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA ; set SDA depending on current MSB
+33D2 B2E8 M btfsc WREG, bit
+33D4 8489 M bsf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA
+33D6 9689 M bcf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; falling clock edge
+ 00372 USER_LCD_ShiftByte_HLP 0
+33D8 8689 M bsf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; rising clock edge
+ M ;btfss WREG, bit
+33DA 9489 M bcf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA ; set SDA depending on current MSB
+33DC B0E8 M btfsc WREG, bit
+33DE 8489 M bsf USER_LCD_LAT_SDA, USER_LCD_PIN_SDA
+33E0 9689 M bcf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; falling clock edge
+33E2 0000 00373 nop
+33E4 8689 00374 bsf USER_LCD_LAT_SCLK, USER_LCD_PIN_SCLK ; rising clock edge
+ 00375
+33E6 0012 00376 return
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 42
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00377
+ 00378
+ 00379 ;; --------------------------------------------------------------------------
+ 00380 ;; Determine Chip Select Line
+ 00381 ;; --------------------------------------------------------------------------
+33E8 00382 USER_LCD_DetermineCS
+33E8 0012 00383 return
+ 00384
+ 00385 ;; --------------------------------------------------------------------------
+ 00386 ;; This function is called by MIOS when the custom LCD should be cleared
+ 00387 ;; In: MIOS_LCD_OPTION1 - contains the first LCD option given by MIOS_LCD_TypeSet
+ 00388 ;; MIOS_LCD_OPTION2 - contains the second LCD option given by MIOS_LCD_TypeSet
+ 00389 ;; Out: -
+ 00390 ;; --------------------------------------------------------------------------
+33EA 00391 USER_LCD_Clear
+ 00392 SET_BSR MIOS_GLCD_GCURSOR_Y ; 8 lines to clear
+33EA 0105 M movlb HIGH(reg)
+33EC 6B7C 00393 clrf MIOS_GLCD_GCURSOR_Y, BANKED
+33EE 00394 USER_LCD_ClearOuterLoop
+ 00395
+ 00396 SET_BSR MIOS_GLCD_GCURSOR_X ; 128 columns to clear
+33EE 0105 M movlb HIGH(reg)
+33F0 6B7B 00397 clrf MIOS_GLCD_GCURSOR_X, BANKED
+33F2 D812 00398 rcall USER_LCD_CursorSet
+ 00399
+ 00400 ;; data bytes
+33F4 9292 00401 bcf USER_LCD_TRIS_DC, USER_LCD_PIN_DC
+33F6 8289 00402 bsf USER_LCD_LAT_DC, USER_LCD_PIN_DC
+ 00403 ;; select all LCDs
+33F8 9693 00404 bcf USER_LCD_TRIS_CS, USER_LCD_PIN_CS0
+33FA 968A 00405 bcf USER_LCD_LAT_CS, USER_LCD_PIN_CS0
+ 00406 #ifdef USER_LCD_PIN_CS1
+ 00407 bcf USER_LCD_TRIS_CS, USER_LCD_PIN_CS1
+ 00408 bcf USER_LCD_LAT_CS, USER_LCD_PIN_CS1
+ 00409 #endif
+ 00410 #ifdef USER_LCD_PIN_CS2
+ 00411 bcf USER_LCD_TRIS_CS, USER_LCD_PIN_CS2
+ 00412 bcf USER_LCD_LAT_CS, USER_LCD_PIN_CS2
+ 00413 #endif
+ 00414 #ifdef USER_LCD_PIN_CS3
+ 00415 bcf USER_LCD_TRIS_CS, USER_LCD_PIN_CS3
+ 00416 bcf USER_LCD_LAT_CS, USER_LCD_PIN_CS3
+ 00417 #endif
+33FC 00418 USER_LCD_ClearInnerLoop
+ 00419 ;; transfer 0x00 to display
+33FC 0E00 00420 movlw 0x00
+33FE DFC7 00421 rcall USER_LCD_ShiftByte
+ 00422 ;; increment graphical cursor
+ 00423 SET_BSR MIOS_GLCD_GCURSOR_X ;
+3400 0105 M movlb HIGH(reg)
+3402 2B7B 00424 incf MIOS_GLCD_GCURSOR_X, F, BANKED
+3404 0E7F 00425 movlw 128-1
+3406 657B 00426 cpfsgt MIOS_GLCD_GCURSOR_X, BANKED
+ 00427 rgoto USER_LCD_ClearInnerLoop
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 43
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3408 D7F9 M bra label
+ 00428
+340A 2B7C 00429 incf MIOS_GLCD_GCURSOR_Y, F, BANKED
+340C 0E07 00430 movlw 8-1
+340E 657C 00431 cpfsgt MIOS_GLCD_GCURSOR_Y, BANKED
+ 00432 rgoto USER_LCD_ClearOuterLoop
+3410 D7EE M bra label
+ 00433
+ 00434 ;; set cursor to 0 and exit
+3412 0E00 00435 movlw 0x00
+3414 EF88 F016 00436 goto MIOS_LCD_CursorSet
+ 00437
+ 00438
+ 00439 ;; --------------------------------------------------------------------------
+ 00440 ;; This function is called by MIOS when the cursor should be changed
+ 00441 ;; In: MIOS_LCD_OPTION1 - contains the first LCD option given by MIOS_LCD_TypeSet
+ 00442 ;; MIOS_LCD_OPTION2 - contains the second LCD option given by MIOS_LCD_TypeSet
+ 00443 ;; MIOS_GLCD_CURSOR_X - horizontal cursor position (for GLCDs)
+ 00444 ;; MIOS_GLCD_CURSOR_Y - vertical cursor position (for GLCDs)
+ 00445 ;; MIOS_LCD_CURSOR_POS - character cursor position (for CLCDs)
+ 00446 ;; Out: -
+ 00447 ;; --------------------------------------------------------------------------
+3418 00448 USER_LCD_CursorSet
+ 00449 rgoto USER_LCD_GCursorSet
+3418 D000 M bra label
+ 00450
+ 00451
+ 00452 ;; --------------------------------------------------------------------------
+ 00453 ;; This function is NOT called by MIOS, but only used by the custom driver
+ 00454 ;; to set the cursor positions
+ 00455 ;; In: graphical cursor position in MIOS_GLCD_GCURSOR_X and MIOS_GLCD_GCURSOR_Y
+ 00456 ;; Out: -
+ 00457 ;; --------------------------------------------------------------------------
+341A 00458 USER_LCD_GCursorSet
+ 00459
+ 00460 ;; Set X position, wrap at 128 (LCD X cursor must be less than 128!)
+ 00461 SET_BSR MIOS_GLCD_GCURSOR_X
+341A 0105 M movlb HIGH(reg)
+341C 517B 00462 movf MIOS_GLCD_GCURSOR_X, W, BANKED
+341E 6F70 00463 movwf MIOS_GLCD_BUFFER+0, BANKED
+3420 0E7F 00464 movlw 128-1
+3422 6570 00465 cpfsgt MIOS_GLCD_BUFFER+0, BANKED
+ 00466 rgoto USER_LCD_GCursorSet_X_Cont
+3424 D007 M bra label
+3426 0E80 00467 movlw -128
+3428 2770 00468 addwf MIOS_GLCD_BUFFER+0, F, BANKED
+342A 0E7F 00469 movlw 128-1
+342C 6570 00470 cpfsgt MIOS_GLCD_BUFFER+0, BANKED
+ 00471 rgoto USER_LCD_GCursorSet_X_Cont
+342E D002 M bra label
+3430 0E80 00472 movlw -128
+3432 2770 00473 addwf MIOS_GLCD_BUFFER+0, F, BANKED
+ 00474
+3434 00475 USER_LCD_GCursorSet_X_Cont
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 44
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00476 ; First remove 4 LSB and send
+ 00477 ; Then remove 4 MSB and send
+3434 3970 00478 swapf MIOS_GLCD_BUFFER+0, W, BANKED ; Swap bottom 4 bits with top 4
+3436 0B0F 00479 andlw 0x0f ; Mask out top 4 bits (actually bottom 4!)
+3438 0910 00480 iorlw 0x10 ; Column address set upper bit
+343A DFA2 00481 rcall USER_LCD_Cmd
+343C 5170 00482 movf MIOS_GLCD_BUFFER+0, W, BANKED
+343E 0B0F 00483 andlw 0x0f ; Mask out top 4 bits
+3440 DF9F 00484 rcall USER_LCD_Cmd
+ 00485
+ 00486
+ 00487 ;; Set Y position, wrap at 8 (LCD Y cursor must be less than 8!)
+3442 517C 00488 movf MIOS_GLCD_GCURSOR_Y, W, BANKED
+3444 6F70 00489 movwf MIOS_GLCD_BUFFER+0, BANKED
+3446 0E07 00490 movlw 8-1
+3448 6570 00491 cpfsgt MIOS_GLCD_BUFFER+0, BANKED
+ 00492 rgoto USER_LCD_GCursorSet_Y_Cont
+344A D00C M bra label
+344C 0EF8 00493 movlw -8
+344E 2770 00494 addwf MIOS_GLCD_BUFFER+0, F, BANKED
+3450 0E07 00495 movlw 8-1
+3452 6570 00496 cpfsgt MIOS_GLCD_BUFFER+0, BANKED
+ 00497 rgoto USER_LCD_GCursorSet_Y_Cont
+3454 D007 M bra label
+3456 0EF8 00498 movlw -8
+3458 2770 00499 addwf MIOS_GLCD_BUFFER+0, F, BANKED
+345A 0E07 00500 movlw 8-1
+345C 6570 00501 cpfsgt MIOS_GLCD_BUFFER+0, BANKED
+ 00502 rgoto USER_LCD_GCursorSet_Y_Cont
+345E D002 M bra label
+3460 0EF8 00503 movlw -8
+3462 2770 00504 addwf MIOS_GLCD_BUFFER+0, F, BANKED
+3464 00505 USER_LCD_GCursorSet_Y_Cont
+3464 5170 00506 movf MIOS_GLCD_BUFFER+0, W, BANKED
+3466 09B0 00507 iorlw 0xb0 ; Display Column H=W+0xb0 (select bank+line)
+ 00508 rgoto USER_LCD_Cmd
+3468 D78B M bra label
+ 00509
+ 00510
+ 00511
+ 00512
+ 00513 ;; --------------------------------------------------------------------------
+ 00514 ;; This function is called by MIOS when a character should be print
+ 00515 ;; In: WREG - character
+ 00516 ;; all other MIOS_*LCD_* registers
+ 00517 ;; Out: GLCDs should justify the X/Y cursor position
+ 00518 ;; --------------------------------------------------------------------------
+346A 00519 USER_LCD_PrintChar
+ 00520 ;; calc offset address to character
+ 00521 SET_BSR MIOS_GLCD_TMP1
+346A 0105 M movlb HIGH(reg)
+346C 6F85 00522 movwf MIOS_GLCD_TMP1, BANKED
+ 00523
+ 00524 ;; how much bytes per character?
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 45
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+346E 5180 00525 movf MIOS_GLCD_FONT_OFFSET, W, BANKED
+3470 037E 00526 mulwf MIOS_GLCD_FONT_HEIGHT, BANKED
+ 00527
+ 00528 ;; multiply with character value
+3472 5185 00529 movf MIOS_GLCD_TMP1, W, BANKED
+3474 02F3 00530 mulwf PRODL
+ 00531
+3476 CFF6 F585 00532 movff TBLPTRL, MIOS_GLCD_TMP1 ; store current TBLPTR in temp. register
+347A CFF7 F586 00533 movff TBLPTRH, MIOS_GLCD_TMP2
+ 00534
+347E 5181 00535 movf MIOS_GLCD_FONT_PTRL, W, BANKED
+3480 257F 00536 addwf MIOS_GLCD_FONT_X0, W, BANKED
+3482 24F3 00537 addwf PRODL, W
+3484 6EF6 00538 movwf TBLPTRL
+3486 5182 00539 movf MIOS_GLCD_FONT_PTRH, W, BANKED
+3488 20F4 00540 addwfc PRODH, W
+348A 6EF7 00541 movwf TBLPTRH
+ 00542
+348C 517E 00543 movf MIOS_GLCD_FONT_HEIGHT, W, BANKED
+348E 6EE2 00544 movwf FSR1H
+ 00545
+ 00546
+ 00547
+3490 00548 USER_LCD_PrintCharOuterLoop
+3490 517D 00549 movf MIOS_GLCD_FONT_WIDTH, W, BANKED
+3492 6EE1 00550 movwf FSR1L
+3494 00551 USER_LCD_PrintCharLoop
+3494 0009 00552 tblrd*+ ; read from flash and increment table pointer
+3496 50F5 00553 movf TABLAT, W ; get result
+3498 DF51 00554 rcall USER_LCD_Data ; write out
+349A 2EE1 00555 decfsz FSR1L, F ; loop until zero
+ 00556 rgoto USER_LCD_PrintCharLoop
+349C D7FB M bra label
+ 00557
+349E 4EE2 00558 dcfsnz FSR1H, F
+ 00559 rgoto USER_LCD_PrintCharLoop_End
+34A0 D00C M bra label
+ 00560
+34A2 517D 00561 movf MIOS_GLCD_FONT_WIDTH, W, BANKED
+34A4 5D80 00562 subwf MIOS_GLCD_FONT_OFFSET, W, BANKED
+34A6 E004 00563 bz USER_LCD_PrintCharFixLoopEnd
+34A8 6EE1 00564 movwf FSR1L
+34AA 00565 USER_LCD_PrintCharFixLoop
+34AA 0009 00566 tblrd*+
+34AC 2EE1 00567 decfsz FSR1L, F
+ 00568 rgoto USER_LCD_PrintCharFixLoop
+34AE D7FD M bra label
+ 00569
+34B0 00570 USER_LCD_PrintCharFixLoopEnd
+ 00571
+34B0 2B7C 00572 incf MIOS_GLCD_GCURSOR_Y, F, BANKED
+34B2 517D 00573 movf MIOS_GLCD_FONT_WIDTH, W, BANKED
+34B4 5F7B 00574 subwf MIOS_GLCD_GCURSOR_X, F, BANKED
+34B6 DFB1 00575 rcall USER_LCD_GCursorSet
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 46
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00576
+ 00577 rgoto USER_LCD_PrintCharOuterLoop
+34B8 D7EB M bra label
+ 00578
+34BA 00579 USER_LCD_PrintCharLoop_End
+34BA 057E 00580 decf MIOS_GLCD_FONT_HEIGHT, W, BANKED
+34BC E004 00581 bz USER_LCD_PrintChar_NoYFix
+34BE 1D7E 00582 comf MIOS_GLCD_FONT_HEIGHT, W, BANKED
+34C0 0F02 00583 addlw 2
+34C2 277C 00584 addwf MIOS_GLCD_GCURSOR_Y, F, BANKED
+34C4 DFAA 00585 rcall USER_LCD_GCursorSet
+34C6 00586 USER_LCD_PrintChar_NoYFix
+34C6 C585 FFF6 00587 movff MIOS_GLCD_TMP1, TBLPTRL ; restore TBLPTR from temp. register
+34CA C586 FFF7 00588 movff MIOS_GLCD_TMP2, TBLPTRH
+34CE 0012 00589 return
+ 00590
+ 00591
+ 00592 ;; --------------------------------------------------------------------------
+ 00593 ;; FUNCTION: USER_LCD_SpecialCharInit
+ 00594 ;; DESCRIPTION: see MIOS_CLCD_SpecialCharInit
+ 00595 ;; IN: number of special character (0-7) in WREG
+ 00596 ;; pointer to special char pattern in TBLPTR (consists of 8
+ 00597 ;; entries for every character-line)
+ 00598 ;; OUT: TBLPTR has to be set to next table entry (TBLPTR+=8)
+ 00599 ;; --------------------------------------------------------------------------
+34D0 00600 USER_LCD_SpecialCharInit
+ 00601 ;; not used by this driver
+34D0 0012 00602 return
+ 00046
+ 00047 ;; ==========================================================================
+ 00048 ;; All MIOS hooks in one file
+ 00049 ;; ==========================================================================
+ 00050
+ 00051 ;; --------------------------------------------------------------------------
+ 00052 ;; This function is called by MIOS after startup to initialize the
+ 00053 ;; application
+ 00054 ;; --------------------------------------------------------------------------
+34D2 00055 USER_Init
+ 00056 ;; initialize application specific variables
+34D2 6A10 00057 clrf TIA_STAT
+34D4 6A21 00058 clrf TIA_SYSEX_STATE
+34D6 6A22 00059 clrf TIA_SYSEX_ACTION
+34D8 6819 00060 setf TIA_BANKSTICK_CHK_CTR ; (we have to start with BS0 in TIA_BANK_CheckStick)
+ 00061
+ 00062 ;; initialize the timer for the TIA_SW handler
+34DA 0EFE 00063 movlw 8190 & 0xff ; every 819 us
+34DC 6E03 00064 movwf MIOS_PARAMETER1
+34DE 0E1F 00065 movlw 8190 >> 8
+34E0 6E04 00066 movwf MIOS_PARAMETER2
+34E2 0E00 00067 movlw 0x00 ; prescaler 1:1
+34E4 ECBC F016 00068 call MIOS_TIMER_Init
+ 00069
+ 00070 ;; initialize the MBHP_TIA module
+34E8 EC71 F01F 00071 call TIA_SR_Init
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 47
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00072
+ 00073
+ 00074 ;; init patch
+34EC 6A13 00075 clrf TIA_PATCH
+34EE 6A14 00076 clrf TIA_PBANK
+34F0 ECCE F01B 00077 call TIA_PATCH_Init
+ 00078
+ 00079
+ 00080 ;; initialize the shift registers
+34F4 0E01 00081 movlw 0x01 ; use only first register (maximum would be 16!)
+34F6 EC78 F016 00082 call MIOS_SRIO_NumberSet
+34FA 0E01 00083 movlw 0x01 ; set update frequncy
+34FC EC80 F016 00084 call MIOS_SRIO_UpdateFrqSet
+3500 0E00 00085 movlw 0x00 ; disable touch sensor
+3502 EC7C F016 00086 call MIOS_SRIO_TS_SensitivitySet
+ 00087
+ 00088 #if TIA_LEDMTR_ENABLE
+3506 EC5A F01B 00089 call TIA_LEDMTR_Init
+ 00090 #endif
+ 00091
+ 00092 ;; initialize J5 for driving LEDs if enabled
+ 00093 #if ENABLE_J5
+ 00094 movlw 0x00
+ 00095 call J5_IO_Init
+ 00096 #endif
+ 00097
+350A 0E0F 00098 movlw 0x0f ; all newer PIC18F derivatives (like PIC18F4685) all pin digits
+350C 6EC1 00099 movwf ADCON1
+350E 0E07 00100 movlw 07h
+3510 6EB4 00101 movwf CMCON
+ 00102
+ 00103 #if MIDI_RXTX_USE_IO
+3512 EC0B F01B 00104 call MIDI_RXTX_IO_Init
+ 00105 #endif
+ 00106
+ 00107 #if ENABLE_AIN_LFO_WAVEFORM
+ 00108 movlw 0x06 ; enable the first 6 analog inputs
+ 00109 call MIOS_AIN_NumberSet
+ 00110 call MIOS_AIN_UnMuxed ; not multiplexed
+ 00111 movlw 0x03 ; 8 bit resolution
+ 00112 #endif
+ 00113
+ 00114 ;; set MB_STAT_DISPLAY_GLCD type
+3516 6A03 00115 clrf MIOS_PARAMETER1
+3518 6A04 00116 clrf MIOS_PARAMETER2
+351A 0E07 00117 movlw 0x07
+351C ECA4 F016 00118 call MIOS_LCD_TypeSet
+ 00119
+ 00120 ;; initialize the AOUT module
+ 00121 ;call AOUT_Init
+ 00122
+ 00123 ;; initialize the integrated MIDI merger
+3520 0E00 00124 movlw MIOS_MIDI_MERGER_DISABLED ; should be disabled for a synthesizer
+3522 EC14 F016 00125 call MIOS_MIDI_MergerSet
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 48
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00126
+3526 0012 00127 return
+ 00128
+ 00129
+ 00130
+ 00131 ;; --------------------------------------------------------------------------
+ 00132 ;; This function is called by MIOS in the mainloop when nothing else is to do
+ 00133 ;; --------------------------------------------------------------------------
+3528 00134 USER_Tick
+ 00135
+ 00136 ;; ---[ check BankStick status ]---
+3528 ECCC F01C 00137 call TIA_BANK_CheckStick
+ 00138
+ 00139 ;; ---[ update AOUTs channels (if enabled) ]---
+ 00140 ; IRQ_DISABLE
+ 00141 ; call AOUT_Update
+ 00142 ; IRQ_ENABLE
+ 00143
+ 00144 ;; ---[ call TIA shift register handler ]---
+352C EC7F F01F 00145 call TIA_SR_Handler
+ 00146
+ 00147 ;; ---[ handle with CC dump reuqests ]---
+3530 EC1D F02F 00148 call TIA_CCOUT_Handler
+ 00149
+ 00150
+ 00151
+3534 0012 00152 return
+ 00153
+ 00154
+ 00155 ;; --------------------------------------------------------------------------
+ 00156 ;; This function is periodically called by MIOS. The frequency has to be
+ 00157 ;; initialized with MIOS_Timer_Set
+ 00158 ;; Note that this is an interrupt service routine! Use FSR2 instead of FSR0
+ 00159 ;; and IRQ_TMPx instead of TMPx -- and make the routine as fast as possible!
+ 00160 ;; --------------------------------------------------------------------------
+3536 00161 USER_Timer
+ 00162
+ 00163 ;; ---[ call Software TIA Handler ]---
+3536 EC37 F020 00164 call TIA_SW_Handler
+ 00165
+353A 0012 00166 return
+ 00167
+ 00168 ;; --------------------------------------------------------------------------
+ 00169 ;; This function is called by MIOS when a debug command has been received
+ 00170 ;; via SysEx
+ 00171 ;; Input:
+ 00172 ;; o WREG, MIOS_PARAMETER1, MIOS_PARAMETER2, MIOS_PARAMETER3 like
+ 00173 ;; specified in the debug command
+ 00174 ;; Output:
+ 00175 ;; o return values WREG, MIOS_PARAMETER1, MIOS_PARAMETER2, MIOS_PARAMETER3
+ 00176 ;; --------------------------------------------------------------------------
+353C 00177 USER_MPROC_DebugTrigger
+353C 0012 00178 return
+ 00179
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 49
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00180
+ 00181 ;; --------------------------------------------------------------------------
+ 00182 ;; This function is called by MIOS when the display content should be
+ 00183 ;; initialized. Thats the case during startup and after a temporary message
+ 00184 ;; has been printed on the screen
+ 00185 ;; --------------------------------------------------------------------------
+353E 00186 TEXT_WELCOME_0 STRING 20, 0x00, MBTIA_VERSION_STR
+353E 1400 494D M da ((length) << 8) | (pos), str
+ 4944 6F62
+ 5478 4149
+ 5620 2E31
+ 6562 6174
+ 2020
+3554 00187 TEXT_WELCOME_10 STRING 16, 0x40, "Launching CS "
+3554 1040 614C M da ((length) << 8) | (pos), str
+ 6E75 6863
+ 6E69 2067
+ 5343 2020
+ 2020
+3566 00188 USER_DISPLAY_Init
+ 00189 ;; clear screen
+3566 EC82 F016 00190 call MIOS_LCD_Clear
+ 00191
+ 00192 TABLE_ADDR TEXT_WELCOME_0 ; print welcome message
+356A 0E3E M movlw LOW(addr) ; store Lo Byte
+356C 6EF6 M movwf TBLPTRL
+356E 0E35 M movlw HIGH(addr) ; store Hi Byte
+3570 6EF7 M movwf TBLPTRH
+ M #if PIC_DERIVATIVE_CODE_SIZE > 0x10000
+3572 0E00 M movlw UPPER(addr) ; store Upper Byte
+3574 6EF8 M movwf TBLPTRU
+ M #endif
+3576 EC9E F016 00193 call MIOS_LCD_PrintString ; first line
+ 00194 TABLE_ADDR TEXT_WELCOME_10 ; print welcome message
+357A 0E54 M movlw LOW(addr) ; store Lo Byte
+357C 6EF6 M movwf TBLPTRL
+357E 0E35 M movlw HIGH(addr) ; store Hi Byte
+3580 6EF7 M movwf TBLPTRH
+ M #if PIC_DERIVATIVE_CODE_SIZE > 0x10000
+3582 0E00 M movlw UPPER(addr) ; store Upper Byte
+3584 6EF8 M movwf TBLPTRU
+ M #endif
+3586 EC9E F016 00195 call MIOS_LCD_PrintString ; first line
+358A 0012 00196 return
+ 00197
+ 00198 ;; --------------------------------------------------------------------------
+ 00199 ;; This function is called in the mainloop when no temporary message is shown
+ 00200 ;; on screen. Print the realtime messages here
+ 00201 ;; --------------------------------------------------------------------------
+ 00202
+358C 00203 USER_DISPLAY_Tick
+ 00204
+ 00205
+ 00206 ;; call MIDI RxTx handler and exit
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 50
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+358C EC1F F01B 00207 call MIDI_RXTX_Handler
+ 00208
+ 00209 #if TIA_LEDMTR_ENABLE
+3590 EC5D F01B 00210 call TIA_LEDMTR_Handler
+ 00211 #endif
+ 00212
+ 00213
+ 00214
+3594 0012 00215 return
+ 00216
+ 00217 ;; --------------------------------------------------------------------------
+ 00218 ;; This function is called by MIOS when a complete MIDI event has been received
+ 00219 ;; Input:
+ 00220 ;; o first MIDI event byte in MIOS_PARAMETER1
+ 00221 ;; o second MIDI event byte in MIOS_PARAMETER2
+ 00222 ;; o third MIDI event byte in MIOS_PARAMETER3
+ 00223 ;; --------------------------------------------------------------------------
+3596 00224 USER_MPROC_NotifyReceivedEvent
+ 00225 ;; branch to ReceiveEvent function of TIA synth
+ 00226
+3596 EF4E F027 00227 goto TIA_MIDI_NotifyReceivedEvent
+ 00228
+359A 0012 00229 return
+ 00230
+ 00231 ;; --------------------------------------------------------------------------
+ 00232 ;; This function is called by MIOS when a MIDI event has been received
+ 00233 ;; which has been specified in the CONFIG_MIDI_IN table
+ 00234 ;; Input:
+ 00235 ;; o number of entry in WREG
+ 00236 ;; o first MIDI event byte in MIOS_PARAMETER1
+ 00237 ;; o second MIDI event byte in MIOS_PARAMETER2
+ 00238 ;; o third MIDI event byte in MIOS_PARAMETER3
+ 00239 ;; --------------------------------------------------------------------------
+359C 00240 USER_MPROC_NotifyFoundEvent
+ 00241
+359C 0012 00242 return
+ 00243
+ 00244
+ 00245 ;; --------------------------------------------------------------------------
+ 00246 ;; This function is called by MIOS when a MIDI event has not been completly
+ 00247 ;; received within 2 seconds
+ 00248 ;; --------------------------------------------------------------------------
+359E 00249 USER_MPROC_NotifyTimeout
+ 00250 ;; -> jump to "ActionInvalid" for a proper reset of the sysex parser
+359E EF56 F029 00251 goto TIA_SYSEX_ActionInvalid
+35A2 0012 00252 return
+ 00253
+ 00254 ;; --------------------------------------------------------------------------
+ 00255 ;; This function is called by MIOS when a MIDI byte has been received
+ 00256 ;; Input:
+ 00257 ;; o received MIDI byte in WREG and MIOS_PARAMETER1
+ 00258 ;; --------------------------------------------------------------------------
+35A4 00259 USER_MPROC_NotifyReceivedByte
+ 00260 ;; -> continue at TIA_MPROC_SysExCheck
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 51
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+35A4 EF36 F029 00261 goto TIA_SYSEX_SysExCheck
+35A8 0012 00262 return
+ 00263
+ 00264 ;; --------------------------------------------------------------------------
+ 00265 ;; This function is called by MIOS before the transfer of a MIDI byte.
+ 00266 ;; It can be used to monitor the Tx activity or to do any other actions
+ 00267 ;; (e.g. to switch a pin for multiplexed MIDI Outs) before the byte will
+ 00268 ;; be sent.
+ 00269 ;; Note that this is an interrupt service routine! Use FSR2 instead of FSR0
+ 00270 ;; and IRQ_TMPx instead of TMPx -- and make the routine as fast as possible!
+ 00271 ;; Input:
+ 00272 ;; o transmitted byte in WREG
+ 00273 ;; --------------------------------------------------------------------------
+35AA 00274 USER_MIDI_NotifyTx
+ 00275 ;; notify Tx event to MIDI_RXTX handler
+35AA EF1B F01B 00276 goto MIDI_RXTX_NotifyTx
+35AE 0012 00277 return
+ 00278
+ 00279 ;; --------------------------------------------------------------------------
+ 00280 ;; This function is called by MIOS when a MIDI byte has been received.
+ 00281 ;; It can be used to monitor the Rx activity or to do any action - e.g.
+ 00282 ;; to react on realtime events like MIDI clock (0xf8) with a minimum latency
+ 00283 ;; Note that this is an interrupt service routine! Use FSR2 instead of FSR0
+ 00284 ;; and IRQ_TMPx instead of TMPx -- and make the routine as fast as possible!
+ 00285 ;; Input:
+ 00286 ;; o received byte in WREG
+ 00287 ;; --------------------------------------------------------------------------
+35B0 00288 USER_MIDI_NotifyRx
+ 00289 ;; temporary save received byte in IRQ_TMP1
+35B0 6E0B 00290 movwf IRQ_TMP1
+ 00291
+ 00292 ;; if MIDI clock: notify clock
+35B2 EE21 F0F0 00293 lfsr FSR2, TIA_MIDI_SYNC
+35B6 0AF8 00294 xorlw 0xf8
+35B8 E103 00295 bnz USER_MIDI_NotifyRx_NoF8
+35BA 88DF 00296 bsf INDF2, TIA_MIDI_SYNC_F8
+35BC EF0E F01B 00297 goto MIDI_RXTX_NotifyRx_BeatClk
+35C0 00298 USER_MIDI_NotifyRx_NoF8
+ 00299 ;; if MIDI start: notify start
+35C0 500B 00300 movf IRQ_TMP1, W
+35C2 0AFA 00301 xorlw 0xfa
+35C4 E102 00302 bnz USER_MIDI_NotifyRx_NoFA
+35C6 8ADF 00303 bsf INDF2, TIA_MIDI_SYNC_FA
+35C8 6B69 00304 clrf MIDI_RXTX_BEAT_CTR
+35CA 00305 USER_MIDI_NotifyRx_NoFA
+ 00306
+ 00307 ;; notify Rx event to MIDI_RXTX handler
+35CA EF17 F01B 00308 goto MIDI_RXTX_NotifyRx
+ 00309
+ 00310
+35CE 0012 00311 return
+ 00312
+ 00313 ;; --------------------------------------------------------------------------
+ 00314 ;; This function is called by MIOS when an button has been toggled
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 52
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00315 ;; Input:
+ 00316 ;; o Button number in WREG and MIOS_PARAMETER1
+ 00317 ;; o Button value MIOS_PARAMETER2:
+ 00318 ;; - 1 if button has been released (=5V)
+ 00319 ;; - 0 if button has been pressed (=0V)
+ 00320 ;; --------------------------------------------------------------------------
+35D0 00321 USER_DIN_NotifyToggle
+35D0 0012 00322 return
+ 00323
+ 00324
+ 00325 ;; --------------------------------------------------------------------------
+ 00326 ;; This function is called by MIOS when an encoder has been moved
+ 00327 ;; Input:
+ 00328 ;; o Encoder number in WREG and MIOS_PARAMETER1
+ 00329 ;; o signed incrementer value in MIOS_PARAMETER2:
+ 00330 ;; - is positive when encoder has been turned clockwise
+ 00331 ;; - is negative when encoder has been turned counter clockwise
+ 00332 ;; --------------------------------------------------------------------------
+35D2 00333 USER_ENC_NotifyChange
+35D2 0012 00334 return
+ 00335
+ 00336
+ 00337 ;; --------------------------------------------------------------------------
+ 00338 ;; This function is called by MIOS before the shift register are loaded
+ 00339 ;; Note that this is an interrupt service routine! Use FSR2 instead of FSR0
+ 00340 ;; and IRQ_TMPx instead of TMPx -- and make the routine as fast as possible
+ 00341 ;; --------------------------------------------------------------------------
+35D4 00342 USER_SR_Service_Prepare
+35D4 0012 00343 return
+ 00344
+ 00345 ;; --------------------------------------------------------------------------
+ 00346 ;; This function is called by MIOS after the shift register have been loaded
+ 00347 ;; Note that this is an interrupt service routine! Use FSR2 instead of FSR0
+ 00348 ;; and IRQ_TMPx instead of TMPx -- and make the routine as fast as possible
+ 00349 ;; --------------------------------------------------------------------------
+35D6 00350 USER_SR_Service_Finish
+35D6 0012 00351 return
+ 00352
+ 00353 ;; --------------------------------------------------------------------------
+ 00354 ;; This function is called by MIOS when a pot has been moved
+ 00355 ;; Input:
+ 00356 ;; o Pot number in WREG and MIOS_PARAMETER1
+ 00357 ;; o LSB value in MIOS_PARAMETER2
+ 00358 ;; o MSB value in MIOS_PARAMETER3
+ 00359 ;; --------------------------------------------------------------------------
+35D8 00360 USER_AIN_NotifyChange
+35D8 0012 00361 return
+ 00362
+ 00363
+ 00364 ;; ==========================================================================
+ 00365 ;; Application code (see comments in files)
+ 00366 ;; ==========================================================================
+ 00367
+ 00368 ;; ---[ modules from code library ]---
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 53
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00369 ; override default pin definitions of AOUT driver
+ 00370 ;#define AOUT_LAT_CS LATC ; The chip select pin CS#
+ 00371 ;#define AOUT_TRIS_CS TRISC ; is connected to Port C.3
+ 00372 ;#define AOUT_PIN_CS 3 ; (CANNOT be shared with other outputs!)
+ 00373 ;
+ 00374 ;#define AOUT_LAT_DIN LATC ; The data input pin DIN
+ 00375 ;#define AOUT_TRIS_DIN TRISC ; is connected to Port C.1
+ 00376 ;#define AOUT_PIN_DIN 1 ; (can be shared with other outputs)
+ 00377 ;;
+ 00378 ;#define AOUT_LAT_SCLK LATC ; The shift clock input pin SCLK
+ 00379 ;#define AOUT_TRIS_SCLK TRISC ; is connected to Port C.0
+ 00380 ;#define AOUT_PIN_SCLK 0 ; (can be shared with other outputs)
+ 00381 ; include AOUT driver (located in $MIOS_PATH/modules/aout/)
+ 00382 ;#include <aout.inc>
+ 00383
+ 00384 ;#define J5_IO_DONT_USE_INPUT_FUNCTIONS 1
+ 00385 ;#include <j5_io.inc>
+ 00386
+ 00387 ;; ---[ reusable functions ]---
+ 00388 #include "math_mul16_16.inc"
+ 00001 ; $Id: math_mul16_16.inc 111 2008-02-22 00:41:21Z tk $
+ 00002 ;; Multiply 16x16 bit routine from the PIC18F452 datasheet, Chapter 7.2 "8 X 8 HARDWARE MULTIPLIER, Operation"
+ 00003
+ 00004 ;; MUL_R_3:MUL_R_0 = MUL_A_H:MUL_A_L * MUL_B_H:MUL_B_L
+ 00005 ;; = (MUL_A_H * MUL_B_H * 2^16) +
+ 00006 ;; (MUL_A_H * MUL_B_L * 2^8) +
+ 00007 ;; (MUL_A_L * MUL_B_H * 2^8) +
+ 00008 ;; (MUL_A_L * MUL_B_L)
+ 00009
+35DA 00010 MATH_MUL16_16
+ 00011 SET_BSR MUL_R_0
+35DA 0101 M movlb HIGH(reg)
+ 00012
+35DC 51F8 00013 movf MUL_A_L, W
+35DE 03FA 00014 mulwf MUL_B_L ; MUL_A_L * MUL_B_L -> PRODH:PRODL
+35E0 CFF4 F1FD 00015 movff PRODH, MUL_R_1
+35E4 CFF3 F1FC 00016 movff PRODL, MUL_R_0
+ 00017
+35E8 51F9 00018 movf MUL_A_H, W
+35EA 03FB 00019 mulwf MUL_B_H ; MUL_A_H * MUL_B_H -> PRODH:PRODL
+35EC CFF4 F1FF 00020 movff PRODH, MUL_R_3
+35F0 CFF3 F1FE 00021 movff PRODL, MUL_R_2
+ 00022
+35F4 51F8 00023 movf MUL_A_L, W
+35F6 03FB 00024 mulwf MUL_B_H ; MUL_A_L * MUL_B_H -> PRODH:PRODL
+35F8 50F3 00025 movf PRODL, W
+35FA 27FD 00026 addwf MUL_R_1, F ; Add cross
+35FC 50F4 00027 movf PRODH, W ; products
+35FE 23FE 00028 addwfc MUL_R_2, F
+3600 6AE8 00029 clrf WREG
+3602 23FF 00030 addwfc MUL_R_3, F
+ 00031
+3604 51F9 00032 movf MUL_A_H, W
+3606 03FA 00033 mulwf MUL_B_L ; MUL_A_H * MUL_B_L -> PRODH:PRODL
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 54
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3608 50F3 00034 movf PRODL, W
+360A 27FD 00035 addwf MUL_R_1, F ; Add cross
+360C 50F4 00036 movf PRODH, W ; products
+360E 23FE 00037 addwfc MUL_R_2, F
+3610 6AE8 00038 clrf WREG
+3612 23FF 00039 addwfc MUL_R_3, F
+ 00040
+3614 0012 00041 return
+ 00389 #include "midi_rxtx.inc"
+ 00001 ; $Id: midi_rxtx.inc bdupeyron.tech@gmail.com(Antichambre)
+ 00002 ;
+ 00003 ; This file includes helpful functions to monitor the MIDI Rx/Tx activity
+ 00004 ;
+ 00005 ; o MIDI_RXTX_NotifyRx: to be called when a MIDI byte has been received
+ 00006 ; o MIDI_RXTX_NotifyTx: to be called when a MIDI byte has been sent
+ 00007 ; o MIDI_RXTX_Handler: to be called from USER_SR_Service_Prepare
+ 00008 ;
+ 00009 ; See the function headers for further details
+ 00010 ;
+ 00011 ; Settings which can be modified:
+ 00012 ;
+ 00013 ; Number of update cycles (* 1mS) the LEDs will stay active on a Rx/Tx event
+3616 00014 #define MIDI_RXTX_LED_DELAY 15
+ 00015 ; DOUT pin number of Rx LED
+3616 00016 #define MIDI_RXTX_RX_LED DEFAULT_MIDI_RX_LED
+ 00017 ; DOUT pin number of Tx LED
+3616 00018 #define MIDI_RXTX_TX_LED DEFAULT_MIDI_TX_LED
+ 00019 ;
+ 00020 ; Following registers have to be located to free addresses in app_defines.h:
+ 00021 ;
+ 00022 ;MIDI_RXTX_RX_CTR EQU 0x019
+ 00023 ;MIDI_RXTX_TX_CTR EQU 0x01a
+ 00024 ;
+ 00025 ; ==========================================================================
+ 00026 ;
+ 00027 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00028 ; Licensed for personal non-commercial use only.
+ 00029 ; All other rights reserved.
+ 00030 ;
+ 00031 ; ==========================================================================
+ 00032
+ 00033 ;; --------------------------------------------------------------------------
+ 00034 ;; FUNCTION: MIDI_RXTX_IO_Init
+ 00035 ;; DESCRIPTION: this function has to be called from the USER_Init
+ 00036 ;; only if Leds are assigned to IO pins
+ 00037 ;; --------------------------------------------------------------------------
+3616 00038 MIDI_RXTX_IO_Init
+ 00039 #if MIDI_RXTX_USE_IO
+3616 9C95 00040 bcf DEFAULT_MIDI_RX_TRIS, DEFAULT_MIDI_RX_PIN
+3618 9E95 00041 bcf DEFAULT_MIDI_TX_TRIS, DEFAULT_MIDI_TX_PIN
+ 00042 #endif
+361A 0012 00043 return
+ 00044
+ 00045 ;; --------------------------------------------------------------------------
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 55
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00046 ;; FUNCTION: MIDI_RXTX_NotifyRx_BeatClk
+ 00047 ;; DESCRIPTION: this function has to be called from the USER_MIDI_NotifyRx
+ 00048 ;; on F8 event
+ 00049 ;; --------------------------------------------------------------------------
+361C 00050 MIDI_RXTX_NotifyRx_BeatClk
+361C 2B69 00051 incf MIDI_RXTX_BEAT_CTR, F
+361E 0E17 00052 movlw 0x17
+3620 6569 00053 cpfsgt MIDI_RXTX_BEAT_CTR, BANKED
+ 00054 rgoto MIDI_RXTX_NotifyRx_BeatClk_End
+3622 D004 M bra label
+3624 6B69 00055 clrf MIDI_RXTX_BEAT_CTR
+3626 0E0F 00056 movlw MIDI_RXTX_LED_DELAY
+ 00057 SET_BSR MIDI_RXTX_RX_CTR
+3628 0100 M movlb HIGH(reg)
+362A 6F67 00058 movwf MIDI_RXTX_RX_CTR, BANKED
+362C 00059 MIDI_RXTX_NotifyRx_BeatClk_End
+362C 0012 00060 return
+ 00061
+ 00062 ;; --------------------------------------------------------------------------
+ 00063 ;; FUNCTION: MIDI_RXTX_NotifyRx
+ 00064 ;; DESCRIPTION: this function has to be called from the USER_MIDI_NotifyRx
+ 00065 ;; hook when a MIDI event has been received to reload the RX counter
+ 00066 ;; --------------------------------------------------------------------------
+362E 00067 MIDI_RXTX_NotifyRx
+362E 0E0F 00068 movlw MIDI_RXTX_LED_DELAY
+ 00069 SET_BSR MIDI_RXTX_RX_CTR
+3630 0100 M movlb HIGH(reg)
+3632 6F67 00070 movwf MIDI_RXTX_RX_CTR, BANKED
+3634 0012 00071 return
+ 00072
+ 00073 ;; --------------------------------------------------------------------------
+ 00074 ;; FUNCTION: MIDI_RXTX_NotifyTx
+ 00075 ;; DESCRIPTION: this function has to be called from the USER_MIDI_NotifyTx
+ 00076 ;; hook when a MIDI event will be transmitted to reload the TX counter
+ 00077 ;; --------------------------------------------------------------------------
+3636 00078 MIDI_RXTX_NotifyTx
+3636 0E0F 00079 movlw MIDI_RXTX_LED_DELAY
+ 00080 SET_BSR MIDI_RXTX_TX_CTR
+3638 0100 M movlb HIGH(reg)
+363A 6F68 00081 movwf MIDI_RXTX_TX_CTR, BANKED
+363C 0012 00082 return
+ 00083
+ 00084 ;; --------------------------------------------------------------------------
+ 00085 ;; FUNCTION: MIDI_RXTX_Handler
+ 00086 ;; DESCRIPTION: this function has to be called from the USER_SR_ServicePrpeare
+ 00087 ;; hook, it decrements the Rx/Tx counters and sets the LEDs depending on the
+ 00088 ;; counter values
+ 00089 ;; --------------------------------------------------------------------------
+363E 00090 MIDI_RXTX_Handler
+ 00091 #if DEFAULT_MIDI_MONITOR_ENABLED == 1
+ 00092 ;; Decrement Rx counter if != 0
+ 00093 SET_BSR MIDI_RXTX_RX_CTR
+363E 0100 M movlb HIGH(reg)
+3640 5167 00094 movf MIDI_RXTX_RX_CTR, W, BANKED
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 56
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3642 A4D8 00095 skpz
+3644 0767 00096 decf MIDI_RXTX_RX_CTR, F, BANKED
+ 00097
+ 00098 ;; Decrement Tx counter if != 0
+ 00099 SET_BSR MIDI_RXTX_TX_CTR
+3646 0100 M movlb HIGH(reg)
+3648 5168 00100 movf MIDI_RXTX_TX_CTR, W, BANKED
+364A A4D8 00101 skpz
+364C 0768 00102 decf MIDI_RXTX_TX_CTR, F, BANKED
+ 00103
+ 00104 ;;
+ 00105 ;; remove the code below if you don't want to use LEDs to
+ 00106 ;; indicate the counter state
+ 00107 ;;
+ 00108
+ 00109 ;; set the Rx LED depending on counter state
+ 00110 SET_BSR MIDI_RXTX_RX_CTR
+364E 0100 M movlb HIGH(reg)
+3650 5167 00111 movf MIDI_RXTX_RX_CTR, W, BANKED
+3652 A4D8 00112 skpz
+3654 0E01 00113 movlw 0x01
+3656 6E03 00114 movwf MIOS_PARAMETER1
+ 00115
+ 00116 #if MIDI_RXTX_USE_IO
+3658 9C8C 00117 bcf DEFAULT_MIDI_RX_LAT, DEFAULT_MIDI_RX_PIN
+365A 5003 00118 movf MIOS_PARAMETER1, W
+365C A4D8 00119 skpz
+365E 8C8C 00120 bsf DEFAULT_MIDI_RX_LAT, DEFAULT_MIDI_RX_PIN
+ 00121 #else
+ 00122 movlw MIDI_RXTX_RX_LED
+ 00123 call MIOS_DOUT_PinSet
+ 00124 #endif
+ 00125
+ 00126 ;; set the Tx LED depending on counter state
+ 00127 SET_BSR MIDI_RXTX_TX_CTR
+3660 0100 M movlb HIGH(reg)
+3662 5168 00128 movf MIDI_RXTX_TX_CTR, W, BANKED
+3664 A4D8 00129 skpz
+3666 0E01 00130 movlw 0x01
+3668 6E03 00131 movwf MIOS_PARAMETER1
+ 00132
+ 00133 #if MIDI_RXTX_USE_IO
+366A 9E8C 00134 bcf DEFAULT_MIDI_TX_LAT, DEFAULT_MIDI_TX_PIN
+366C 5003 00135 movf MIOS_PARAMETER1, W
+366E A4D8 00136 skpz
+3670 8E8C 00137 bsf DEFAULT_MIDI_TX_LAT, DEFAULT_MIDI_TX_PIN
+ 00138 #else
+ 00139 movlw MIDI_RXTX_TX_LED
+ 00140 call MIOS_DOUT_PinSet
+ 00141 #endif
+ 00142 #endif
+3672 0012 00143 return
+ 00390 #include "special_characters.inc"
+ 00001 ; $Id: special_characters.inc 125 2008-02-27 09:10:44Z nils $
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 57
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00002 ;
+ 00003 ; This file contains all special characters used by the application
+ 00004 ;
+ 00005 ; ==========================================================================
+ 00006 ;
+ 00007 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00008 ; Licensed for personal non-commercial use only.
+ 00009 ; All other rights reserved.
+ 00010 ;
+ 00011 ; ==========================================================================
+ 00012
+ 00013 ;; --------------------------------------------------------------------------
+ 00014 ;; Table of special characters
+ 00015 ;; NOTE: only seven characters are really used by the CS, the others can contain
+ 00016 ;; random bitpatterns, therefore this table only contains 16 bytes
+ 00017 ;; --------------------------------------------------------------------------
+3674 00018 CS_MENU_SPECIAL_CHARS
+ 00019 ;; due to an imperfection in the MPASM we have
+ 00020 ;; to write two bytes in every line :-(
+ 00021 ;; char #0: left-arrow
+3674 0301 00022 db b'00000001', b'00000011'; 1st and 2nd line of special char
+3676 0307 00023 db b'00000111', b'00000011'; 3rd and 4th line of special char
+3678 0001 00024 db b'00000001', b'00000000'; 5th and 6th line of special char
+367A 0000 00025 db b'00000000', b'00000000'; 7th and 8th line of special char
+ 00026 ;; char #1: right-arrow
+367C 0000 00027 db b'00000000', b'00000000'; 1st and 2nd line of special char
+367E 1000 00028 db b'00000000', b'00010000'; 3rd and 4th line of special char
+3680 1C18 00029 db b'00011000', b'00011100'; 5th and 6th line of special char
+3682 1018 00030 db b'00011000', b'00010000'; 7th and 8th line of special char
+ 00031 ;; char #2: inverted 1
+3684 131B 00032 db b'00011011', b'00010011'; 1st and 2nd line of special char
+3686 1B1B 00033 db b'00011011', b'00011011'; 3rd and 4th line of special char
+3688 1B1B 00034 db b'00011011', b'00011011'; 5th and 6th line of special char
+368A 1F11 00035 db b'00010001', b'00011111'; 7th and 8th line of special char
+ 00036 ;; char #3: inverted 2
+368C 0E11 00037 db b'00010001', b'00001110'; 1st and 2nd line of special char
+368E 1D1E 00038 db b'00011110', b'00011101'; 3rd and 4th line of special char
+3690 171B 00039 db b'00011011', b'00010111'; 5th and 6th line of special char
+3692 1F00 00040 db b'00000000', b'00011111'; 7th and 8th line of special char
+ 00041 ;; char #4: inverted 3
+3694 1D00 00042 db b'00000000', b'00011101'; 1st and 2nd line of special char
+3696 1D1B 00043 db b'00011011', b'00011101'; 3rd and 4th line of special char
+3698 0E1E 00044 db b'00011110', b'00001110'; 5th and 6th line of special char
+369A 1F11 00045 db b'00010001', b'00011111'; 7th and 8th line of special char
+ 00046 ;; char #5: inverted 4
+369C 191D 00047 db b'00011101', b'00011001'; 1st and 2nd line of special char
+369E 0D15 00048 db b'00010101', b'00001101'; 3rd and 4th line of special char
+36A0 1D00 00049 db b'00000000', b'00011101'; 5th and 6th line of special char
+36A2 1F1D 00050 db b'00011101', b'00011111'; 7th and 8th line of special char
+ 00051 ;; char #6: inverted '-'
+36A4 1F1F 00052 db b'00011111', b'00011111'; 1st and 2nd line of special char
+36A6 001F 00053 db b'00011111', b'00000000'; 3rd and 4th line of special char
+36A8 1F1F 00054 db b'00011111', b'00011111'; 5th and 6th line of special char
+36AA 1F1F 00055 db b'00011111', b'00011111'; 7th and 8th line of special char
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 58
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00056 ;; char #7: left/right arrow
+36AC 0301 00057 db b'00000001', b'00000011'; line 1 / 2
+36AE 1307 00058 db b'00000111', b'00010011'; line 3 / 4
+36B0 1C19 00059 db b'00011001', b'00011100'; line 5 / 6
+36B2 1018 00060 db b'00011000', b'00010000'; line 7 / 8
+ 00391 ;; --------------------------------------------------------------------------
+ 00392 ;; Including fonts from $MIOS_PATH/modules/glcd_font/
+ 00393 ;; --------------------------------------------------------------------------
+ 00394 ;;#include <glcd_font_meter_icons_h.inc>
+ 00395
+ 00396 ;; ---[ TIA kernel ]---
+ 00397 #include "tia_led_meter.inc"
+ 00001 ; $Id: tia_led_meter.inc bdupeyron.tech@gmail.com(Antichambre)
+ 00002 ;
+ 00003 ; MIDIbox TIA
+ 00004 ; TIA Cartridge Led Meter Module
+ 00005 ;
+ 00006 ; ==========================================================================
+ 00007 ;
+ 00008 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00009 ; Licensed for personal non-commercial use only.
+ 00010 ; All other rights reserved.
+ 00011 ;
+ 00012 ; ==========================================================================
+ 00013 ;
+ 00014 ; define the pins to which the Leds Meters are connected
+ 00015 ;
+ 00016
+ 00000007 00017 TIA_LEDMTR0 EQU 7
+ 00000006 00018 TIA_LEDMTR1 EQU 6
+ 00000005 00019 TIA_LEDMTR2 EQU 5
+ 00000004 00020 TIA_LEDMTR3 EQU 4
+ 00021
+ 00000003 00022 TIA_LEDMTR4 EQU 3
+ 00000002 00023 TIA_LEDMTR5 EQU 2
+ 00000001 00024 TIA_LEDMTR6 EQU 1
+ 00000000 00025 TIA_LEDMTR7 EQU 0
+ 00026
+ 00000000 00027 TIA_LEDMTR_AUDX_REQ EQU 0
+ 00000001 00028 TIA_LEDMTR_TIA_MODE EQU 1 ;; Swith between Normal & Sampler Mode
+ 00029
+ 00030 ;; --------------------------------------------------------------------------
+ 00031 ;; Initialize the LEDMTR module
+ 00032 ;; --------------------------------------------------------------------------
+36B4 00033 TIA_LEDMTR_Init
+36B4 6B6A 00034 clrf TIA_LEDMTR_STAT
+36B6 6B6B 00035 clrf TIA_LEDMTR_VALUE
+36B8 0012 00036 return
+ 00037 ;; reset will be released with first call of TIA_SR_Handler
+ 00038
+ 00039 ;; --------------------------------------------------------------------------
+ 00040 ;; LEDMTR module Handler
+ 00041 ;; --------------------------------------------------------------------------
+36BA 00042 TIA_LEDMTR_Handler
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 59
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00043 SET_BSR TIA_BASE ; prepare BSR for TIA register access
+36BA 0101 M movlb HIGH(reg)
+ 00044 ;; Template run prioity
+ 00045 BRA_IFCLR TIA_LEDMTR_STAT, TIA_LEDMTR_AUDX_REQ, ACCESS, TIA_LEDMTR_Handler_End
+36BC A06A M btfss reg, bit, reg_a
+36BE D021 M bra label
+ 00046
+36C0 00047 TIA_LEDMTR_Handler_Meter_Norm
+ 00048 ;;BRA_IFSET TIA_LEDMTR_STAT, TIA_LEDMTR_TIA_MODE, ACCESS, TIA_LEDMTR_Handler_Meter_Sampler
+36C0 916A 00049 bcf TIA_LEDMTR_STAT, TIA_LEDMTR_AUDX_REQ
+ 00050
+36C2 6B6B 00051 clrf TIA_LEDMTR_VALUE
+36C4 0E01 00052 movlw 0x01
+36C6 6104 00053 cpfslt TIA_AUDV0
+36C8 8F6B 00054 bsf TIA_LEDMTR_VALUE, TIA_LEDMTR0
+36CA 0E07 00055 movlw 0x07
+36CC 6104 00056 cpfslt TIA_AUDV0
+36CE 8D6B 00057 bsf TIA_LEDMTR_VALUE, TIA_LEDMTR1
+36D0 0E0B 00058 movlw 0x0b
+36D2 6104 00059 cpfslt TIA_AUDV0
+36D4 8B6B 00060 bsf TIA_LEDMTR_VALUE, TIA_LEDMTR2
+36D6 0E0E 00061 movlw 0x0e
+36D8 6104 00062 cpfslt TIA_AUDV0
+36DA 896B 00063 bsf TIA_LEDMTR_VALUE, TIA_LEDMTR3
+ 00064
+36DC 0E01 00065 movlw 0x01
+36DE 6105 00066 cpfslt TIA_AUDV1
+36E0 876B 00067 bsf TIA_LEDMTR_VALUE, TIA_LEDMTR4
+36E2 0E07 00068 movlw 0x07
+36E4 6105 00069 cpfslt TIA_AUDV1
+36E6 856B 00070 bsf TIA_LEDMTR_VALUE, TIA_LEDMTR5
+36E8 0E0B 00071 movlw 0x0b
+36EA 6105 00072 cpfslt TIA_AUDV1
+36EC 836B 00073 bsf TIA_LEDMTR_VALUE, TIA_LEDMTR6
+36EE 0E0E 00074 movlw 0x0e
+36F0 6105 00075 cpfslt TIA_AUDV1
+36F2 816B 00076 bsf TIA_LEDMTR_VALUE, TIA_LEDMTR7
+ 00077
+36F4 516B 00078 movf TIA_LEDMTR_VALUE, W
+36F6 6E03 00079 movwf MIOS_PARAMETER1
+ 00080 rgoto TIA_LEDMTR_Handler_Set
+36F8 D001 M bra label
+ 00081
+36FA 00082 TIA_LEDMTR_Handler_Meter_Sampler
+36FA 6A03 00083 clrf MIOS_PARAMETER1
+ 00084 ; To Do
+ 00085 ;;rgoto TIA_LEDMTR_Handler_Set
+ 00086
+36FC 00087 TIA_LEDMTR_Handler_Set
+36FC 0E00 00088 movlw TIA_LEDMTR_REG
+36FE EC68 F016 00089 call MIOS_DOUT_SRSet
+ 00090
+3702 00091 TIA_LEDMTR_Handler_End
+3702 0012 00092 return
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 60
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00093
+ 00094 ;; --------------------------------------------------------------------------
+ 00095 ;; TIA_LEDMTR Led Pattern orange to green
+ 00096 ;; --------------------------------------------------------------------------
+3704 00097 TIA_LEDMTR_PlayFormat
+3704 D82D 00098 rcall TIA_LEDMTR_Player_Init
+ 00099
+3706 00100 TIA_LEDMTR_PlayFormat_R
+3706 D82C 00101 rcall TIA_LEDMTR_Player_Init
+3708 0E11 00102 movlw 0x11
+370A D83D 00103 rcall TIA_LEDMTR_Player_On_Wait01
+370C 0E03 00104 movlw 0x03
+370E D83E 00105 rcall TIA_LEDMTR_Wait
+ 00106 rgoto TIA_LEDMTR_End
+3710 D026 M bra label
+ 00107
+3712 00108 TIA_LEDMTR_PlayFormat_O
+3712 D826 00109 rcall TIA_LEDMTR_Player_Init
+3714 0E33 00110 movlw 0x33
+3716 D837 00111 rcall TIA_LEDMTR_Player_On_Wait01
+3718 0E01 00112 movlw 0x01
+371A D838 00113 rcall TIA_LEDMTR_Wait
+ 00114 rgoto TIA_LEDMTR_End
+371C D020 M bra label
+ 00115
+371E 00116 TIA_LEDMTR_PlayFormat_G1
+371E D820 00117 rcall TIA_LEDMTR_Player_Init
+3720 0E77 00118 movlw 0x77
+3722 D831 00119 rcall TIA_LEDMTR_Player_On_Wait01
+3724 0E03 00120 movlw 0x03
+3726 D832 00121 rcall TIA_LEDMTR_Wait
+ 00122 rgoto TIA_LEDMTR_End
+3728 D01A M bra label
+ 00123
+372A 00124 TIA_LEDMTR_PlayFormat_G2
+372A D81A 00125 rcall TIA_LEDMTR_Player_Init
+372C 0EFF 00126 movlw 0xff
+372E D82B 00127 rcall TIA_LEDMTR_Player_On_Wait01
+3730 0E03 00128 movlw 0x03
+3732 D82C 00129 rcall TIA_LEDMTR_Wait
+ 00130 rgoto TIA_LEDMTR_End
+3734 D014 M bra label
+ 00131
+ 00132 ;; --------------------------------------------------------------------------
+ 00133 ;; TIA_LEDMTR Led Pattern orange to green
+ 00134 ;; --------------------------------------------------------------------------
+3736 00135 TIA_LEDMTR_PlayOtoG
+3736 D814 00136 rcall TIA_LEDMTR_Player_Init
+ 00137
+3738 0E22 00138 movlw 0x22
+373A D825 00139 rcall TIA_LEDMTR_Player_On_Wait01
+373C 0E03 00140 movlw 0x03
+373E D826 00141 rcall TIA_LEDMTR_Wait
+3740 0E44 00142 movlw 0x44
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 61
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3742 D821 00143 rcall TIA_LEDMTR_Player_On_Wait01
+3744 0E03 00144 movlw 0x03
+3746 D822 00145 rcall TIA_LEDMTR_Wait
+3748 0E88 00146 movlw 0x88
+374A D81D 00147 rcall TIA_LEDMTR_Player_On_Wait01
+ 00148
+ 00149 rgoto TIA_LEDMTR_End
+374C D008 M bra label
+ 00150
+ 00151 ;; --------------------------------------------------------------------------
+ 00152 ;; TIA_LEDMTR Led Pattern orange to red
+ 00153 ;; --------------------------------------------------------------------------
+374E 00154 TIA_LEDMTR_PlayOtoR
+374E D808 00155 rcall TIA_LEDMTR_Player_Init
+ 00156
+3750 0E22 00157 movlw 0x22
+3752 D819 00158 rcall TIA_LEDMTR_Player_On_Wait01
+3754 0E03 00159 movlw 0x03
+3756 D81A 00160 rcall TIA_LEDMTR_Wait
+3758 0E11 00161 movlw 0x11
+375A D815 00162 rcall TIA_LEDMTR_Player_On_Wait01
+ 00163
+ 00164 rgoto TIA_LEDMTR_End
+375C D000 M bra label
+ 00165
+ 00166
+ 00167
+ 00168 ;; --------------------------------------------------------------------------
+ 00169 ;; TIA_LEDMTR End
+ 00170 ;; --------------------------------------------------------------------------
+375E 00171 TIA_LEDMTR_End
+ 00172 ;bcf TIA_STAT, TIA_STAT_ENGINE_DISABLE; turn on TIA software synth part again
+ 00173 ;goto TIA_PATCH_Init ; init patch and exit
+375E 0012 00174 return
+ 00175
+ 00176
+ 00177 ;; --------------------------------------------------------------------------
+ 00178 ;; TIA_LEDMTR Initialization routine
+ 00179 ;; --------------------------------------------------------------------------
+3760 00180 TIA_LEDMTR_Player_Init
+3760 8010 00181 bsf TIA_STAT, TIA_STAT_ENGINE_DISABLE; turn off TIA software synth part
+ 00182
+ 00183 SET_BSR TIA_BASE
+3762 0101 M movlb HIGH(reg)
+3764 6A03 00184 clrf MIOS_PARAMETER1
+3766 0E00 00185 movlw TIA_LEDMTR_REG
+3768 EC68 F016 00186 call MIOS_DOUT_SRSet
+376C 0012 00187 return
+ 00188 ;; --------------------------------------------------------------------------
+ 00189 ;; TIA_LEDMTR a note (in: Note Number)
+ 00190 ;; --------------------------------------------------------------------------
+376E 00191 TIA_LEDMTR_Player_On
+ 00192 SET_BSR TIA_BASE
+376E 0101 M movlb HIGH(reg)
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 62
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3770 6E03 00193 movwf MIOS_PARAMETER1
+3772 0E00 00194 movlw TIA_LEDMTR_REG
+3774 EC68 F016 00195 call MIOS_DOUT_SRSet
+3778 0012 00196 return
+ 00197
+377A 00198 TIA_LEDMTR_Player_Off
+ 00199 SET_BSR TIA_BASE
+377A 0101 M movlb HIGH(reg)
+377C 6A03 00200 clrf MIOS_PARAMETER1
+377E 0E00 00201 movlw TIA_LEDMTR_REG
+3780 EC68 F016 00202 call MIOS_DOUT_SRSet
+3784 0012 00203 return
+ 00204
+3786 00205 TIA_LEDMTR_Player_On_Wait01
+3786 DFF3 00206 rcall TIA_LEDMTR_Player_On
+3788 0E01 00207 movlw 0x01
+ 00208 rgoto TIA_LEDMTR_Wait
+378A D000 M bra label
+ 00209
+ 00210
+ 00211 ;; --------------------------------------------------------------------------
+ 00212 ;; TIA_LEDMTR wait for a certain time and poll TIA_SR Handler
+ 00213 ;; --------------------------------------------------------------------------
+378C 00214 TIA_LEDMTR_Wait
+378C 6E06 00215 movwf TMP1
+378E 0004 00216 clrwdt
+3790 00217 TIA_LEDMTR_WaitLoop
+3790 0E0A 00218 movlw 10
+3792 ECCE F016 00219 call MIOS_Delay
+3796 2E06 00220 decfsz TMP1, F
+ 00221 rgoto TIA_LEDMTR_WaitLoop
+3798 D7FB M bra label
+379A 0012 00222 return
+ 00223
+ 00398 #include "tia_patch.inc"
+ 00001 ; $Id: tia_patch.inc bdupeyron.tech@gmail.com(Antichambre)
+ 00002 ;
+ 00003 ; TIA Patch routines
+ 00004 ;
+ 00005 ; ==========================================================================
+ 00006 ;
+ 00007 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00008 ; Licensed for personal non-commercial use only.
+ 00009 ; All other rights reserved.
+ 00010 ;
+ 00011 ; ==========================================================================
+ 00012
+ 00013
+ 00014 ;; --------------------------------------------------------------------------
+ 00015 ;; Init Routine for patch parameters
+ 00016 ;; Note that the MIDI events are initialized separately, this routine will
+ 00017 ;; be called on power-on and after a new MIDI dump has been loaded
+ 00018 ;; --------------------------------------------------------------------------
+379C 00019 TIA_PATCH_Init
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 63
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00020 ;; disable TIA engine
+379C 8010 00021 bsf TIA_STAT, TIA_STAT_ENGINE_DISABLE
+ 00022
+ 00023 ;; clear the whole TIA SFR memory space
+379E 0E00 00024 movlw ((TIA_SW_CLEAR_END-TIA_SW_CLEAR_BEGIN)+1) & 0xff
+37A0 6E06 00025 movwf TMP1
+37A2 EE01 F000 00026 lfsr FSR0, TIA_SW_CLEAR_BEGIN
+37A6 00027 TIA_PATCH_Init_ClearLoop
+37A6 6AEE 00028 clrf POSTINC0
+37A8 2E06 00029 decfsz TMP1, F
+ 00030 rgoto TIA_PATCH_Init_ClearLoop
+37AA D7FD M bra label
+ 00031
+ 00032 ;; fetch 128 TIA parameters from EEPROM
+37AC 6A06 00033 clrf TMP1
+37AE 0E00 00034 movlw EEPROM_PATCH & 0xff
+37B0 6EA9 00035 movwf EEADR
+37B2 0E00 00036 movlw (EEPROM_PATCH >> 8) & 0xff
+37B4 6EAA 00037 movwf EEADRH
+37B6 00038 TIA_PATCH_InitEELoop
+37B6 C014 F011 00039 movff TIA_PBANK, TIA_BANK
+37BA C013 F012 00040 movff TIA_PATCH, TIA_PRESET
+37BE 5006 00041 movf TMP1, W
+37C0 EC10 F030 00042 call TIA_SYSEX_TABLE_Get; get CC number
+37C4 6E07 00043 movwf TMP2 ; temporary store number in TMP2
+ 00044
+37C6 C006 FFA9 00045 movff TMP1, EEADR ; read parameter from current TIA bank
+37CA EC62 F01C 00046 call TIA_BANK_Read
+37CE 6E03 00047 movwf MIOS_PARAMETER1 ; store value in MIOS_PARAMETER1
+ 00048
+ 00049 ;; branch depending on TMP2[7..4]
+ 00050 BRA_IFSET TMP2, 7, ACCESS, TIA_PATCH_InitEELoopS
+37D0 BE07 M btfsc reg, bit, reg_a
+37D2 D004 M bra label
+37D4 00051 TIA_PATCH_InitEELoopN
+ 00052 ;; if TMP2[7] == 0, then set CC parameter
+37D4 5007 00053 movf TMP2, W
+37D6 EC23 F02D 00054 call TIA_CCIN_Set
+ 00055 rgoto TIA_PATCH_InitEELoopC
+37DA D008 M bra label
+37DC 00056 TIA_PATCH_InitEELoopS
+ 00057 ;; if TMP2[7..4] == 9, then set split point
+37DC 5007 00058 movf TMP2, W
+37DE 0BF0 00059 andlw 0xf0
+37E0 0A90 00060 xorlw 0x90
+37E2 E104 00061 bnz TIA_PATCH_InitEELoopC
+37E4 5007 00062 movf TMP2, W
+37E6 D817 00063 rcall TIA_PATCH_GetSplitPointer
+37E8 C003 FFE7 00064 movff MIOS_PARAMETER1, INDF1
+37EC 00065 TIA_PATCH_InitEELoopC
+ 00066
+37EC 2A06 00067 incf TMP1, F ; increment CC counter, loop until 0x80
+ 00068 BRA_IFCLR TMP1, 7, ACCESS, TIA_PATCH_InitEELoop
+37EE AE06 M btfss reg, bit, reg_a
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 64
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+37F0 D7E2 M bra label
+ 00069
+ 00070 ;; get and store the MIDI channels
+37F2 0E7E 00071 movlw EEPROM_CFG_BASE & 0xff
+37F4 6EA9 00072 movwf EEADR
+37F6 ECB0 F016 00073 call MIOS_EEPROM_Read
+37FA CFE8 F160 00074 movff WREG, TIA_V2_BASE + TIA_Vx_MIDI_CHANNEL
+37FE ECB0 F016 00075 call MIOS_EEPROM_Read
+3802 CFE8 F120 00076 movff WREG, TIA_V1_BASE + TIA_Vx_MIDI_CHANNEL
+ 00077 ;; get and store the device ID
+3806 ECB0 F016 00078 call MIOS_EEPROM_Read
+ 00079 #if AUTO_DEVICE_ID
+ 00080 ;; if AUTO_ID enabled, derive the TIA device ID from the MIOS device ID instead
+ 00081 call MIOS_MIDI_DeviceIDGet
+ 00082 #endif
+380A 6E20 00083 movwf TIA_MIDI_DEVICE
+ 00084
+380C ECB0 F016 00085 call MIOS_EEPROM_Read
+ 00086 ;; Empty
+ 00087
+ 00088 ;; force a refresh of all registers
+3810 8210 00089 bsf TIA_STAT, TIA_STAT_FORCE_REFRESH
+ 00090
+ 00091 ;; enable TIA engine again
+3812 9010 00092 bcf TIA_STAT, TIA_STAT_ENGINE_DISABLE
+ 00093
+3814 0012 00094 return
+ 00095
+ 00096
+ 00097
+ 00098 ;; --------------------------------------------------------------------------
+ 00099 ;; This help routine returns the pointer to TIA_Vx_SPLIT_xxx depending
+ 00100 ;; on WREG
+ 00101 ;; OUT: pointer in FSR1
+ 00102 ;; --------------------------------------------------------------------------
+3816 00103 TIA_PATCH_GetSplitPointer
+3816 EE11 F021 00104 lfsr FSR1, TIA_V1_BASE + TIA_Vx_SPLIT_LOWER
+381A B0E8 00105 btfsc WREG, 0
+381C EE11 F022 00106 lfsr FSR1, TIA_V1_BASE + TIA_Vx_SPLIT_UPPER
+ 00107
+3820 30E8 00108 rrf WREG, W
+3822 0B01 00109 andlw 0x01
+3824 0D40 00110 mullw TIA_Vx_RECORD_LEN
+3826 50F3 00111 movf PRODL, W
+3828 26E1 00112 addwf FSR1L, F
+382A 0012 00113 return
+ 00399 #include "tia_bank.inc"
+ 00001 ; $Id: tia_bank.inc bdupeyron.tech@gmail.com(Antichambre)
+ 00002 ;
+ 00003 ; MIDIbox SID
+ 00004 ; BankStick Handler
+ 00005 ;
+ 00006 ; (Bank Load/Store routines located in tia_pbank.inc and tia_ebank.inc)
+ 00007 ;
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 65
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00008 ; ==========================================================================
+ 00009 ;
+ 00010 ; Copyright 1998-2007 Thorsten Klose (tk@midibox.org)
+ 00011 ; Licensed for personal non-commercial use only.
+ 00012 ; All other rights reserved.
+ 00013 ;
+ 00014 ; ==========================================================================
+ 00015
+ 00016 ;; --------------------------------------------------------------------------
+ 00017 ;; Writes data to EEPROM or BankStick
+ 00018 ;; IN: Value in WREG, address offset in EEADR
+ 00019 ;; OUT: increments address
+ 00020 ;; --------------------------------------------------------------------------
+382C 00021 TIA_BANK_Write
+382C 6E11 00022 movwf TIA_BANK ; temporary save word in TIA_BANK
+ 00023 ;; branch to internal patch if bankstick is not available or Patch is 0
+382E D87F 00024 rcall TIA_BANK_GetBankStickAvailable
+3830 E00B 00025 bz TIA_BANK_WriteInternal
+3832 5012 00026 movf TIA_PRESET, W
+3834 E009 00027 bz TIA_BANK_WriteInternal
+ 00028
+ 00029 ;; test BS Size 64/128 Patchs,
+ 00030 ;rcall TIA_BANK_GetBankStickSize
+ 00031 ;bnz TIA_BANK_WriteBankStick
+ 00032 ;; exit if patch exceeds 63
+ 00033 ;btfsc TIA_PRESET, 6
+ 00034 ;rgoto TIA_BANK_WriteInternal
+ 00035
+3836 00036 TIA_BANK_WriteBankStick ; BankStick write:
+3836 0E00 00037 movlw 0x00
+3838 0F00 00038 addlw DEFAULT_BS_READONLY ; exit if BS_READONLY
+383A E104 00039 bnz TIA_BANK_WriteBankStick_NOk
+383C 00040 TIA_BANK_WriteBankStick_Ok
+383C D859 00041 rcall TIA_BANK_SetBankStickAddress
+383E 5005 00042 movf MIOS_PARAMETER3, W ; get byte from temp. register
+3840 ECBA F016 00043 call MIOS_BANKSTICK_Write ; write content
+ 00044 ;; here we could add an error exception handler
+3844 00045 TIA_BANK_WriteBankStick_NOk
+3844 2AA9 00046 incf EEADR, F ; increment EEPROM address
+ 00047 rgoto TIA_BANK_Write_End
+3846 D00F M bra label
+ 00048
+3848 00049 TIA_BANK_WriteInternal
+3848 0E00 00050 movlw 0x00
+384A 0F00 00051 addlw DEFAULT_EE_READONLY ; exit if EE_READONLY
+384C E009 00052 bz TIA_BANK_WriteInternal_Ok
+384E 2AA9 00053 incf EEADR, F ; increment EEADR
+ 00054 rgoto TIA_BANK_Write_End ; and goto end
+3850 D00A M bra label
+ 00055 ;; don't write if address in range between 0x7c and 0x7f (used to save channel and device number)
+ 00056 BRA_IFSET EEADR, 7, ACCESS, TIA_BANK_WriteInternal_Ok
+3852 BEA9 M btfsc reg, bit, reg_a
+3854 D005 M bra label
+3856 0E7B 00057 movlw 0x7c-1
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 66
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3858 64A9 00058 cpfsgt EEADR, ACCESS
+ 00059 rgoto TIA_BANK_WriteInternal_Ok
+385A D002 M bra label
+385C 2AA9 00060 incf EEADR, F ; increment EEADR
+ 00061 rgoto TIA_BANK_Write_End ; and goto end
+385E D003 M bra label
+3860 00062 TIA_BANK_WriteInternal_Ok
+3860 5005 00063 movf MIOS_PARAMETER3, W ; get byte from temp. register
+3862 ECB2 F016 00064 call MIOS_EEPROM_Write ; write to EEPROM
+ 00065 ;; here we could add an error exception handler
+3866 00066 TIA_BANK_Write_End
+ 00067 SET_BSR TIA_BASE ; fix BSR after a MIOS routine has been called
+3866 0101 M movlb HIGH(reg)
+3868 0012 00068 return
+ 00069
+ 00070 ;; --------------------------------------------------------------------------
+ 00071 ;; Writes a page of 64 bytes to EEPROM or BankStick
+ 00072 ;; IN: Value in FSR1 buffer, address offset in EEADR
+ 00073 ;; OUT: increments address
+ 00074 ;; --------------------------------------------------------------------------
+386A 00075 TIA_BANK_WritePage
+ 00076
+ 00077 ;; align EEADR if necessary
+386A 0EC0 00078 movlw 0xc0
+386C 16A9 00079 andwf EEADR, F
+ 00080
+ 00081 ;; branch to internal patch if bankstick is not available or Patch is 0
+386E 5012 00082 movf TIA_PRESET, W
+3870 E00F 00083 bz TIA_BANK_WritePageInternal
+ 00084
+3872 00085 TIA_BANK_WritePageBankStick ; BankStick write:
+3872 0E00 00086 movlw 0x00
+3874 0F00 00087 addlw DEFAULT_BS_READONLY ; exit if BS_READONLY
+3876 E003 00088 bz TIA_BANK_WritePageBankStick_Ok
+3878 00089 TIA_BANK_WritePageBankStick_ReadOnly
+ 00090 ;; BS Read Only Error #0x02
+3878 0E02 00091 movlw 0x02
+387A 6E26 00092 movwf TIA_SYSEX_ERROR
+ 00093 rgoto TIA_BANK_WritePageBankStick_End
+387C D006 M bra label
+ 00094
+387E 00095 TIA_BANK_WritePageBankStick_Ok
+387E D838 00096 rcall TIA_BANK_SetBankStickAddress
+ 00097 ;; buffer already prepared in FSR1
+3880 ECF2 F016 00098 call MIOS_BANKSTICK_WritePage ; write page
+ 00099 ;; here we could add an error exception handler
+3884 E002 00100 bz TIA_BANK_WritePageBankStick_End
+ 00101 ;; BS WritePage Error #0x07
+3886 0E07 00102 movlw 0x07
+3888 6E26 00103 movwf TIA_SYSEX_ERROR
+388A 00104 TIA_BANK_WritePageBankStick_End
+388A 0E40 00105 movlw 0x40 ; increment EEPROM address by 0x40
+388C 26A9 00106 addwf EEADR, F
+ 00107 rgoto TIA_BANK_WritePage_End
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 67
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+388E D018 M bra label
+ 00108
+3890 00109 TIA_BANK_WritePageInternal
+3890 6A12 00110 clrf TIA_PRESET
+3892 0E00 00111 movlw 0x00
+3894 0F00 00112 addlw DEFAULT_EE_READONLY ; exit if EE_READONLY
+3896 E005 00113 bz TIA_BANK_WritePageInternalLoop
+ 00114 ;; Internal EE Readonly Error #1
+3898 0E01 00115 movlw 0x01
+389A 6E26 00116 movwf TIA_SYSEX_ERROR
+389C 0E40 00117 movlw 0x40
+389E 26A9 00118 addwf EEADR, F ; increment EEADR
+ 00119 rgoto TIA_BANK_WritePage_End ; and goto next
+38A0 D00F M bra label
+ 00120 ;; write 64 bytes
+38A2 00121 TIA_BANK_WritePageInternalLoop
+ 00122 ;; don't write if address in range between 0x7c and 0x7f (used to save channel and device number)
+ 00123 BRA_IFSET EEADR, 7, ACCESS, TIA_BANK_WritePageInternal_Ok
+38A2 BEA9 M btfsc reg, bit, reg_a
+38A4 D005 M bra label
+38A6 0E7B 00124 movlw 0x7c-1
+38A8 64A9 00125 cpfsgt EEADR, ACCESS
+ 00126 rgoto TIA_BANK_WritePageInternal_Ok
+38AA D002 M bra label
+38AC 2AA9 00127 incf EEADR, F ; increment EEADR
+ 00128 rgoto TIA_BANK_WritePage_Next ; and goto next
+38AE D005 M bra label
+38B0 00129 TIA_BANK_WritePageInternal_Ok
+38B0 50A9 00130 movf EEADR, W
+38B2 0B3F 00131 andlw 0x3f
+38B4 50E3 00132 movf PLUSW1, W ; get byte from buffer
+38B6 ECB2 F016 00133 call MIOS_EEPROM_Write ; write to EEPROM
+ 00134 ;; here we could add an error exception handler
+38BA 00135 TIA_BANK_WritePage_Next
+38BA 50A9 00136 movf EEADR, W
+38BC 0B3F 00137 andlw 0x3f
+38BE E1F1 00138 bnz TIA_BANK_WritePageInternalLoop
+ 00139
+38C0 00140 TIA_BANK_WritePage_End
+ 00141 SET_BSR TIA_BASE ; fix BSR after a MIOS routine has been called
+38C0 0101 M movlb HIGH(reg)
+38C2 0012 00142 return
+ 00143
+ 00144
+ 00145 ;; --------------------------------------------------------------------------
+ 00146 ;; Read data from EEPROM or BankStick
+ 00147 ;; IN: address offset in EEADR,
+ 00148 ;; internal perset in EEADRH,
+ 00149 ;; Patch number in MIOS_PARAMETER2,
+ 00150 ;; Bank number in TIA_BANK.
+ 00151 ;; OUT: 7-bit result in WREG, increments address
+ 00152 ;; --------------------------------------------------------------------------
+ 00153
+38C4 00154 TIA_BANK_Read
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 68
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00155 ;; branch to internal patch if bankstick is not available or Patch is 0
+38C4 5011 00156 movf TIA_BANK, W
+38C6 D82B 00157 rcall TIA_BANK_GetBankStickReady
+38C8 E00B 00158 bz TIA_BANK_ReadInternal
+38CA 5012 00159 movf TIA_PRESET, W
+38CC E009 00160 bz TIA_BANK_ReadInternal
+ 00161
+38CE D834 00162 rcall TIA_BANK_GetBankStickSize
+38D0 E102 00163 bnz TIA_BANK_ReadBankStick
+ 00164
+38D2 BC12 00165 btfsc TIA_PRESET, 6
+ 00166 rgoto TIA_BANK_Read_End
+38D4 D008 M bra label
+ 00167
+38D6 00168 TIA_BANK_ReadBankStick ; BankStick read:
+38D6 D80C 00169 rcall TIA_BANK_SetBankStickAddress
+38D8 ECB8 F016 00170 call MIOS_BANKSTICK_Read ; read content
+38DC 2AA9 00171 incf EEADR, F ; increment EEPROM address
+ 00172 rgoto TIA_BANK_Read_End
+38DE D003 M bra label
+ 00173
+38E0 00174 TIA_BANK_ReadInternal
+38E0 6A12 00175 clrf TIA_PRESET
+38E2 ECB0 F016 00176 call MIOS_EEPROM_Read
+ 00177
+38E6 00178 TIA_BANK_Read_End
+ 00179 SET_BSR TIA_BASE ; fix BSR after a MIOS routine has been called
+38E6 0101 M movlb HIGH(reg)
+38E8 0012 00180 return
+ 00181
+ 00182
+ 00183 ;; --------------------------------------------------------------------------
+ 00184 ;; This function sets a BankStick address
+ 00185 ;; IN: patch offset in EEADR
+ 00186 ;; patch number in MIOS_PARAMETER2
+ 00187 ;; BankStick number in TIA_BANK
+ 00188 ;; OUT: address in MIOS_PARAMETER[12]
+ 00189 ;; BankStick selected via MIOS_BANKSTICK_CtrlSet
+ 00190 ;; --------------------------------------------------------------------------
+38EA 00191 TIA_BANK_SetBankStickAddressMagic
+38EA 6A03 00192 clrf MIOS_PARAMETER1
+38EC 6A04 00193 clrf MIOS_PARAMETER2
+ 00194 rgoto TIA_BANK_SetBankStickAddress_Cont
+38EE D006 M bra label
+ 00195
+38F0 00196 TIA_BANK_SetBankStickAddress
+ 00197
+38F0 CFA9 F003 00198 movff EEADR, MIOS_PARAMETER1 ; copy address to low-byte
+38F4 B012 00199 btfsc TIA_PRESET, 0
+38F6 8E03 00200 bsf MIOS_PARAMETER1, 7 ; select upper address range on odd bank number
+38F8 4012 00201 rrncf TIA_PRESET, W ; high-byte
+38FA 6E04 00202 movwf MIOS_PARAMETER2
+ 00203
+38FC 00204 TIA_BANK_SetBankStickAddress_Cont
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 69
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+38FC 501A 00205 movf TIA_BANKSTICK_ID, W
+38FE ECEE F016 00206 call MIOS_BANKSTICK_CtrlSet
+ 00207
+3902 D81A 00208 rcall TIA_BANK_GetBankStickSize
+3904 B4D8 00209 skpnz
+ 00210 rgoto TIA_BANK_SetBankStickAddress_32k
+3906 D005 M bra label
+ 00211
+3908 00212 TIA_BANK_SetBankStickAddress_64k
+3908 B011 00213 btfsc TIA_BANK, 0
+390A 8C04 00214 bsf MIOS_PARAMETER2, 6
+390C B211 00215 btfsc TIA_BANK, 1
+390E 8E04 00216 bsf MIOS_PARAMETER2, 7
+ 00217 rgoto TIA_BANK_SetBankStickAddress_End
+3910 D005 M bra label
+ 00218
+3912 00219 TIA_BANK_SetBankStickAddress_32k
+3912 9A04 00220 bcf MIOS_PARAMETER2, 5
+3914 B011 00221 btfsc TIA_BANK, 0
+3916 8A04 00222 bsf MIOS_PARAMETER2, 5
+3918 B211 00223 btfsc TIA_BANK, 1
+391A 8C04 00224 bsf MIOS_PARAMETER2, 6
+ 00225
+391C 00226 TIA_BANK_SetBankStickAddress_End
+391C 0012 00227 return
+ 00228
+ 00229
+ 00230 ;; --------------------------------------------------------------------------
+ 00231 ;; This function returns the bankstick available status for the current bank
+ 00232 ;; IN: Bank number WREG
+ 00233 ;; OUT: WREG != 0 when bankstick available
+ 00234 ;; --------------------------------------------------------------------------
+391E 00235 TIA_BANK_GetBankStickReady
+391E 40E8 00236 rrncf WREG, W
+3920 40E8 00237 rrncf WREG, W
+3922 0B07 00238 andlw 0x07
+3924 6E1A 00239 movwf TIA_BANKSTICK_ID
+3926 ECC6 F016 00240 call MIOS_HLP_GetBitORMask
+392A 141B 00241 andwf TIA_BANKSTICK_RDY, W
+392C 0012 00242 return
+ 00243
+ 00244 ;; --------------------------------------------------------------------------
+ 00245 ;; This function returns the bankstick available status for the current bank
+ 00246 ;; IN: BankStick number in TIA_PBANK
+ 00247 ;; OUT: WREG != 0 when bankstick available
+ 00248 ;; --------------------------------------------------------------------------
+392E 00249 TIA_BANK_GetBankStickAvailable
+392E 501A 00250 movf TIA_BANKSTICK_ID, W
+3930 ECC6 F016 00251 call MIOS_HLP_GetBitORMask
+3934 141C 00252 andwf TIA_BANKSTICK_STAT, W
+3936 0012 00253 return
+ 00254 ;; --------------------------------------------------------------------------
+ 00255 ;; This function returns the bankstick available status for the current bank
+ 00256 ;; IN: BankStick number in TIA_BANKSTICK_ID
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 70
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00257 ;; OUT: BankStick size in WREG and TIA_BANKSTICK_SIZE
+ 00258 ;; --------------------------------------------------------------------------
+3938 00259 TIA_BANK_GetBankStickSize
+3938 501A 00260 movf TIA_BANKSTICK_ID, W
+393A ECC6 F016 00261 call MIOS_HLP_GetBitORMask
+393E 141D 00262 andwf TIA_BANKSTICK_SIZE, W
+3940 0012 00263 return
+ 00264
+ 00265
+ 00266
+ 00267 ;; --------------------------------------------------------------------------
+ 00268 ;; selects address of magic number depending on TIA_BANKSTICK_CHK_CTR
+ 00269 ;; TIA_BANKSTICK_CHK_CTR or TIA_PBANK
+ 00270 ;; --------------------------------------------------------------------------
+3942 00271 TIA_BANK_CheckStick_SelectMagic
+ 00272 ;; select BankStick depending on TIA_BANKSTICK_CHK_CTR
+3942 6E05 00273 movwf MIOS_PARAMETER3
+3944 40E8 00274 rrncf WREG, W
+3946 40E8 00275 rrncf WREG, W
+3948 0B07 00276 andlw 0x07
+394A 0F80 00277 addlw 0x80 ; (Enable verify slower write accesses)
+394C ECEE F016 00278 call MIOS_BANKSTICK_CtrlSet
+ 00279
+ 00280 ;; determine if this is a 64k BankStick:
+ 00281 ;; read from address 0x8000, store value in PRODL
+3950 0E0F 00282 movlw 0x0f ;; between 0x03 - 0x7f
+3952 6E03 00283 movwf MIOS_PARAMETER1
+3954 0E80 00284 movlw 0x80
+3956 6E04 00285 movwf MIOS_PARAMETER2
+3958 ECB8 F016 00286 call MIOS_BANKSTICK_Read
+395C 6EF3 00287 movwf PRODL
+ 00288
+ 00289 ;; add 0x42 and write number to 0x0000
+395E 0E0F 00290 movlw 0x0f ;; between 0x03 - 0x7f
+3960 6E03 00291 movwf MIOS_PARAMETER1
+3962 6A04 00292 clrf MIOS_PARAMETER2
+3964 50F3 00293 movf PRODL, W
+3966 0F42 00294 addlw 0x42
+3968 ECBA F016 00295 call MIOS_BANKSTICK_Write
+ 00296
+ 00297 ;; read again number from 0x8000, check if we still see the old value
+396C 0E0F 00298 movlw 0x0f ;; between 0x03 - 0x7f
+396E 6E03 00299 movwf MIOS_PARAMETER1
+3970 0E80 00300 movlw 0x80
+3972 6E04 00301 movwf MIOS_PARAMETER2
+3974 ECB8 F016 00302 call MIOS_BANKSTICK_Read
+3978 18F3 00303 xorwf PRODL, W
+397A E107 00304 bnz TIA_BANK_CheckStick_SelectMagic_32k
+397C 00305 TIA_BANK_CheckStick_SelectMagic_64k ; (64k device)
+ 00306 ;; try to read from BankStick (address 0x0000, 0x4000, 0x8000 or 0xc000)
+397C 6A03 00307 clrf MIOS_PARAMETER1
+397E 6A04 00308 clrf MIOS_PARAMETER2
+3980 B005 00309 btfsc MIOS_PARAMETER3, 0
+3982 8C04 00310 bsf MIOS_PARAMETER2, 6
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 71
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3984 B205 00311 btfsc MIOS_PARAMETER3, 1
+3986 8E04 00312 bsf MIOS_PARAMETER2, 7
+ 00313 rgoto TIA_BANK_CheckStick_SelectMagic_End
+3988 D006 M bra label
+ 00314
+398A 00315 TIA_BANK_CheckStick_SelectMagic_32k ; (32k device)
+ 00316 ;; try to read from BankStick (address 0x0000, 0x2000, 0x4000 or 0x0600)
+398A 6A03 00317 clrf MIOS_PARAMETER1
+398C 6A04 00318 clrf MIOS_PARAMETER2
+398E B005 00319 btfsc MIOS_PARAMETER3, 0
+3990 8A04 00320 bsf MIOS_PARAMETER2, 5
+3992 B205 00321 btfsc MIOS_PARAMETER3, 1
+3994 8C04 00322 bsf MIOS_PARAMETER2, 6
+ 00323 ;; rgoto TIA_BANK_CheckStick_SelectMagic_End
+3996 00324 TIA_BANK_CheckStick_SelectMagic_End
+3996 0012 00325 return
+ 00326
+ 00327
+ 00328
+ 00329
+ 00330
+ 00331 ;; --------------------------------------------------------------------------
+ 00332 ;; Check Stick: try to read from BankStick, clear the appr. flag in
+ 00333 ;; TIA_BANKSTICK_STAT if BankStick not available
+ 00334 ;; --------------------------------------------------------------------------
+3998 00335 TIA_BANK_CheckStick
+ 00336
+ 00337 ;; increment check counter, wrap at 32
+3998 2819 00338 incf TIA_BANKSTICK_CHK_CTR, W
+399A 0B1F 00339 andlw 0x1f
+399C 6E19 00340 movwf TIA_BANKSTICK_CHK_CTR
+ 00341
+399E 90D8 00342 clrc
+39A0 4019 00343 rrncf TIA_BANKSTICK_CHK_CTR, W
+39A2 40E8 00344 rrncf WREG, W
+39A4 0B07 00345 andlw 0x07
+39A6 6E1A 00346 movwf TIA_BANKSTICK_ID
+ 00347
+ 00348 ;; select "magic number" and try to read from BankStick
+39A8 5019 00349 movf TIA_BANKSTICK_CHK_CTR, W
+39AA DFCB 00350 rcall TIA_BANK_CheckStick_SelectMagic
+39AC ECB8 F016 00351 call MIOS_BANKSTICK_Read
+ 00352 ;; this sets the MIOS_BOX_STAT_BS_AVAILABLE flag
+ 00353
+ 00354 ;; save old BankStick status in TMP1
+39B0 C01C F006 00355 movff TIA_BANKSTICK_STAT, TMP1
+ 00356
+ 00357 ;; modify the available flag of current bankstick
+ 00358 BRA_IFSET MIOS_BOX_STAT, MIOS_BOX_STAT_BS_AVAILABLE, ACCESS, TIA_BANK_CheckStick_AccPassed
+39B4 B002 M btfsc reg, bit, reg_a
+39B6 D005 M bra label
+39B8 00359 TIA_BANK_CheckStick_AccFailed
+39B8 501A 00360 movf TIA_BANKSTICK_ID, W
+39BA ECC4 F016 00361 call MIOS_HLP_GetBitANDMask
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 72
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+39BE 141C 00362 andwf TIA_BANKSTICK_STAT, W
+ 00363 rgoto TIA_BANK_CheckStick_AccCont
+39C0 D004 M bra label
+39C2 00364 TIA_BANK_CheckStick_AccPassed
+39C2 501A 00365 movf TIA_BANKSTICK_ID, W
+39C4 ECC6 F016 00366 call MIOS_HLP_GetBitORMask
+39C8 101C 00367 iorwf TIA_BANKSTICK_STAT, W
+39CA 00368 TIA_BANK_CheckStick_AccCont
+39CA 6E07 00369 movwf TMP2
+ 00370
+ 00371 ;; check if flag has been changed
+39CC 5007 00372 movf TMP2, W
+39CE 1806 00373 xorwf TMP1, W
+39D0 E008 00374 bz TIA_BANK_CheckStick_End
+39D2 8010 00375 bsf TIA_STAT, TIA_STAT_ENGINE_DISABLE, ACCESS
+ 00376
+ 00377 ;; flag changed - branch depending on available status
+39D4 501A 00378 movf TIA_BANKSTICK_ID, W
+39D6 ECC6 F016 00379 call MIOS_HLP_GetBitORMask
+39DA 1407 00380 andwf TMP2, W
+39DC E14A 00381 bnz TIA_BANK_CheckStick_Ext
+ 00382 rgoto TIA_BANK_CheckStick_Int
+39DE D002 M bra label
+39E0 9010 00383 bcf TIA_STAT, TIA_STAT_ENGINE_DISABLE
+39E2 00384 TIA_BANK_CheckStick_End
+39E2 0012 00385 return
+ 00386
+ 00387
+ 00388
+ 00389
+ 00390 ;; ------------------------------------------------------------------
+ 00391 ;; --> Internal Patch
+39E4 00392 TIA_BANK_CheckStick_Int
+ 00393
+ 00394 ;; reset size
+39E4 5007 00395 movf TMP2, W
+39E6 161D 00396 andwf TIA_BANKSTICK_SIZE, F
+ 00397
+39E8 00398 TIA_BANK_CheckStick_Int_StatOk
+39E8 C007 F01C 00399 movff TMP2, TIA_BANKSTICK_STAT
+39EC ECA7 F01B 00400 call TIA_LEDMTR_PlayOtoR ;; play mled orange to red pattern
+39F0 ECD8 F01E 00401 call TIA_TUNE_PlayDisconnect ;; play tune 5
+39F4 ECBD F01B 00402 call TIA_LEDMTR_Player_Off
+ 00403
+ 00404 ;; branch depending on patch/kit BankStick
+ 00405 #if DEFAULT_BS_KBANK_ID >= 0 && DEFAULT_BS_KBANK_ID <= 7
+39F8 0E03 00406 movlw DEFAULT_BS_KBANK_ID-1
+39FA 641A 00407 cpfsgt TIA_BANKSTICK_ID, ACCESS
+ 00408 rgoto TIA_BANK_CheckStick_Int_P
+39FC D026 M bra label
+39FE B219 00409 btfsc TIA_BANKSTICK_CHK_CTR, 1
+ 00410 rgoto TIA_BANK_CheckStick_Int_WT
+3A00 D012 M bra label
+ 00411
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 73
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3A02 00412 TIA_BANK_CheckStick_Int_K
+3A02 501A 00413 movf TIA_BANKSTICK_ID, W ;; clear flag
+3A04 ECC4 F016 00414 call MIOS_HLP_GetBitANDMask
+3A08 161B 00415 andwf TIA_BANKSTICK_RDY, F
+3A0A 0E05 00416 movlw 0x05 ;;send CFG_BSInfo ;; send sysex CFG BS infos
+3A0C 6E25 00417 movwf TIA_SYSEX_ADDRESS
+3A0E ECDE F02B 00418 call _TIA_SYSEX_End_CFG_Read
+3A12 5019 00419 movf TIA_BANKSTICK_CHK_CTR, W
+3A14 1816 00420 xorwf TIA_KBANK, W
+3A16 E12C 00421 bnz TIA_BANK_CheckStick_Int_End
+3A18 6A16 00422 clrf TIA_KBANK ;; Reinit to...
+3A1A 6A15 00423 clrf TIA_KIT
+3A1C 0E0F 00424 movlw 0x0f ;; send sysex CFG All
+3A1E 6E25 00425 movwf TIA_SYSEX_ADDRESS
+3A20 ECDE F02B 00426 call _TIA_SYSEX_End_CFG_Read ;; ...internal patch
+ 00427 rgoto TIA_BANK_CheckStick_Int_End
+3A24 D025 M bra label
+ 00428
+3A26 00429 TIA_BANK_CheckStick_Int_WT
+3A26 501A 00430 movf TIA_BANKSTICK_ID, W ;; clear flag
+3A28 ECC4 F016 00431 call MIOS_HLP_GetBitANDMask
+3A2C 161B 00432 andwf TIA_BANKSTICK_RDY, F
+3A2E 0E05 00433 movlw 0x05 ;;send CFG_BSInfo ;; send sysex CFG BS infos
+3A30 6E25 00434 movwf TIA_SYSEX_ADDRESS
+3A32 ECDE F02B 00435 call _TIA_SYSEX_End_CFG_Read
+3A36 5019 00436 movf TIA_BANKSTICK_CHK_CTR, W
+3A38 1818 00437 xorwf TIA_WBANK, W
+3A3A E11A 00438 bnz TIA_BANK_CheckStick_Int_End
+3A3C 6A18 00439 clrf TIA_WBANK ;; Reinit to...
+3A3E 6A17 00440 clrf TIA_WT
+3A40 0E0F 00441 movlw 0x0f ;; send sysex CFG All
+3A42 6E25 00442 movwf TIA_SYSEX_ADDRESS
+3A44 ECDE F02B 00443 call _TIA_SYSEX_End_CFG_Read ;; ...internal patch
+ 00444 rgoto TIA_BANK_CheckStick_Int_End
+3A48 D013 M bra label
+ 00445 #endif ;; DEFAULT_BS_KBANK_ID >= 0 && DEFAULT_BS_KBANK_ID <= 7
+ 00446
+3A4A 00447 TIA_BANK_CheckStick_Int_P
+3A4A 501A 00448 movf TIA_BANKSTICK_ID, W ;; clear flag
+3A4C ECC4 F016 00449 call MIOS_HLP_GetBitANDMask
+3A50 161B 00450 andwf TIA_BANKSTICK_RDY, F
+3A52 0E05 00451 movlw 0x05 ;;send CFG_BSInfo ;; send sysex CFG BS infos
+3A54 6E25 00452 movwf TIA_SYSEX_ADDRESS
+3A56 ECDE F02B 00453 call _TIA_SYSEX_End_CFG_Read
+3A5A 5019 00454 movf TIA_BANKSTICK_CHK_CTR, W
+3A5C 1814 00455 xorwf TIA_PBANK, W
+3A5E E108 00456 bnz TIA_BANK_CheckStick_Int_End
+3A60 6A14 00457 clrf TIA_PBANK ;; Reinit to...
+3A62 6A13 00458 clrf TIA_PATCH
+3A64 0E0F 00459 movlw 0x0f ;; send sysex CFG All
+3A66 6E25 00460 movwf TIA_SYSEX_ADDRESS
+3A68 ECDE F02B 00461 call _TIA_SYSEX_End_CFG_Read ;; ...internal patch
+3A6C ECCE F01B 00462 call TIA_PATCH_Init
+ 00463 ;;rgoto TIA_BANK_CheckStick_Int_End
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 74
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00464
+3A70 00465 TIA_BANK_CheckStick_Int_End
+3A70 0012 00466 return
+ 00467
+ 00468
+ 00469 ;; ------------------------------------------------------------------
+ 00470 ;; --> External Patch
+3A72 00471 TIA_BANK_CheckStick_Ext
+ 00472 ;; TABLE_ADDR TEXT_EXTBANK_0 ; print message
+ 00473 ;; call MIOS_LCD_PrintMessage
+ 00474 ;; call MIOS_LCD_PrintMessage
+ 00475
+ 00476 ;; new setup will be reloaded automatically
+ 00477 ;; set reinit counter - CS configuration will be restored after one second
+ 00478 ;movlw 10
+ 00479 ;movwf CS_MENU_REINIT_CFG_CTR
+ 00480
+ 00481 ;; now check if the magic numbers exist in bankstick bank - if not, format bank automatically
+3A72 0E32 00482 movlw 50 ; wait some ms to get a stable status
+3A74 ECCE F016 00483 call MIOS_Delay
+ 00484
+3A78 5019 00485 movf TIA_BANKSTICK_CHK_CTR, W
+3A7A DF63 00486 rcall TIA_BANK_CheckStick_SelectMagic
+3A7C ECB8 F016 00487 call MIOS_BANKSTICK_Read
+3A80 0A77 00488 xorlw BANKSTICK_MAGIC0 ; branch to unformatted message if number not equal
+3A82 A4D8 00489 skpz
+ 00490 rgoto TIA_BANK_CheckStick_Unformatted
+3A84 D064 M bra label
+ 00491
+ 00492 ;; magic numbers are different between Patch/Kit-WT bankstick
+ 00493 #if DEFAULT_BS_KBANK_ID >= 0 && DEFAULT_BS_KBANK_ID <= 7
+3A86 0E03 00494 movlw DEFAULT_BS_KBANK_ID-1
+3A88 641A 00495 cpfsgt TIA_BANKSTICK_ID, ACCESS
+ 00496 rgoto TIA_BANK_CheckStick_Ext_P
+3A8A D011 M bra label
+ 00497
+ 00498 ;; Kit / Wavetable
+3A8C 00499 TIA_BANK_CheckStick_Ext_K
+ 00500 ;; Magic ( Kit suite)
+ 00501 ;; set bankstick type depending on second byte (BANKSTICK_MAGICK/P)
+3A8C ECB8 F016 00502 call MIOS_BANKSTICK_Read
+3A90 6E06 00503 movwf TMP1
+3A92 0A13 00504 xorlw BANKSTICK_MAGICK
+3A94 E009 00505 bz TIA_BANK_CheckStrick_Ext_Type_K
+3A96 00506 TIA_BANK_CheckStrick_Ext_Type_NotK
+3A96 5006 00507 movf TMP1, W
+3A98 0A12 00508 xorlw BANKSTICK_MAGICP
+3A9A A4D8 00509 skpz
+ 00510 rgoto TIA_BANK_CheckStick_Unformatted ;; format
+3A9C D058 M bra label
+3A9E 0E01 00511 movlw DEFAULT_BS_FPROTECT ;; type format protection
+3AA0 0A01 00512 xorlw 0x01
+3AA2 B4D8 00513 skpnz
+ 00514 rgoto TIA_BANK_CheckStick_Unformatted_TProtect ;; exit
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 75
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3AA4 D060 M bra label
+ 00515 rgoto TIA_BANK_CheckStick_Unformatted ;; format
+3AA6 D053 M bra label
+3AA8 00516 TIA_BANK_CheckStrick_Ext_Type_K
+3AA8 0E13 00517 movlw BANKSTICK_MAGICK ;; valid type
+3AAA 6E06 00518 movwf TMP1
+ 00519 rgoto TIA_BANK_CheckStick_Ext_Size
+3AAC D010 M bra label
+ 00520 #endif ;; DEFAULT_BS_KBANK_ID >= 0 && DEFAULT_BS_KBANK_ID <= 7
+ 00521
+ 00522 ;; Patch
+3AAE 00523 TIA_BANK_CheckStick_Ext_P
+ 00524 ;; Magic (Patch suite)
+ 00525 ;; set bankstick type depending on second byte (BANKSTICK_MAGICK/P)
+3AAE ECB8 F016 00526 call MIOS_BANKSTICK_Read
+3AB2 6E06 00527 movwf TMP1
+3AB4 0A12 00528 xorlw BANKSTICK_MAGICP
+3AB6 E009 00529 bz TIA_BANK_CheckStrick_Ext_Type_P
+3AB8 00530 TIA_BANK_CheckStrick_Ext_Type_NotP
+3AB8 5006 00531 movf TMP1, W
+3ABA 0A13 00532 xorlw BANKSTICK_MAGICK
+3ABC A4D8 00533 skpz
+ 00534 rgoto TIA_BANK_CheckStick_Unformatted ;; format
+3ABE D047 M bra label
+3AC0 0E01 00535 movlw DEFAULT_BS_FPROTECT ;; type format protection
+3AC2 0A01 00536 xorlw 0x01
+3AC4 B4D8 00537 skpnz
+ 00538 rgoto TIA_BANK_CheckStick_Unformatted_TProtect ;; exit
+3AC6 D04F M bra label
+ 00539 rgoto TIA_BANK_CheckStick_Unformatted ;; format
+3AC8 D042 M bra label
+3ACA 00540 TIA_BANK_CheckStrick_Ext_Type_P ;; valid type
+3ACA 0E12 00541 movlw BANKSTICK_MAGICP
+3ACC 6E06 00542 movwf TMP1
+ 00543 ;;rgoto TIA_BANK_CheckStick_Ext_Size
+ 00544
+3ACE 00545 TIA_BANK_CheckStick_Ext_Size
+ 00546 ;; set bankstick size depending on third byte (32=32k, 64=64k)
+3ACE 501A 00547 movf TIA_BANKSTICK_ID, W
+3AD0 ECC4 F016 00548 call MIOS_HLP_GetBitANDMask
+3AD4 161D 00549 andwf TIA_BANKSTICK_SIZE, F ;; clear size
+3AD6 ECB8 F016 00550 call MIOS_BANKSTICK_Read
+3ADA 0A40 00551 xorlw 64
+3ADC E104 00552 bnz TIA_BANK_CheckStrick_Ext_Not64k
+3ADE 00553 TIA_BANK_CheckStrick_Ext_64k
+3ADE 501A 00554 movf TIA_BANKSTICK_ID, W
+3AE0 ECC6 F016 00555 call MIOS_HLP_GetBitORMask
+3AE4 121D 00556 iorwf TIA_BANKSTICK_SIZE, F ;; set size
+3AE6 00557 TIA_BANK_CheckStrick_Ext_Not64k
+ 00558
+3AE6 00559 TIA_BANK_CheckStick_Ext_Fix ; to do if necessary...
+ 00560 ;; fix patches if required (and enabled via ENABLE_PATCH_FIXING)
+ 00561 ;movff TIA_BANKSTICK_CHK_CTR, TIA_PBANK
+ 00562 ;rcall TIA_BANK_FixPatches
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 76
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00563 ;; ok
+ 00564
+3AE6 00565 TIA_BANK_CheckStick_Ext_Stat
+ 00566
+3AE6 5019 00567 movf TIA_BANKSTICK_CHK_CTR, W
+ 00568
+3AE8 5019 00569 movf TIA_BANKSTICK_CHK_CTR, W ;; test 1st bank of current BS
+3AEA 0B1C 00570 andlw 0x1c
+3AEC DF2A 00571 rcall TIA_BANK_CheckStick_SelectMagic
+3AEE ECB8 F016 00572 call MIOS_BANKSTICK_Read ;; read first byte from BankStick (magic0)
+3AF2 0A77 00573 xorlw BANKSTICK_MAGIC0 ;; branch to unformatted message if number not equal
+3AF4 E12B 00574 bnz TIA_BANK_CheckStick_Ext_Stat_NotOk
+3AF6 ECB8 F016 00575 call MIOS_BANKSTICK_Read ;; read second byte from BankStick (magicPK)
+3AFA 1806 00576 xorwf TMP1, W ;; branch to unformatted message if number not equal
+3AFC E127 00577 bnz TIA_BANK_CheckStick_Ext_Stat_NotOk
+ 00578
+3AFE 5019 00579 movf TIA_BANKSTICK_CHK_CTR, W ;; test 2nd bank of current BS
+3B00 0B1C 00580 andlw 0x1c
+3B02 0F01 00581 addlw 0x01
+3B04 DF1E 00582 rcall TIA_BANK_CheckStick_SelectMagic
+3B06 ECB8 F016 00583 call MIOS_BANKSTICK_Read ;; read first byte from BankStick (magic0)
+3B0A 0A77 00584 xorlw BANKSTICK_MAGIC0 ;; branch to unformatted message if number not equal
+3B0C E11F 00585 bnz TIA_BANK_CheckStick_Ext_Stat_NotOk
+3B0E ECB8 F016 00586 call MIOS_BANKSTICK_Read ;; read second byte from BankStick (magicPK)
+3B12 1806 00587 xorwf TMP1, W ;; branch to unformatted message if number not equal
+3B14 E11B 00588 bnz TIA_BANK_CheckStick_Ext_Stat_NotOk
+ 00589
+3B16 5019 00590 movf TIA_BANKSTICK_CHK_CTR, W ;; test 3rd bank of current BS
+3B18 0B1C 00591 andlw 0x1c
+3B1A 0F02 00592 addlw 0x02
+3B1C DF12 00593 rcall TIA_BANK_CheckStick_SelectMagic
+3B1E ECB8 F016 00594 call MIOS_BANKSTICK_Read ;; read first byte from BankStick (magic0)
+3B22 0A77 00595 xorlw BANKSTICK_MAGIC0 ;; branch to unformatted message if number not equal
+3B24 E113 00596 bnz TIA_BANK_CheckStick_Ext_Stat_NotOk
+3B26 ECB8 F016 00597 call MIOS_BANKSTICK_Read ;; read second byte from BankStick (magicPK)
+3B2A 1806 00598 xorwf TMP1, W ;; branch to unformatted message if number not equal
+3B2C E10F 00599 bnz TIA_BANK_CheckStick_Ext_Stat_NotOk
+ 00600
+3B2E 5019 00601 movf TIA_BANKSTICK_CHK_CTR, W ;; test 4th bank of current BS
+3B30 0B1C 00602 andlw 0x1c
+3B32 0F03 00603 addlw 0x03
+3B34 DF06 00604 rcall TIA_BANK_CheckStick_SelectMagic
+3B36 ECB8 F016 00605 call MIOS_BANKSTICK_Read ;; read first byte from BankStick (magic0)
+3B3A 0A77 00606 xorlw BANKSTICK_MAGIC0 ;; branch to unformatted message if number not equal
+3B3C E107 00607 bnz TIA_BANK_CheckStick_Ext_Stat_NotOk
+3B3E ECB8 F016 00608 call MIOS_BANKSTICK_Read ;; read second byte from BankStick (magicPK)
+3B42 1806 00609 xorwf TMP1, W ;; branch to unformatted message if number not equal
+3B44 E103 00610 bnz TIA_BANK_CheckStick_Ext_Stat_NotOk
+ 00611
+3B46 00612 TIA_BANK_CheckStick_Ext_Stat_Ok
+3B46 C007 F01C 00613 movff TMP2, TIA_BANKSTICK_STAT ;; status is set
+ 00614 rgoto TIA_BANK_CheckStick_Ext_ReadySet
+3B4A D02A M bra label
+3B4C 00615 TIA_BANK_CheckStick_Ext_Stat_NotOk ;; status not ready
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 77
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00616 rgoto TIA_BANK_CheckStick_Ext_End ;; end
+3B4C D038 M bra label
+ 00617
+3B4E 00618 TIA_BANK_CheckStick_Unformatted
+3B4E 0E01 00619 movlw DEFAULT_BS_FPROTECT ;; BS format inhibit
+3B50 0A02 00620 xorlw 0x02
+3B52 E006 00621 bz TIA_BANK_CheckStick_Unformatted_FProtect
+ 00622
+3B54 C019 F011 00623 movff TIA_BANKSTICK_CHK_CTR, TIA_BANK
+3B58 D854 00624 rcall TIA_BANK_FormatStick ;; --> format bankstick
+3B5A C011 F019 00625 movff TIA_BANK, TIA_BANKSTICK_CHK_CTR
+ 00626 rgoto TIA_BANK_CheckStick_Ext_End ;; end
+3B5E D02F M bra label
+ 00627
+3B60 00628 TIA_BANK_CheckStick_Unformatted_FProtect
+3B60 C007 F01C 00629 movff TMP2, TIA_BANKSTICK_STAT ;; status is set
+ 00630 rgoto TIA_BANK_CheckStick_Ext_ReadyClr
+3B64 D003 M bra label
+ 00631
+3B66 00632 TIA_BANK_CheckStick_Unformatted_TProtect
+3B66 C007 F01C 00633 movff TMP2, TIA_BANKSTICK_STAT ;; status is set
+ 00634 rgoto TIA_BANK_CheckStick_Ext_ReadyClr
+3B6A D000 M bra label
+ 00635
+3B6C 00636 TIA_BANK_CheckStick_Ext_ReadyClr
+3B6C 501A 00637 movf TIA_BANKSTICK_ID, W ;; clear flag
+3B6E ECC4 F016 00638 call MIOS_HLP_GetBitANDMask
+3B72 161B 00639 andwf TIA_BANKSTICK_RDY, F
+3B74 ECA7 F01B 00640 call TIA_LEDMTR_PlayOtoR ;; play mled orange to red pattern
+3B78 EC04 F01F 00641 call TIA_TUNE_PlayWrong ;; play wrong tune
+3B7C ECBD F01B 00642 call TIA_LEDMTR_Player_Off
+3B80 0E05 00643 movlw 0x05 ;;send CFG_BSInfo ;; send sysex CFG BS infos
+3B82 6E25 00644 movwf TIA_SYSEX_ADDRESS
+3B84 ECDE F02B 00645 call _TIA_SYSEX_End_CFG_Read
+3B88 5019 00646 movf TIA_BANKSTICK_CHK_CTR, W
+3B8A 1814 00647 xorwf TIA_PBANK, W
+3B8C E118 00648 bnz TIA_BANK_CheckStick_Ext_End
+3B8E 6A14 00649 clrf TIA_PBANK ;; Reinit to...
+3B90 6A12 00650 clrf TIA_PRESET
+3B92 0E0F 00651 movlw 0x0f ;; send sysex CFG All
+3B94 6E25 00652 movwf TIA_SYSEX_ADDRESS
+3B96 ECDE F02B 00653 call _TIA_SYSEX_End_CFG_Read ;; ...internal patch
+3B9A 9010 00654 bcf TIA_STAT, TIA_STAT_ENGINE_DISABLE
+3B9C EFCE F01B 00655 goto TIA_PATCH_Init
+ 00656 ;;rgoto TIA_BANK_CheckStick_Ext_End
+ 00657
+3BA0 00658 TIA_BANK_CheckStick_Ext_ReadySet
+3BA0 501A 00659 movf TIA_BANKSTICK_ID, W ;; set flag
+3BA2 ECC6 F016 00660 call MIOS_HLP_GetBitORMask
+3BA6 121B 00661 iorwf TIA_BANKSTICK_RDY, F
+3BA8 EC9B F01B 00662 call TIA_LEDMTR_PlayOtoG ;; play mled orange to green pattern
+3BAC ECEE F01E 00663 call TIA_TUNE_PlayOk ;; play ready tune
+3BB0 ECBD F01B 00664 call TIA_LEDMTR_Player_Off
+3BB4 0E05 00665 movlw 0x05 ;;send CFG_BSInfo ;; send sysex CFG BS infos
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 78
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3BB6 6E25 00666 movwf TIA_SYSEX_ADDRESS
+3BB8 ECDE F02B 00667 call _TIA_SYSEX_End_CFG_Read
+3BBC 9010 00668 bcf TIA_STAT, TIA_STAT_ENGINE_DISABLE
+ 00669 ;;rgoto TIA_BANK_CheckStick_Ext_End
+ 00670
+3BBE 00671 TIA_BANK_CheckStick_Ext_End
+3BBE 0012 00672 return
+ 00673
+ 00674
+ 00675
+ 00676 ;; --------------------------------------------------------------------------
+ 00677 ;; Format Stick: copy the lead default patch into the currently selected BankStick Bank
+ 00678 ;; IN: bank number in TIA_PBANK
+ 00679 ;; --------------------------------------------------------------------------
+3BC0 00680 TEXT_FORMATBANK_0 STRING 20, 0x00, "* Formatting xxk * "
+3BC0 1400 202A M da ((length) << 8) | (pos), str
+ 6F46 6D72
+ 7461 6974
+ 676E 7820
+ 6B78 2A20
+ 2020
+3BD6 00681 TEXT_FORMATBANK_1 STRING 20, 0x40, "* Patch x 0 * "
+3BD6 1440 202A M da ((length) << 8) | (pos), str
+ 6150 6374
+ 2068 2078
+ 3020 2020
+ 2020 2A20
+ 2020
+3BEC 00682 TEXT_FORMATBANK_K STRING 20, 0x40, "* Ensemble 000 * "
+3BEC 1440 202A M da ((length) << 8) | (pos), str
+ 6E45 6573
+ 626D 656C
+ 3020 3030
+ 2020 2A20
+ 2020
+ 00683
+3C02 00684 TIA_BANK_FormatStick
+ 00685 ;; select BankStick depending on TIA_BANKSTICK_CHK_CTR
+3C02 4011 00686 rrncf TIA_BANK, W
+3C04 40E8 00687 rrncf WREG, W
+3C06 0B07 00688 andlw 0x07
+3C08 6E1A 00689 movwf TIA_BANKSTICK_ID
+3C0A ECEE F016 00690 call MIOS_BANKSTICK_CtrlSet
+ 00691
+3C0E EC83 F01B 00692 call TIA_LEDMTR_PlayFormat_R
+ 00693
+ 00694 ;; determine if this is a 64k BankStick:
+ 00695 ;; read from address 0x8000, store value in PRODL
+3C12 0E0F 00696 movlw 0x0f ;; between 0x03 - 0x7f
+3C14 6E03 00697 movwf MIOS_PARAMETER1
+3C16 0E80 00698 movlw 0x80
+3C18 6E04 00699 movwf MIOS_PARAMETER2
+3C1A ECB8 F016 00700 call MIOS_BANKSTICK_Read
+3C1E 6EF3 00701 movwf PRODL
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 79
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00702
+ 00703 ;; add 0x42 and write number to 0x0000
+3C20 0E0F 00704 movlw 0x0f ;; between 0x03 - 0x7f
+3C22 6E03 00705 movwf MIOS_PARAMETER1
+3C24 6A04 00706 clrf MIOS_PARAMETER2
+3C26 50F3 00707 movf PRODL, W
+3C28 0F42 00708 addlw 0x42
+3C2A ECBA F016 00709 call MIOS_BANKSTICK_Write
+3C2E A4D8 00710 skpz
+ 00711 rgoto TIA_BANK_FormatStick_Err_Handler
+3C30 D0B5 M bra label
+ 00712
+ 00713 ;; read again number from 0x8000, check if we still see the old value
+3C32 0E0F 00714 movlw 0x0f ;; between 0x03 - 0x7f
+3C34 6E03 00715 movwf MIOS_PARAMETER1
+3C36 0E80 00716 movlw 0x80
+3C38 6E04 00717 movwf MIOS_PARAMETER2
+3C3A ECB8 F016 00718 call MIOS_BANKSTICK_Read
+3C3E 18F3 00719 xorwf PRODL, W
+3C40 E106 00720 bnz TIA_BANK_FormatStick_32k
+3C42 00721 TIA_BANK_FormatStick_64k
+ 00722 ;; set flag in size register
+3C42 501A 00723 movf TIA_BANKSTICK_ID, W
+3C44 ECC6 F016 00724 call MIOS_HLP_GetBitORMask
+3C48 121D 00725 iorwf TIA_BANKSTICK_SIZE, F
+ 00726 ;; write 64 to address 0x0002
+3C4A 0E40 00727 movlw 64
+ 00728 rgoto TIA_BANK_FormatStick_SizeIDCont
+3C4C D005 M bra label
+3C4E 00729 TIA_BANK_FormatStick_32k
+ 00730 ;; clear flag in size register
+3C4E 501A 00731 movf TIA_BANKSTICK_ID, W
+3C50 ECC4 F016 00732 call MIOS_HLP_GetBitANDMask
+3C54 161D 00733 andwf TIA_BANKSTICK_SIZE, F
+ 00734 ;; write 32 to address 0x0002
+3C56 0E20 00735 movlw 32
+ 00736 ;;rgoto TIA_BANK_FormatStick_SizeIDCont
+3C58 00737 TIA_BANK_FormatStick_SizeIDCont
+3C58 6E06 00738 movwf TMP1
+3C5A 5019 00739 movf TIA_BANKSTICK_CHK_CTR, W
+3C5C DE72 00740 rcall TIA_BANK_CheckStick_SelectMagic
+3C5E 0E02 00741 movlw 0x02
+3C60 6E03 00742 movwf MIOS_PARAMETER1
+3C62 5006 00743 movf TMP1, W
+3C64 ECBA F016 00744 call MIOS_BANKSTICK_Write
+3C68 A4D8 00745 skpz
+ 00746 rgoto TIA_BANK_FormatStick_Err_Handler
+3C6A D098 M bra label
+ 00747
+3C6C 0E32 00748 movlw 50 ; wait some ms to get a stable status
+3C6E ECCE F016 00749 call MIOS_Delay
+ 00750
+ 00751 ;; now branch depending on Ensemble/Patch
+ 00752 #if DEFAULT_BS_KBANK_ID >= 0 && DEFAULT_BS_KBANK_ID <= 7
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 80
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3C72 0E03 00753 movlw DEFAULT_BS_KBANK_ID-1
+3C74 641A 00754 cpfsgt TIA_BANKSTICK_ID, ACCESS
+ 00755 rgoto TIA_BANK_FormatStick_P
+3C76 D022 M bra label
+3C78 B211 00756 btfsc TIA_BANK, 1
+ 00757 rgoto TIA_BANK_FormatStick_WT
+3C7A D010 M bra label
+ 00758
+3C7C 00759 TIA_BANK_FormatStick_K
+ 00760 ;; copy Patch 0 (internal kit) to upload buffer
+3C7C 6AA9 00761 clrf EEADR
+3C7E 0E02 00762 movlw (EEPROM_KIT >> 8) & 0xff
+3C80 6EAA 00763 movwf EEADRH
+3C82 EE02 F000 00764 lfsr FSR0, BANKSTICK_FORMAT_BEGIN
+3C86 00765 TIA_BANK_FormatStick_K_CIntLoop
+3C86 ECB0 F016 00766 call MIOS_EEPROM_Read
+3C8A 6EEE 00767 movwf POSTINC0
+3C8C AEA9 00768 btfss EEADR, 7
+ 00769 rgoto TIA_BANK_FormatStick_K_CIntLoop
+3C8E D7FB M bra label
+ 00770 ;; clear name
+3C90 EE02 F000 00771 lfsr FSR0, BANKSTICK_FORMAT_BEGIN
+3C94 00772 TIA_BANK_FormatStick_K_ClearLoop
+3C94 6AEE 00773 clrf POSTINC0
+ 00774 BRA_IFCLR FSR0L, 4, ACCESS, TIA_BANK_FormatStick_K_ClearLoop
+3C96 A8E9 M btfss reg, bit, reg_a
+3C98 D7FD M bra label
+ 00775 rgoto TIA_BANK_FormatStick_Data
+3C9A D01F M bra label
+ 00776
+3C9C 00777 TIA_BANK_FormatStick_WT
+ 00778 ;; copy Patch 0 (internal patch) to upload buffer
+3C9C 6AA9 00779 clrf EEADR
+3C9E 0E01 00780 movlw (EEPROM_WAVETABLE >> 8) & 0xff
+3CA0 6EAA 00781 movwf EEADRH
+3CA2 EE02 F000 00782 lfsr FSR0, BANKSTICK_FORMAT_BEGIN
+3CA6 00783 TIA_BANK_FormatStick_WT_CIntLoop
+3CA6 ECB0 F016 00784 call MIOS_EEPROM_Read
+3CAA 6EEE 00785 movwf POSTINC0
+3CAC AEA9 00786 btfss EEADR, 7
+ 00787 rgoto TIA_BANK_FormatStick_WT_CIntLoop
+3CAE D7FB M bra label
+ 00788 ;; clear name
+3CB0 EE02 F000 00789 lfsr FSR0, BANKSTICK_FORMAT_BEGIN
+3CB4 00790 TIA_BANK_FormatStick_WT_ClearLoop
+3CB4 6AEE 00791 clrf POSTINC0
+ 00792 BRA_IFCLR FSR0L, 4, ACCESS, TIA_BANK_FormatStick_WT_ClearLoop
+3CB6 A8E9 M btfss reg, bit, reg_a
+3CB8 D7FD M bra label
+ 00793 rgoto TIA_BANK_FormatStick_Data
+3CBA D00F M bra label
+ 00794
+ 00795 #endif ;; DEFAULT_BS_KBANK_ID >= 0 && DEFAULT_BS_KBANK_ID <= 7
+ 00796
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 81
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3CBC 00797 TIA_BANK_FormatStick_P
+ 00798 ;; copy Patch 0 (internal patch) to upload buffer
+3CBC 6AA9 00799 clrf EEADR
+3CBE 0E00 00800 movlw (EEPROM_PATCH >> 8) & 0xff
+3CC0 6EAA 00801 movwf EEADRH
+3CC2 EE02 F000 00802 lfsr FSR0, BANKSTICK_FORMAT_BEGIN
+3CC6 00803 TIA_BANK_FormatStick_P_CIntLoop
+3CC6 ECB0 F016 00804 call MIOS_EEPROM_Read
+3CCA 6EEE 00805 movwf POSTINC0
+3CCC AEA9 00806 btfss EEADR, 7
+ 00807 rgoto TIA_BANK_FormatStick_P_CIntLoop
+3CCE D7FB M bra label
+ 00808 ;; clear name
+3CD0 EE02 F000 00809 lfsr FSR0, BANKSTICK_FORMAT_BEGIN
+3CD4 00810 TIA_BANK_FormatStick_P_ClearLoop
+3CD4 6AEE 00811 clrf POSTINC0
+ 00812 BRA_IFCLR FSR0L, 4, ACCESS, TIA_BANK_FormatStick_P_ClearLoop
+3CD6 A8E9 M btfss reg, bit, reg_a
+3CD8 D7FD M bra label
+ 00813 ;;rgoto TIA_BANK_FormatStick_Data
+ 00814
+ 00815
+ 00816
+ 00817
+3CDA 00818 TIA_BANK_FormatStick_Data
+3CDA EC89 F01B 00819 call TIA_LEDMTR_PlayFormat_O
+ 00820 ;; now format patch 1 to 127 (64k) or 63 (32k)
+3CDE 0E01 00821 movlw 0x01
+3CE0 6EA9 00822 movwf EEADR ; use EEADR as patch ctr
+ 00823 ;; Select BS Adress
+3CE2 6A03 00824 clrf MIOS_PARAMETER1
+3CE4 B0A9 00825 btfsc EEADR, 0
+3CE6 8E03 00826 bsf MIOS_PARAMETER1, 7 ; select upper address range on odd bank number
+3CE8 30A9 00827 rrf EEADR, W
+3CEA 6E04 00828 movwf MIOS_PARAMETER2 ; copy patch to high-byte
+3CEC DE25 00829 rcall TIA_BANK_GetBankStickSize
+3CEE B4D8 00830 skpnz
+ 00831 rgoto TIA_BANK_FormatStick_Data_32k
+3CF0 D005 M bra label
+3CF2 00832 TIA_BANK_FormatStick_Data_64k
+3CF2 B011 00833 btfsc TIA_BANK, 0
+3CF4 8C04 00834 bsf MIOS_PARAMETER2, 6
+3CF6 B211 00835 btfsc TIA_BANK, 1
+3CF8 8E04 00836 bsf MIOS_PARAMETER2, 7
+ 00837 rgoto TIA_BANK_FormatStick_Data_OuterLoop
+3CFA D005 M bra label
+3CFC 00838 TIA_BANK_FormatStick_Data_32k
+3CFC 9A04 00839 bcf MIOS_PARAMETER2, 5
+3CFE B011 00840 btfsc TIA_BANK, 0
+3D00 8A04 00841 bsf MIOS_PARAMETER2, 5
+3D02 B211 00842 btfsc TIA_BANK, 1
+3D04 8C04 00843 bsf MIOS_PARAMETER2, 6
+ 00844
+3D06 00845 TIA_BANK_FormatStick_Data_OuterLoop
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 82
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00846 ;; copy 0x80 words
+3D06 EE12 F000 00847 lfsr FSR1, BANKSTICK_FORMAT_BEGIN
+3D0A 0004 00848 clrwdt ; feed watchdog
+ 00849 ;; buffer already prepared in FSR1
+3D0C ECF2 F016 00850 call MIOS_BANKSTICK_WritePage ; write page
+3D10 A4D8 00851 skpz
+ 00852 rgoto TIA_BANK_FormatStick_Err_Handler
+3D12 D044 M bra label
+3D14 0E40 00853 movlw 0x40 ; increment FSR1 by 0x40
+3D16 26E1 00854 addwf FSR1L, F
+3D18 0004 00855 clrwdt ; feed watchdog
+3D1A ECF2 F016 00856 call MIOS_BANKSTICK_WritePage ; write page
+3D1E A4D8 00857 skpz
+ 00858 rgoto TIA_BANK_FormatStick_Err_Handler
+3D20 D03D M bra label
+ 00859 ;; continue until last patch is reached
+3D22 2AA9 00860 incf EEADR, F
+3D24 501A 00861 movf TIA_BANKSTICK_ID, W
+3D26 ECC6 F016 00862 call MIOS_HLP_GetBitORMask
+3D2A 141D 00863 andwf TIA_BANKSTICK_SIZE, W
+3D2C 0E7F 00864 movlw 128-1
+3D2E B4D8 00865 skpnz
+3D30 0E3F 00866 movlw 64-1
+3D32 64A9 00867 cpfsgt EEADR, ACCESS
+ 00868 rgoto TIA_BANK_FormatStick_Data_OuterLoop
+3D34 D7E8 M bra label
+3D36 00869 TIA_BANK_FormatStick_Data_End
+ 00870
+3D36 EC8F F01B 00871 call TIA_LEDMTR_PlayFormat_G1
+ 00872
+ 00873 ;; write bank new name
+ 00874 ;; add name offset to MP1 start @0x10
+3D3A 0E10 00875 movlw NEW_BANK_NAME & 0xff
+3D3C 6EA9 00876 movwf EEADR
+3D3E 0E03 00877 movlw (NEW_BANK_NAME >> 8) & 0xff
+3D40 6EAA 00878 movwf EEADRH
+3D42 5019 00879 movf TIA_BANKSTICK_CHK_CTR, W
+3D44 DDFE 00880 rcall TIA_BANK_CheckStick_SelectMagic
+3D46 0E10 00881 movlw 0x10
+3D48 6E03 00882 movwf MIOS_PARAMETER1
+3D4A 00883 TIA_BANK_FormatStick_Name_Loop
+3D4A ECB0 F016 00884 call MIOS_EEPROM_Read
+3D4E ECBA F016 00885 call MIOS_BANKSTICK_Write
+3D52 A4D8 00886 skpz
+ 00887 rgoto TIA_BANK_FormatStick_Err_Handler
+3D54 D023 M bra label
+3D56 AA03 00888 btfss MIOS_PARAMETER1, 5 ; until == 0x20
+ 00889 rgoto TIA_BANK_FormatStick_Name_Loop
+3D58 D7F8 M bra label
+ 00890
+ 00891 ;;; write magic byte 0 to confirm valid content
+3D5A 6A03 00892 clrf MIOS_PARAMETER1
+3D5C 0E77 00893 movlw BANKSTICK_MAGIC0
+3D5E ECBA F016 00894 call MIOS_BANKSTICK_Write
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 83
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3D62 A4D8 00895 skpz
+ 00896 rgoto TIA_BANK_FormatStick_Err_Handler
+3D64 D01B M bra label
+ 00897
+ 00898 #if DEFAULT_BS_KBANK_ID >= 0 && DEFAULT_BS_KBANK_ID <= 7
+ 00899 ;; now branch depending on Kit/Patch
+3D66 0E03 00900 movlw DEFAULT_BS_KBANK_ID-1
+3D68 641A 00901 cpfsgt TIA_BANKSTICK_ID, ACCESS
+ 00902 rgoto TIA_BANK_FormatStick_P_Cont
+3D6A D00E M bra label
+3D6C B211 00903 btfsc TIA_BANK, 1
+ 00904 rgoto TIA_BANK_FormatStick_WT_Cont
+3D6E D006 M bra label
+ 00905
+3D70 00906 TIA_BANK_FormatStick_K_Cont
+ 00907 ;; select first external kit
+ 00908 ;movlw 1
+ 00909 ;movwf TIA_KIT
+ 00910 ;; store number in EEPROM
+ 00911 ;call TIA_KIT_StoreDefaultNum
+ 00912 ;; write magic byte K(kit/wavetable), valid content and type
+3D70 0E13 00913 movlw BANKSTICK_MAGICK
+3D72 ECBA F016 00914 call MIOS_BANKSTICK_Write
+3D76 A4D8 00915 skpz
+ 00916 rgoto TIA_BANK_FormatStick_Err_Handler
+3D78 D011 M bra label
+ 00917 rgoto TIA_BANK_FormatStick_Cont
+3D7A D00B M bra label
+ 00918
+3D7C 00919 TIA_BANK_FormatStick_WT_Cont
+ 00920 ;; select first external wavetable
+ 00921 ;movlw 1
+ 00922 ;movwf TIA_WT
+ 00923 ;; store number in EEPROM
+ 00924 ;call TIA_KIT_StoreDefaultNum
+ 00925 ;; write magic byte K(kit/wavetable), valid content and type
+3D7C 0E13 00926 movlw BANKSTICK_MAGICK
+3D7E ECBA F016 00927 call MIOS_BANKSTICK_Write
+3D82 A4D8 00928 skpz
+ 00929 rgoto TIA_BANK_FormatStick_Err_Handler
+3D84 D00B M bra label
+ 00930 rgoto TIA_BANK_FormatStick_Cont
+3D86 D005 M bra label
+ 00931 #endif ;; DEFAULT_BS_KBANK_ID >= 0 && DEFAULT_BS_KBANK_ID <= 7
+ 00932
+3D88 00933 TIA_BANK_FormatStick_P_Cont
+ 00934 ;; select first external patch
+ 00935 ;movlw 1
+ 00936 ;movwf TIA_PRESET
+ 00937 ;; store number in EEPROM
+ 00938 ;call TIA_KIT_StoreDefaultNum
+ 00939 ;; and branch to end
+ 00940 ;;rgoto TIA_BANK_FormatStick_Cont
+ 00941 ;; write magic byte P(patch), valid content and type
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 84
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3D88 0E12 00942 movlw BANKSTICK_MAGICP
+3D8A ECBA F016 00943 call MIOS_BANKSTICK_Write
+3D8E A4D8 00944 skpz
+ 00945 rgoto TIA_BANK_FormatStick_Err_Handler
+3D90 D005 M bra label
+ 00946 ;;rgoto TIA_BANK_FormatStick_Cont
+ 00947
+3D92 00948 TIA_BANK_FormatStick_Cont
+ 00949 ;; play tune, new setup will be reloaded automatically
+ 00950 ;movf TIA_PBANK, W
+3D92 EC3E F01F 00951 call TIA_TUNE_Play1
+3D96 EC95 F01B 00952 call TIA_LEDMTR_PlayFormat_G2
+ 00953 rgoto TIA_BANK_CheckStick_End
+3D9A D623 M bra label
+ 00954
+ 00955
+3D9C 00956 TIA_BANK_FormatStick_Err_Handler
+ 00957 ;; realign on first bank of current BankStick
+3D9C 5211 00958 movf TIA_BANK, F
+3D9E 0B1C 00959 andlw 0x1c
+3DA0 28E8 00960 incf WREG, W ;; next will be first
+3DA2 6E11 00961 movwf TIA_BANK
+ 00962 ;; reinit STAT registers
+3DA4 501A 00963 movf TIA_BANKSTICK_ID, W
+3DA6 ECC4 F016 00964 call MIOS_HLP_GetBitANDMask
+3DAA 161C 00965 andwf TIA_BANKSTICK_STAT, F
+3DAC 161D 00966 andwf TIA_BANKSTICK_SIZE, F
+ 00967
+3DAE 00968 TIA_BANK_FormatStickEnd
+3DAE 0012 00969 return
+ 00970
+ 00971 ;; --------------------------------------------------------------------------
+ 00972
+ 00400 #include "tia_tune.inc"
+ 00001 ; $Id: tia_tune.inc bdupeyron.tech@gmail.com(Antichambre)
+ 00002 ;
+ 00003 ; MIDIbox TIA
+ 00004 ; Routines to play short tunes (when a BankStick is attached/deattached)
+ 00005 ;
+ 00006 ; ==========================================================================
+ 00007 ;
+ 00008 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00009 ; Licensed for personal non-commercial use only.
+ 00010 ; All other rights reserved.
+ 00011 ;
+ 00012 ; ==========================================================================
+ 00013
+ 00014 ;; --------------------------------------------------------------------------
+ 00015 ;; TIA_PLAY Disconnected Tune
+ 00016 ;; --------------------------------------------------------------------------
+3DB0 00017 TIA_TUNE_PlayDisconnect
+3DB0 0E0D 00018 movlw 0x0d
+3DB2 6E06 00019 movwf TMP1
+3DB4 0E06 00020 movlw 0x06
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 85
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3DB6 D878 00021 rcall TIA_TUNE_Note_Init
+ 00022
+3DB8 0E0B 00023 movlw 0x0b
+3DBA D888 00024 rcall TIA_TUNE_Note_On_Wait01
+3DBC 0E01 00025 movlw 0x01
+3DBE D886 00026 rcall TIA_TUNE_Note_On_Wait01
+3DC0 0E01 00027 movlw 0x01
+3DC2 D887 00028 rcall TIA_TUNE_Wait
+3DC4 0E18 00029 movlw 0x18
+3DC6 D882 00030 rcall TIA_TUNE_Note_On_Wait01
+3DC8 0E10 00031 movlw 0x10
+3DCA D880 00032 rcall TIA_TUNE_Note_On_Wait01
+3DCC 0E04 00033 movlw 0x04
+3DCE D875 00034 rcall TIA_TUNE_Note_On
+3DD0 0E02 00035 movlw 0x02
+3DD2 D87F 00036 rcall TIA_TUNE_Wait
+3DD4 D876 00037 rcall TIA_TUNE_Note_Off
+3DD6 0E02 00038 movlw 0x02
+3DD8 D87C 00039 rcall TIA_TUNE_Wait
+ 00040
+ 00041 rgoto TIA_TUNE_End
+3DDA D064 M bra label
+ 00042
+ 00043 ;; --------------------------------------------------------------------------
+ 00044 ;; TIA_PLAY Ok Tune
+ 00045 ;; --------------------------------------------------------------------------
+3DDC 00046 TIA_TUNE_PlayOk
+3DDC 0E0D 00047 movlw 0x0d
+3DDE 6E06 00048 movwf TMP1
+3DE0 0E06 00049 movlw 0x06
+3DE2 D862 00050 rcall TIA_TUNE_Note_Init
+ 00051
+3DE4 0E0B 00052 movlw 0x0b
+3DE6 D872 00053 rcall TIA_TUNE_Note_On_Wait01
+3DE8 0E04 00054 movlw 0x04
+3DEA D870 00055 rcall TIA_TUNE_Note_On_Wait01
+3DEC 0E01 00056 movlw 0x01
+3DEE D871 00057 rcall TIA_TUNE_Wait
+3DF0 0E18 00058 movlw 0x18
+3DF2 D86C 00059 rcall TIA_TUNE_Note_On_Wait01
+3DF4 0E10 00060 movlw 0x10
+3DF6 D86A 00061 rcall TIA_TUNE_Note_On_Wait01
+3DF8 0E01 00062 movlw 0x01
+3DFA D85F 00063 rcall TIA_TUNE_Note_On
+3DFC 0E02 00064 movlw 0x02
+3DFE D869 00065 rcall TIA_TUNE_Wait
+3E00 D860 00066 rcall TIA_TUNE_Note_Off
+3E02 0E02 00067 movlw 0x02
+3E04 D866 00068 rcall TIA_TUNE_Wait
+ 00069
+ 00070 rgoto TIA_TUNE_End
+3E06 D04E M bra label
+ 00071
+ 00072 ;; --------------------------------------------------------------------------
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 86
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00073 ;; TIA_PLAY Wrong Tune
+ 00074 ;; --------------------------------------------------------------------------
+3E08 00075 TIA_TUNE_PlayWrong
+3E08 0E0D 00076 movlw 0x0d
+3E0A 6E06 00077 movwf TMP1
+3E0C 0E06 00078 movlw 0x06
+3E0E D84C 00079 rcall TIA_TUNE_Note_Init
+ 00080
+3E10 0E0B 00081 movlw 0x0b
+3E12 D85C 00082 rcall TIA_TUNE_Note_On_Wait01
+3E14 0E04 00083 movlw 0x04
+3E16 D85A 00084 rcall TIA_TUNE_Note_On_Wait01
+3E18 0E05 00085 movlw 0x05
+3E1A D85B 00086 rcall TIA_TUNE_Wait
+3E1C 0E18 00087 movlw 0x18
+3E1E D856 00088 rcall TIA_TUNE_Note_On_Wait01
+3E20 0E10 00089 movlw 0x10
+3E22 D854 00090 rcall TIA_TUNE_Note_On_Wait01
+3E24 0E1D 00091 movlw 0x1d
+3E26 D849 00092 rcall TIA_TUNE_Note_On
+3E28 0E0F 00093 movlw 0x0f
+3E2A D853 00094 rcall TIA_TUNE_Wait
+3E2C D84A 00095 rcall TIA_TUNE_Note_Off
+3E2E 0E04 00096 movlw 0x04
+3E30 D850 00097 rcall TIA_TUNE_Wait
+ 00098
+ 00099 rgoto TIA_TUNE_End
+3E32 D038 M bra label
+ 00100
+ 00101 ;; --------------------------------------------------------------------------
+ 00102 ;; TIA_PLAY Fanfare Tune
+ 00103 ;; --------------------------------------------------------------------------
+3E34 00104 TIA_TUNE_Play_Fanfare
+3E34 0E02 00105 movlw 0x02
+3E36 D838 00106 rcall TIA_TUNE_Note_Init
+ 00107
+3E38 0E0F 00108 movlw 0x0f
+3E3A 6E06 00109 movwf TMP1
+3E3C 0E0B 00110 movlw 0x0b
+3E3E D846 00111 rcall TIA_TUNE_Note_On_Wait01
+3E40 0E08 00112 movlw 0x08
+3E42 6E06 00113 movwf TMP1
+3E44 0E08 00114 movlw 0x08
+3E46 D842 00115 rcall TIA_TUNE_Note_On_Wait01
+3E48 0E04 00116 movlw 0x04
+3E4A 6E06 00117 movwf TMP1
+3E4C 0E06 00118 movlw 0x06
+3E4E D83E 00119 rcall TIA_TUNE_Note_On_Wait01
+3E50 0E0B 00120 movlw 0x0b
+3E52 6E06 00121 movwf TMP1
+3E54 0E05 00122 movlw 0x05
+3E56 D83A 00123 rcall TIA_TUNE_Note_On_Wait01
+ 00124
+ 00125
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 87
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3E58 0E0F 00126 movlw 0x0f
+3E5A D83B 00127 rcall TIA_TUNE_Wait
+3E5C 0E08 00128 movlw 0x08
+3E5E 6E06 00129 movwf TMP1
+3E60 0E06 00130 movlw 0x06
+3E62 D834 00131 rcall TIA_TUNE_Note_On_Wait01
+3E64 0E04 00132 movlw 0x04
+3E66 D835 00133 rcall TIA_TUNE_Wait
+3E68 0E0C 00134 movlw 0x0c
+3E6A 6E06 00135 movwf TMP1
+3E6C 0E05 00136 movlw 0x05
+3E6E D82E 00137 rcall TIA_TUNE_Note_On_Wait01
+ 00138
+ 00139
+3E70 0E1A 00140 movlw 0x1a
+3E72 D82F 00141 rcall TIA_TUNE_Wait
+3E74 D826 00142 rcall TIA_TUNE_Note_Off
+3E76 0E06 00143 movlw 0x06
+3E78 D82C 00144 rcall TIA_TUNE_Wait
+ 00145
+ 00146 rgoto TIA_TUNE_End
+3E7A D014 M bra label
+ 00147
+ 00148 ;; --------------------------------------------------------------------------
+ 00149 ;; TIA_PLAY Tune #1
+ 00150 ;; --------------------------------------------------------------------------
+3E7C 00151 TIA_TUNE_Play1
+3E7C 0E0D 00152 movlw 0x0d
+3E7E 6E06 00153 movwf TMP1
+3E80 0E08 00154 movlw 0x08
+3E82 D812 00155 rcall TIA_TUNE_Note_Init
+ 00156
+3E84 0E0B 00157 movlw 0x0b
+3E86 D822 00158 rcall TIA_TUNE_Note_On_Wait01
+3E88 0E02 00159 movlw 0x02
+3E8A D820 00160 rcall TIA_TUNE_Note_On_Wait01
+3E8C 0E03 00161 movlw 0x03
+3E8E D821 00162 rcall TIA_TUNE_Wait
+3E90 0E10 00163 movlw 0x10
+3E92 D81C 00164 rcall TIA_TUNE_Note_On_Wait01
+3E94 0E1C 00165 movlw 0x1c
+ 00166 ;movf TMP2,W
+3E96 D811 00167 rcall TIA_TUNE_Note_On
+3E98 0E30 00168 movlw 0x30
+3E9A D81B 00169 rcall TIA_TUNE_Wait
+3E9C D812 00170 rcall TIA_TUNE_Note_Off
+3E9E 0E04 00171 movlw 0x04
+3EA0 D818 00172 rcall TIA_TUNE_Wait
+ 00173
+ 00174 rgoto TIA_TUNE_End
+3EA2 D000 M bra label
+ 00175
+ 00176 ;; --------------------------------------------------------------------------
+ 00177 ;; TIA_PLAY End
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 88
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00178 ;; --------------------------------------------------------------------------
+3EA4 00179 TIA_TUNE_End
+3EA4 9010 00180 bcf TIA_STAT, TIA_STAT_ENGINE_DISABLE; turn on TIA software synth part again
+ 00181 ;goto TIA_PATCH_Init ; init patch and exit
+3EA6 0012 00182 return
+ 00183
+ 00184
+ 00185 ;; --------------------------------------------------------------------------
+ 00186 ;; TIA_PLAY Initialization routine
+ 00187 ;; --------------------------------------------------------------------------
+3EA8 00188 TIA_TUNE_Note_Init
+3EA8 8010 00189 bsf TIA_STAT, TIA_STAT_ENGINE_DISABLE; turn off TIA software synth part
+ 00190
+ 00191 SET_BSR TIA_BASE
+3EAA 0101 M movlb HIGH(reg)
+3EAC 0B0F 00192 andlw 0x0f
+3EAE 6F00 00193 movwf TIA_AUDC0, BANKED
+3EB0 5006 00194 movf TMP1, W
+3EB2 0B0F 00195 andlw 0x0f
+3EB4 6F04 00196 movwf TIA_AUDV0, BANKED
+3EB6 EF83 F01F 00197 goto _TIA_SR_Handler
+ 00198 ;; --------------------------------------------------------------------------
+ 00199 ;; TIA_PLAY a note (in: Note Number)
+ 00200 ;; --------------------------------------------------------------------------
+3EBA 00201 TIA_TUNE_Note_On
+ 00202 SET_BSR TIA_BASE
+3EBA 0101 M movlb HIGH(reg)
+3EBC 6F02 00203 movwf TIA_AUDF0, BANKED
+ 00204
+3EBE EF83 F01F 00205 goto _TIA_SR_Handler
+ 00206
+3EC2 00207 TIA_TUNE_Note_Off
+ 00208 SET_BSR TIA_BASE
+3EC2 0101 M movlb HIGH(reg)
+3EC4 6B04 00209 clrf TIA_AUDV0, BANKED
+3EC6 6B05 00210 clrf TIA_AUDV1, BANKED
+3EC8 EF83 F01F 00211 goto _TIA_SR_Handler
+ 00212
+3ECC 00213 TIA_TUNE_Note_On_Wait01
+3ECC DFF6 00214 rcall TIA_TUNE_Note_On
+3ECE 0E01 00215 movlw 0x01
+ 00216 rgoto TIA_TUNE_Wait
+3ED0 D000 M bra label
+ 00217
+ 00218
+ 00219 ;; --------------------------------------------------------------------------
+ 00220 ;; TIA_PLAY wait for a certain time and poll TIA_SR Handler
+ 00221 ;; --------------------------------------------------------------------------
+3ED2 00222 TIA_TUNE_Wait
+3ED2 6E06 00223 movwf TMP1
+3ED4 0004 00224 clrwdt
+3ED6 00225 TIA_TUNE_WaitLoop
+3ED6 0E0A 00226 movlw 10
+3ED8 ECCE F016 00227 call MIOS_Delay
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 89
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3EDC 2E06 00228 decfsz TMP1, F
+ 00229 rgoto TIA_TUNE_WaitLoop
+3EDE D7FB M bra label
+3EE0 0012 00230 return
+ 00401 #include "tia_sr.inc"
+ 00001 ; $Id: tia_sr.inc bdupeyron.tech@gmail.com(Antichambre)
+ 00002 ;
+ 00003 ; MIDIbox TIA
+ 00004 ; TIA Shift Register Service Routine
+ 00005 ;
+ 00006 ; ==========================================================================
+ 00007 ;
+ 00008 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00009 ; Licensed for personal non-commercial use only.
+ 00010 ; All other rights reserved.
+ 00011 ;
+ 00012 ; ==========================================================================
+ 00013 ;
+ 00014 ; define the pins to which the MBHPS_TIA module is connected
+ 00015 ;
+ 00016 #if DEFAULT_IS_CARTRIDGE==1
+ 00000F8B 00017 TIA_SR_LAT_SCLK EQU LATC
+ 00000000 00018 TIA_SR_PIN_SCLK EQU 0 ; Pin C.0
+ 00000F8B 00019 TIA_SR_LAT_RCLK EQU LATC
+ 00000002 00020 TIA_SR_PIN_RCLK EQU 2 ; Pin C.2
+ 00000F8B 00021 TIA_SR_LAT_OUT EQU LATC
+ 00000003 00022 TIA_SR_PIN_OUT EQU 3 ; Pin C.3
+ 00023
+ 00000F8B 00024 TIA_SR_LAT_WR EQU LATC
+ 00000001 00025 TIA_SR_PIN_WR EQU 1 ; Pin C.1
+ 00026 #else
+ 00027 TIA_SR_LAT_SCLK EQU LATD
+ 00028 TIA_SR_PIN_SCLK EQU 5 ; Pin D.5
+ 00029 TIA_SR_LAT_RCLK EQU LATC
+ 00030 TIA_SR_PIN_RCLK EQU 4 ; Pin C.4
+ 00031 TIA_SR_LAT_OUT EQU LATD
+ 00032 TIA_SR_PIN_OUT EQU 6 ; Pin D.6
+ 00033
+ 00034 TIA_SR_LAT_WR EQU LATC
+ 00035 TIA_SR_PIN_WR EQU 5 ; Pin C.5
+ 00036 #endif
+ 00037
+ 00038 ;; --------------------------------------------------------------------------
+ 00039 ;; Initialize the MBHP_TIA module
+ 00040 ;; --------------------------------------------------------------------------
+3EE2 00041 TIA_SR_Init
+ 00042 ;; reset the TIA
+3EE2 0E00 00043 movlw 0x00 ;; value for 'LEAD' waveform
+3EE4 6F00 00044 movwf TIA_AUDC0, BANKED
+3EE6 0E00 00045 movlw 0x00 ;; value for pitch
+3EE8 6F02 00046 movwf TIA_AUDF0, BANKED
+3EEA 0E00 00047 movlw 0x00 ;; value for volume
+3EEC 6F04 00048 movwf TIA_AUDV0, BANKED
+3EEE 0E00 00049 movlw 0x00 ;; value for 'LEAD' waveform
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 90
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3EF0 6F01 00050 movwf TIA_AUDC1, BANKED
+3EF2 0E00 00051 movlw 0x00 ;; value for pitch
+3EF4 6F03 00052 movwf TIA_AUDF1, BANKED
+3EF6 0E00 00053 movlw 0x00 ;; value for volume
+3EF8 6F05 00054 movwf TIA_AUDV1, BANKED
+3EFA D801 00055 rcall TIA_SR_Handler
+ 00056
+3EFC 0012 00057 return
+ 00058 ;; reset will be released with first call of TIA_SR_Handler
+ 00059
+ 00060 ;; --------------------------------------------------------------------------
+ 00061 ;; Check for changes in TIA registers, transfer values to TIA
+ 00062 ;; and handle Wavetable
+ 00063 ;; --------------------------------------------------------------------------
+3EFE 00064 TIA_SR_Handler
+3EFE B010 00065 btfsc TIA_STAT, TIA_STAT_ENGINE_DISABLE
+3F00 0012 00066 return
+ 00067
+3F02 EC80 F026 00068 call TIA_WT_Handler ; call wavetable handler before continue
+3F06 00069 _TIA_SR_Handler
+ 00070
+3F06 00071 TIA_SR_Start
+ 00072
+3F06 EE01 F000 00073 lfsr FSR0, TIA_BASE ; store base address of TIA registers in FSR0
+3F0A EE11 F010 00074 lfsr FSR1, TIA_SHADOW_BASE ; store base address of shadow registers in FSR1
+3F0E 6A07 00075 clrf TMP2 ; TMP2 as Voice(Audx) Number
+ 00076
+ 00077 IRQ_DISABLE ; disable interrupts
+3F10 9EF2 M bcf INTCON, GIE
+ 00078
+3F12 00079 TIA_SR_Audx_Loop
+ 00080 ;; check volume change
+3F12 0E04 00081 movlw 0x04
+3F14 B007 00082 btfsc TMP2, 0
+3F16 0F01 00083 addlw 0x01
+3F18 6E06 00084 movwf TMP1 ; AudVx register (0x04 or 0x05)
+3F1A 50EB 00085 movf PLUSW0, W
+3F1C 6E04 00086 movwf MIOS_PARAMETER2
+3F1E E11E 00087 bnz TIA_SR_Audx_SoundOn ;; Volume not 0 -> SoundOn
+ 00088
+ 00089 ;; On Sound Off
+3F20 00090 TIA_SR_Audx_SoundOff
+3F20 5006 00091 movf TMP1, W
+3F22 50E3 00092 movf PLUSW1, W
+3F24 E02B 00093 bz TIA_SR_Audx_Loop_Next ; exit if shadow already clear(no V change)
+ 00094
+ 00095 TABLE_ADDR TIA_SR_REGWRITEOFF_TABLE ; contains order of register accesses
+3F26 0E68 M movlw LOW(addr) ; store Lo Byte
+3F28 6EF6 M movwf TBLPTRL
+3F2A 0E40 M movlw HIGH(addr) ; store Hi Byte
+3F2C 6EF7 M movwf TBLPTRH
+ M #if PIC_DERIVATIVE_CODE_SIZE > 0x10000
+3F2E 0E00 M movlw UPPER(addr) ; store Upper Byte
+3F30 6EF8 M movwf TBLPTRU
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 91
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ M #endif
+3F32 0E00 00096 movlw 0x00
+3F34 B007 00097 btfsc TMP2, 0
+3F36 0E03 00098 movlw 0x03
+3F38 26F6 00099 addwf TBLPTRL, F
+ 00100
+3F3A 00101 TIA_SR_Audx_SoundOff_C
+3F3A 0009 00102 tblrd*+
+ 00103 ;; -> Check polynom Resync
+3F3C 50F5 00104 movf TABLAT, W
+3F3E AEEB 00105 btfss PLUSW0, 7
+ 00106 rgoto TIA_SR_Audx_SoundOff_Norm ; exit if resync not requested
+3F40 D009 M bra label
+3F42 6A04 00107 clrf MIOS_PARAMETER2
+3F44 D82A 00108 rcall TIA_SR_Transfer
+ 00109
+3F46 00110 TIA_SR_Audx_SoundOff_V
+3F46 0009 00111 tblrd*+
+3F48 6A04 00112 clrf MIOS_PARAMETER2
+3F4A D827 00113 rcall TIA_SR_Transfer
+ 00114
+3F4C 00115 TIA_SR_Audx_SoundOff_F
+3F4C 0009 00116 tblrd*+
+3F4E 6A04 00117 clrf MIOS_PARAMETER2
+3F50 D824 00118 rcall TIA_SR_Transfer
+ 00119 rgoto TIA_SR_Audx_Loop_Next
+3F52 D014 M bra label
+ 00120
+3F54 00121 TIA_SR_Audx_SoundOff_Norm
+3F54 0009 00122 tblrd*+
+3F56 6A04 00123 clrf MIOS_PARAMETER2
+3F58 D820 00124 rcall TIA_SR_Transfer
+ 00125 rgoto TIA_SR_Audx_Loop_Next
+3F5A D010 M bra label
+ 00126
+ 00127
+ 00128
+ 00129 ;; On Sound On
+3F5C 00130 TIA_SR_Audx_SoundOn
+ 00131 TABLE_ADDR TIA_SR_REGWRITEON_TABLE ; contains order of register accesses
+3F5C 0E62 M movlw LOW(addr) ; store Lo Byte
+3F5E 6EF6 M movwf TBLPTRL
+3F60 0E40 M movlw HIGH(addr) ; store Hi Byte
+3F62 6EF7 M movwf TBLPTRH
+ M #if PIC_DERIVATIVE_CODE_SIZE > 0x10000
+3F64 0E00 M movlw UPPER(addr) ; store Upper Byte
+3F66 6EF8 M movwf TBLPTRU
+ M #endif
+3F68 0E00 00132 movlw 0x00
+3F6A B007 00133 btfsc TMP2, 0
+3F6C 0E03 00134 movlw 0x03
+3F6E 26F6 00135 addwf TBLPTRL, F
+3F70 0E03 00136 movlw 3 ; number of registers (0x06)
+3F72 6E06 00137 movwf TMP1 ; TMP1 is the loop counter
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 92
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3F74 00138 TIA_SR_Audx_SoundOn_Loop
+3F74 0009 00139 tblrd*+
+3F76 D808 00140 rcall TIA_SR_Check
+3F78 2E06 00141 decfsz TMP1, F ; decrement loop counter until it is zero
+ 00142 rgoto TIA_SR_Audx_SoundOn_Loop
+3F7A D7FC M bra label
+ 00143 ;;rgoto TIA_SR_Audx_Loop_Next
+ 00144
+3F7C 00145 TIA_SR_Audx_Loop_Next
+3F7C 2A07 00146 incf TMP2, F
+3F7E A207 00147 btfss TMP2, 1 ; decrement loop counter until it is zero
+ 00148 rgoto TIA_SR_Audx_Loop
+3F80 D7C8 M bra label
+ 00149
+ 00150 IRQ_ENABLE ; enable interrupts again
+3F82 8EF2 M bsf INTCON, GIE
+ 00151
+3F84 9210 00152 bcf TIA_STAT, TIA_STAT_FORCE_REFRESH; clear refresh request (if it has been set before)
+ 00153
+3F86 0012 00154 return
+ 00155
+ 00156 ;; --------------------------------------------------------------------------
+ 00157 ;; TIA Check: compare base and shadow registers
+ 00158 ;; --------------------------------------------------------------------------
+3F88 00159 TIA_SR_Check
+3F88 50F5 00160 movf TABLAT, W
+3F8A CFEB F004 00161 movff PLUSW0, MIOS_PARAMETER2 ; store value of TIA in MIOS_PARAMETER1 and increment FSR0
+ 00162 BRA_IFSET TIA_STAT, TIA_STAT_FORCE_REFRESH, ACCESS, TIA_SR_Transfer; don't skip if refresh has been forced
+3F8E B210 M btfsc reg, bit, reg_a
+3F90 D004 M bra label
+3F92 50E3 00163 movf PLUSW1, W ; get content of appr. shadow register
+3F94 6204 00164 cpfseq MIOS_PARAMETER2, ACCESS; transfer to TIA if not equal
+ 00165 rgoto TIA_SR_Transfer
+3F96 D001 M bra label
+3F98 0012 00166 return ; skip following code if equal
+ 00167
+ 00168
+ 00169 ;; --------------------------------------------------------------------------
+ 00170 ;; TIA Transfer: Store in shadow and transfer
+ 00171 ;; --------------------------------------------------------------------------
+3F9A 00172 TIA_SR_Transfer
+ 00173 ;; register change: write value into shadow register and transfer it to TIA
+3F9A 50F5 00174 movf TABLAT, W
+3F9C C004 FFE3 00175 movff MIOS_PARAMETER2, PLUSW1 ; store value in shadow register
+ 00176
+ 00177 ;; extract address, add offset
+3FA0 50F5 00178 movf TABLAT, W
+3FA2 0F05 00179 addlw 0x05
+3FA4 6E03 00180 movwf MIOS_PARAMETER1 ; store in address register
+ 00181
+ 00182 ;;rcall TIA_SR_Write ; transfer to TIA
+3FA6 816A 00183 bsf TIA_LEDMTR_STAT, TIA_LEDMTR_AUDX_REQ
+ 00184
+ 00185 ;; --------------------------------------------------------------------------
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 93
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00186 ;; TIA Write: write to TIA register
+ 00187 ;; --------------------------------------------------------------------------
+3FA8 00188 TIA_SR_Write
+ 00189 ;; TIA signals:
+ 00190 ;; MIOS_PARAMETER2[4..0]: Data
+ 00191 ;; MIOS_PARAMETER1[3..0]: Address
+ 00192 ;; temporary used as counter: MIOS_PARAMETER3
+ 00193
+3FA8 908B 00194 bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; clear clock
+ 00195
+ 00196 ;; superfast transfer with unrolled loop (takes some memory, but guarantees the
+ 00197 ;; lowest system load :)
+ 00198 TIA_SR_WRITE_BIT MACRO reg, bit
+ 00199 bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+ 00200 btfsc reg, bit
+ 00201 bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+ 00202 bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+ 00203 bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00204 ENDM
+ 00205 #if DEFAULT_IS_CARTRIDGE==1
+ 00206 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 4 ; IC8.O0
+3FAA 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+3FAC B804 M btfsc reg, bit
+3FAE 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+3FB0 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+3FB2 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00207 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 3 ; IC8.O1
+3FB4 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+3FB6 B604 M btfsc reg, bit
+3FB8 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+3FBA 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+3FBC 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00208 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 2 ; IC8.O2
+3FBE 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+3FC0 B404 M btfsc reg, bit
+3FC2 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+3FC4 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+3FC6 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00209 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 1 ; IC8.O3
+3FC8 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+3FCA B204 M btfsc reg, bit
+3FCC 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+3FCE 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+3FD0 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00210 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 0 ; IC8.O4
+3FD2 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+3FD4 B004 M btfsc reg, bit
+3FD6 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+3FD8 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+3FDA 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00211 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 7 ; IC8.O5
+3FDC 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+3FDE BE04 M btfsc reg, bit
+3FE0 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 94
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+3FE2 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+3FE4 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00212 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 7 ; IC8.O6
+3FE6 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+3FE8 BE04 M btfsc reg, bit
+3FEA 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+3FEC 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+3FEE 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00213 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 7 ; IC8.O7
+3FF0 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+3FF2 BE04 M btfsc reg, bit
+3FF4 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+3FF6 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+3FF8 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00214
+ 00215 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 3 ; IC7.O0
+3FFA 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+3FFC B603 M btfsc reg, bit
+3FFE 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+4000 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+4002 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00216 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 2 ; IC7.O1
+4004 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+4006 B403 M btfsc reg, bit
+4008 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+400A 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+400C 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00217 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 1 ; IC7.O2
+400E 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+4010 B203 M btfsc reg, bit
+4012 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+4014 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+4016 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00218 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 0 ; IC7.O3
+4018 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+401A B003 M btfsc reg, bit
+401C 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+401E 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+4020 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00219 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 7 ; IC7.O4
+4022 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+4024 BE03 M btfsc reg, bit
+4026 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+4028 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+402A 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00220 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 7 ; IC7.O5
+402C 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+402E BE03 M btfsc reg, bit
+4030 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+4032 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+4034 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00221 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 7 ; IC7.O6
+4036 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+4038 BE03 M btfsc reg, bit
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 95
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+403A 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+403C 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+403E 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00222 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 7 ; IC7.O7
+4040 968B M bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; set out pin depending on register content (reg.bit)
+4042 BE03 M btfsc reg, bit
+4044 868B M bsf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT
+4046 808B M bsf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; rising clock edge
+4048 908B M bcf TIA_SR_LAT_SCLK, TIA_SR_PIN_SCLK ; falling clock edge
+ 00223
+ 00224 #else
+ 00225 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 0 ; IC2.O0
+ 00226 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 1 ; IC2.O1
+ 00227 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 2 ; IC2.O2
+ 00228 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 3 ; IC2.O3
+ 00229 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 4 ; IC2.O4
+ 00230 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 7 ; IC2.O5
+ 00231 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 7 ; IC2.O6
+ 00232 TIA_SR_WRITE_BIT MIOS_PARAMETER2, 7 ; IC2.O7
+ 00233
+ 00234 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 3 ; IC3.O0
+ 00235 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 2 ; IC3.O1
+ 00236 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 1 ; IC3.O2
+ 00237 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 0 ; IC3.O3
+ 00238 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 7 ; IC3.O4
+ 00239 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 7 ; IC3.O5
+ 00240 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 7 ; IC3.O6
+ 00241 TIA_SR_WRITE_BIT MIOS_PARAMETER1, 7 ; IC3.O7
+ 00242 #endif
+404A 848B 00243 bsf TIA_SR_LAT_RCLK, TIA_SR_PIN_RCLK ; latch TIA values
+ 00244
+404C 928B 00245 bcf TIA_SR_LAT_WR, TIA_SR_PIN_WR ; enable write (MBHP_TIA: chip select)
+404E 968B 00246 bcf TIA_SR_LAT_OUT, TIA_SR_PIN_OUT ; clear out pin (standby)
+4050 948B 00247 bcf TIA_SR_LAT_RCLK, TIA_SR_PIN_RCLK ; release latch
+ 00248
+4052 928B 00249 bcf TIA_SR_LAT_WR, TIA_SR_PIN_WR ; enable write (MBHP_TIA: chip select)
+4054 D000 00250 bra $+2 ; to ensure compatibility with on-board oscillator,
+4056 D000 00251 bra $+2 ; wait for 0.840 uS (1 us) (> one TIA clock cycle)
+4058 D000 00252 bra $+2
+405A D000 00253 bra $+2
+405C D000 00254 bra $+2
+405E 828B 00255 bsf TIA_SR_LAT_WR, TIA_SR_PIN_WR ; disable write (MBHP_TIA: chip select)
+ 00256
+4060 0012 00257 return
+ 00258
+ 00259 ;; --------------------------------------------------------------------------
+4062 00260 TIA_SR_REGWRITEON_TABLE
+ 00261 ;; order in which the TIA registers are written
+ 00262 ;; AudCx > AudFx > AudVx
+4062 0200 0104 00263 db 0x00, 0x02, 0x04, 0x01, 0x03, 0x05
+ 0503
+ 00264 ;; --------------------------------------------------------------------------
+4068 00265 TIA_SR_REGWRITEOFF_TABLE
+ 00266 ;; order in which the TIA registers are written
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 96
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00267 ;; AudCx > AudVx > AudFx
+4068 0400 0102 00268 db 0x00, 0x04, 0x02, 0x01, 0x05, 0x03
+ 0305
+ 00269
+ 00270
+ 00271
+ 00402 #include "tia_sw.inc"
+ 00001 ; $Id: tia_sw.inc bdupeyron.tech@gmail.com(Antichambre)
+ 00002 ;
+ 00003 ; MIDIbox TIA
+ 00004 ; Software Synthesizer Engine
+ 00005 ; mostly optimized for PIC16F - special adaption for PIC18F to be done
+ 00006 ;
+ 00007 ; Activate this #define to measure the performance with a scope
+ 00008 ; (connect the probe to J14)
+406E 00009 #define TIA_SW_MEASURE_PERFORMANCE 0
+ 00010 ;
+ 00011 ; ==========================================================================
+ 00012 ;
+ 00013 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00014 ; Idea for ENV Curve Parameter and OSC synchronization by Jess D. Skov-Nielsen
+ 00015 ; Licensed for personal non-commercial use only.
+ 00016 ; All other rights reserved.
+ 00017 ;
+ 00018 ; ==========================================================================
+ 00019
+ 00020 ;; ==========================================================================
+ 00021 ;; TIA Flags
+ 00022 ;; ==========================================================================
+ 00023
+ 00024
+ 00025
+ 00026
+ 00000000 00027 Vx_STAT_VOICE_ACTIVE EQU 0
+ 00000001 00028 Vx_STAT_GATE_SET_REQ EQU 1
+ 00000002 00029 Vx_STAT_GATE_CLR_REQ EQU 2
+ 00000003 00030 Vx_STAT_GATE_ACTIVE EQU 3
+ 00000004 00031 Vx_STAT_GATE_NOTE_ON EQU 4
+ 00000005 00032 Vx_STAT_ENV_ACTIVE EQU 5
+ 00000006 00033 Vx_STAT_PORTA_ENABLE EQU 6
+ 00000007 00034 Vx_STAT_GRP_REQ EQU 7
+ 00035
+ 00000000 00036 Vx_MODE_GSA_ACTIVE EQU 0 ;; Gate Stay Active
+ 00000001 00037 Vx_MODE_GRP_ACTIVE EQU 1 ;; Gate Resyncs Polynom Active
+ 00000002 00038 Vx_MODE_PORTA_CONST EQU 2
+ 00000003 00039 Vx_MODE_KEY_EXTENDED EQU 3
+ 00000004 00040 Vx_MODE_VEL2AMP_ON EQU 4
+ 00000005 00041 Vx_MODE_ARP_SYNC_ON EQU 5
+ 00042
+ 00000000 00043 Vx_ENV_MODTYP_EM EQU 0
+ 00000001 00044 Vx_ENV_MODTYP_ExM EQU 1
+ 00000002 00045 Vx_ENV_TOAMP_ON EQU 2
+ 00000003 00046 Vx_ENV_TOPITCH_ON EQU 3
+ 00000004 00047 Vx_ENV_SYNC_ON EQU 4
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 97
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00048
+ 00000000 00049 Vx_OPTION_WT_ON EQU 0
+ 00000001 00050 Vx_OPTION_WTSYNC_ON EQU 1
+ 00000002 00051 Vx_OPTION_KIT_ON EQU 2
+ 00000003 00052 Vx_OPTION_SAMPLER_ON EQU 3
+ 00053 ;; A ajouter dans MAX
+ 00000004 00054 Vx_OPTION_ONLY_WT_OFF EQU 4
+ 00000005 00055 Vx_OPTION_TB303 EQU 5
+ 00000006 00056 Vx_OPTION_ENV2PORTA EQU 6
+ 00057
+ 00000000 00058 LFOx_MODE_ENABLE EQU 0
+ 00000001 00059 LFOx_MODE_SYNC EQU 1
+ 00000002 00060 LFOx_MODE_SYNC_ALL EQU 2
+ 00000003 00061 LFOx_MODE_RESERVED EQU 3
+ 00000004 00062 LFOx_MODE_WAVEFORM0 EQU 4
+ 00000005 00063 LFOx_MODE_WAVEFORM1 EQU 5
+ 00000006 00064 LFOx_MODE_WAVEFORM2 EQU 6
+ 00000007 00065 LFOx_MODE_DECINC EQU 7
+ 00066
+ 00000000 00067 ENVx_MODE_ATTACK EQU 0
+ 00000001 00068 ENVx_MODE_DECAY EQU 1
+ 00000002 00069 ENVx_MODE_SUSTAIN EQU 2
+ 00000003 00070 ENVx_MODE_RELEASE EQU 3
+ 00000004 00071 ENVx_MODE_FREE EQU 4
+ 00072 ;ENVx_MODE_RESERVED EQU 5
+ 00073 ;ENVx_MODE_RESERVED EQU 6
+ 00074 ;ENVx_MODE_RESERVED EQU 7
+ 00075
+ 00076
+ 00000000 00077 ASSIGNED_LFOS_1 EQU 0
+ 00000001 00078 ASSIGNED_LFOS_2 EQU 1
+ 00000002 00079 ASSIGNED_LFOS_3 EQU 2
+ 00000003 00080 ASSIGNED_LFOS_4 EQU 3
+ 00000004 00081 ASSIGNED_ENVS_1 EQU 4
+ 00000005 00082 ASSIGNED_ENVS_2 EQU 5
+ 00000006 00083 ASSIGNED_ENVS_A0 EQU 6
+ 00000007 00084 ASSIGNED_ENVS_A1 EQU 7
+ 00085
+ 00000000 00086 WT_STATE_STOP EQU 0
+ 00000001 00087 WT_STATE_RESET EQU 1
+ 00000002 00088 WT_STATE_INIT_REQ EQU 2
+ 00000003 00089 WT_STATE_SEND_CLK EQU 3 ; WT Voice 1(Aud0) prior
+ 00000004 00090 WT_STATE_GATE EQU 4 ; for TB303 option
+ 00000005 00091 WT_STATE_SLIDE EQU 5
+ 00000006 00092 WT_STATE_SLIDE_PREV EQU 6
+ 00000007 00093 WT_STATE_PLAY_2ND EQU 7
+ 00094
+ 00000000 00095 SE_OPTION_TB303 EQU 0
+ 00000001 00096 SE_OPTION_FIP EQU 1
+ 00000002 00097 SE_OPTION_ENV2PORTA EQU 2
+ 00000003 00098 SE_OPTION_ENV2VOL EQU 3
+ 00000004 00099 SE_OPTION_GSA EQU 4
+ 00100
+ 00101 ;; ==========================================================================
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 98
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00102
+ 00103
+ 00104 ;; --------------------------------------------------------------------------
+ 00105 ;; TIA Software Handler: Software Synthesizer part for the TIA
+ 00106 ;; called by User Timer every 800 us
+ 00107 ;; --------------------------------------------------------------------------
+406E 00108 TIA_SW_Handler
+ 00109 #if TIA_SW_MEASURE_PERFORMANCE
+ 00110 bsf PORTD, 4
+ 00111 #endif
+ 00112
+ 00113 SET_BSR TIA_BASE ; prepare BSR for TIA register access
+406E 0101 M movlb HIGH(reg)
+ 00114
+ 00115 ;; return immediately if engine has been disabled
+4070 B010 00116 btfsc TIA_STAT, TIA_STAT_ENGINE_DISABLE
+4072 0012 00117 return
+ 00118
+ 00119 ;; handle with MIDI clock
+4074 00120 TIA_SW_Clk
+4074 2BF1 00121 incf TIA_MIDI_SYNC_CTR, F, BANKED
+ 00122
+ 00123 ;; register last counter value on 0xf8 or if TIA_MIDI_SYNC_CTR == 0xff (no clock received)
+4076 9DF0 00124 bcf TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_1, BANKED
+4078 29F1 00125 incf TIA_MIDI_SYNC_CTR, W, BANKED
+407A E003 00126 bz TIA_SW_Clk_F8
+ 00127 BRA_IFCLR TIA_MIDI_SYNC, TIA_MIDI_SYNC_F8, BANKED, TIA_SW_Clk_NoF8
+407C A9F0 M btfss reg, bit, reg_a
+407E D005 M bra label
+4080 99F0 00128 bcf TIA_MIDI_SYNC, TIA_MIDI_SYNC_F8, BANKED
+4082 00129 TIA_SW_Clk_F8
+4082 8DF0 00130 bsf TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_1, BANKED
+4084 C1F1 F1F2 00131 movff TIA_MIDI_SYNC_CTR, TIA_MIDI_SYNC_CTR_REG
+4088 6BF1 00132 clrf TIA_MIDI_SYNC_CTR, BANKED
+408A 00133 TIA_SW_Clk_NoF8
+ 00134
+ 00135 ;; handle with double resolution of TIA_SW clock
+408A 9FF0 00136 bcf TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_2, BANKED
+ 00137
+ 00138 ;; if MIDI sync enabled: clock LFOs/ENVs two times on every MIDI clock event
+408C 51F1 00139 movf TIA_MIDI_SYNC_CTR, W, BANKED
+408E B4D8 00140 skpnz
+4090 8FF0 00141 bsf TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_2, BANKED
+ 00142
+4092 90D8 00143 clrc
+4094 31F2 00144 rrf TIA_MIDI_SYNC_CTR_REG, W, BANKED
+4096 19F1 00145 xorwf TIA_MIDI_SYNC_CTR, W, BANKED
+4098 B4D8 00146 skpnz
+409A 8FF0 00147 bsf TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_2, BANKED
+ 00148
+ 00149 ;; A MIDI clock start event restarts all LFOs
+ 00150 BRA_IFCLR TIA_MIDI_SYNC, TIA_MIDI_SYNC_FA, BANKED, TIA_SW_Clk_NoFA
+409C ABF0 M btfss reg, bit, reg_a
+409E D005 M bra label
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 99
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+40A0 9BF0 00151 bcf TIA_MIDI_SYNC, TIA_MIDI_SYNC_FA, BANKED
+40A2 00152 TIA_SW_Clk_FA
+40A2 ECA1 F025 00153 call TIA_SW_Hlp_SyncAllLFOs
+ 00154
+ 00155 ;btfsc TIA_SE_OPTION, SE_OPTION_TB303, BANKED
+40A6 0E2E 00156 movlw TIA_Vx_WT_STATE
+40A8 82EB 00157 bsf PLUSW0, WT_STATE_RESET
+ 00158
+40AA 00159 TIA_SW_Clk_NoFA
+ 00160
+40AA CFF3 F1F6 00161 movff PRODL, SAVED_PRODL ; save PROD[LH] - we are in an interrupt routine
+40AE CFF4 F1F7 00162 movff PRODH, SAVED_PRODH
+ 00163
+ 00164 ;; generate new pseudo-random number
+40B2 511C 00165 movf TIA_LFO_RANDOM_SEED_L, W, BANKED
+40B4 031D 00166 mulwf TIA_LFO_RANDOM_SEED_H, BANKED
+40B6 50D6 00167 movf TMR0L, W
+40B8 24F3 00168 addwf PRODL, W
+40BA 6F1C 00169 movwf TIA_LFO_RANDOM_SEED_L, BANKED
+40BC 0E69 00170 movlw 0x69
+40BE 20F4 00171 addwfc PRODH, W
+40C0 6F1D 00172 movwf TIA_LFO_RANDOM_SEED_H, BANKED
+ 00173
+ 00174
+ 00175 SET_BSR TIA_BASE
+40C2 0101 M movlb HIGH(reg)
+40C4 6B0E 00176 clrf TIA_SW_VOICE, BANKED ; loop counter
+40C6 EE11 F020 00177 lfsr FSR1, TIA_V1_BASE
+40CA 00178 TIA_SW_Wt_VoiceLoop
+ 00179
+ 00180 ;; wavetable handler: check for MIDI Sync
+40CA 0E2B 00181 movlw TIA_Vx_OPTION
+ 00182 BRA_IFCLR PLUSW0, Vx_OPTION_WTSYNC_ON, ACCESS, TIA_SW_Wt
+40CC A2EB M btfss reg, bit, reg_a
+40CE D002 M bra label
+ 00183 BRA_IFCLR TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_1, BANKED, TIA_SW_Wt_VoiceLoop_Next
+40D0 ADF0 M btfss reg, bit, reg_a
+40D2 D021 M bra label
+40D4 00184 TIA_SW_Wt
+40D4 0E2F 00185 movlw TIA_Vx_WT_RATE
+40D6 50E3 00186 movf PLUSW1, W
+40D8 E01E 00187 bz TIA_SW_Wt_VoiceLoop_Next
+ 00188
+40DA 0E31 00189 movlw TIA_Vx_WT_CTR
+40DC 50E3 00190 movf PLUSW1, W
+40DE E119 00191 bnz TIA_SW_Wt_Next
+ 00192
+40E0 0E2B 00193 movlw TIA_Vx_OPTION
+ 00194 BRA_IFCLR PLUSW0, Vx_OPTION_WTSYNC_ON, ACCESS, TIA_SW_Wt_IntClk
+40E2 A2EB M btfss reg, bit, reg_a
+40E4 D008 M bra label
+40E6 00195 TIA_SW_Wt_ExtClk
+40E6 0E2F 00196 movlw TIA_Vx_WT_RATE
+40E8 1CE3 00197 comf PLUSW1, W
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 100
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+40EA 0B7F 00198 andlw 0x7f
+40EC 6E0B 00199 movwf IRQ_TMP1
+ 00200 ; btfss TIA_SE_OPTION, SE_OPTION_TB303, BANKED
+ 00201 ; addlw 1
+ 00202
+40EE 0E31 00203 movlw TIA_Vx_WT_CTR
+40F0 C00B FFE3 00204 movff IRQ_TMP1, PLUSW1
+ 00205 rgoto TIA_SW_Wt_PlayNext
+40F4 D00B M bra label
+40F6 00206 TIA_SW_Wt_IntClk
+40F6 0E2F 00207 movlw TIA_Vx_WT_RATE
+40F8 1CE3 00208 comf PLUSW1, W
+40FA 0B7F 00209 andlw 0x7f
+40FC B4D8 00210 skpnz ; never use 0x00 (avoid wdt reset on overloaded engine)
+40FE 0F01 00211 addlw 1
+4100 6E0B 00212 movwf IRQ_TMP1
+4102 0E31 00213 movlw TIA_Vx_WT_CTR
+4104 C00B FFE3 00214 movff IRQ_TMP1, PLUSW1
+4108 90D8 00215 clrc
+410A 36E3 00216 rlf PLUSW1, F
+ 00217 ;; rgoto TIA_SW_Wt_PlayNext
+ 00218
+410C 00219 TIA_SW_Wt_PlayNext
+410C 0E30 00220 movlw TIA_Vx_WT_CLK_REQ_CTR
+410E 2AE3 00221 incf PLUSW1, F
+ 00222 rgoto TIA_SW_Wt_VoiceLoop_Next
+4110 D002 M bra label
+ 00223
+4112 00224 TIA_SW_Wt_Next
+4112 0E31 00225 movlw TIA_Vx_WT_CTR
+4114 06E3 00226 decf PLUSW1, F
+ 00227
+4116 00228 TIA_SW_Wt_VoiceLoop_Next
+4116 0E40 00229 movlw TIA_Vx_RECORD_LEN
+4118 26E1 00230 addwf FSR1L, F
+411A 2B0E 00231 incf TIA_SW_VOICE, F, BANKED
+411C 0E01 00232 movlw 2-1
+411E 650E 00233 cpfsgt TIA_SW_VOICE, BANKED
+ 00234 rgoto TIA_SW_Wt_VoiceLoop
+4120 D7D4 M bra label
+ 00235
+ 00236
+ 00237
+ 00238 ;; ARPs: check for MIDI Sync
+4122 00239 TIA_SW_ARPs
+4122 EE11 F020 00240 lfsr FSR1, TIA_V1_BASE
+4126 0E04 00241 movlw TIA_Vx_MODE
+4128 BAE3 00242 btfsc PLUSW1, Vx_MODE_ARP_SYNC_ON
+412A BFF0 00243 btfsc TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_2, BANKED
+412C D858 00244 rcall TIA_SW_Arp
+412E EE11 F060 00245 lfsr FSR1, TIA_V2_BASE
+4132 0E04 00246 movlw TIA_Vx_MODE
+4134 BAE3 00247 btfsc PLUSW1, Vx_MODE_ARP_SYNC_ON
+4136 BFF0 00248 btfsc TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_2, BANKED
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 101
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4138 D852 00249 rcall TIA_SW_Arp
+413A 00250 TIA_SW_ARPs_End
+ 00251
+ 00252 ;; LFOs: check for MIDI Sync
+413A 00253 TIA_SW_LFOs
+413A 6B0F 00254 clrf TIA_SW_LFO_NUMBER, BANKED
+413C EE11 F0A0 00255 lfsr FSR1, TIA_LFO1_BASE
+4140 B11F 00256 btfsc TIA_MOD_SYNC, ASSIGNED_LFOS_1, BANKED
+4142 BFF0 00257 btfsc TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_2, BANKED
+4144 DB46 00258 rcall TIA_SW_LFO
+4146 2B0F 00259 incf TIA_SW_LFO_NUMBER, F, BANKED
+4148 EE11 F0A7 00260 lfsr FSR1, TIA_LFO2_BASE
+414C B31F 00261 btfsc TIA_MOD_SYNC, ASSIGNED_LFOS_2, BANKED
+414E BFF0 00262 btfsc TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_2, BANKED
+4150 DB40 00263 rcall TIA_SW_LFO
+4152 2B0F 00264 incf TIA_SW_LFO_NUMBER, F, BANKED
+4154 EE11 F0AE 00265 lfsr FSR1, TIA_LFO3_BASE
+4158 B51F 00266 btfsc TIA_MOD_SYNC, ASSIGNED_LFOS_3, BANKED
+415A BFF0 00267 btfsc TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_2, BANKED
+415C DB3A 00268 rcall TIA_SW_LFO
+415E 2B0F 00269 incf TIA_SW_LFO_NUMBER, F, BANKED
+4160 EE11 F0B5 00270 lfsr FSR1, TIA_LFO4_BASE
+4164 B71F 00271 btfsc TIA_MOD_SYNC, ASSIGNED_LFOS_4, BANKED
+4166 BFF0 00272 btfsc TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_2, BANKED
+4168 DB34 00273 rcall TIA_SW_LFO
+416A 00274 TIA_SW_LFOs_End
+ 00275
+ 00276 ;; ENVs: check for MIDI Sync
+416A 00277 TIA_SW_ENVs
+ 00278 ;; Enveloppe for AUD0(voice 1)
+416A 6B0F 00279 clrf TIA_SW_ENV_NUMBER, BANKED
+416C EE11 F0BC 00280 lfsr FSR1, TIA_V1_ENV_BASE
+4170 EE21 F020 00281 lfsr FSR2, TIA_V1_BASE
+4174 0E2A 00282 movlw TIA_Vx_ENV_MODE
+ 00283 BRA_IFCLR PLUSW2, Vx_ENV_SYNC_ON, ACCESS, TIA_SW_ENVs_v1_Ok
+4176 A8DB M btfss reg, bit, reg_a
+4178 D002 M bra label
+ 00284 BRA_IFCLR TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_2, BANKED, TIA_SW_ENVs_v1_Nok
+417A AFF0 M btfss reg, bit, reg_a
+417C D003 M bra label
+417E 00285 TIA_SW_ENVs_v1_Ok
+417E 511B 00286 movf TIA_Vx_ENV_CURVES, W, BANKED
+4180 0B07 00287 andlw 0x07
+4182 DB6D 00288 rcall TIA_SW_ENV
+4184 00289 TIA_SW_ENVs_v1_Nok
+ 00290 ;; Enveloppe for AUD1(voice 2)
+4184 2B0F 00291 incf TIA_SW_ENV_NUMBER, BANKED
+4186 EE11 F0C7 00292 lfsr FSR1, TIA_V2_ENV_BASE
+418A EE21 F060 00293 lfsr FSR2, TIA_V2_BASE
+418E 0E2A 00294 movlw TIA_Vx_ENV_MODE
+ 00295 BRA_IFCLR PLUSW2, Vx_ENV_SYNC_ON, ACCESS, TIA_SW_ENVs_v2_Ok
+4190 A8DB M btfss reg, bit, reg_a
+4192 D002 M bra label
+ 00296 BRA_IFCLR TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_2, BANKED, TIA_SW_ENVs_v2_Nok
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 102
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4194 AFF0 M btfss reg, bit, reg_a
+4196 D003 M bra label
+4198 00297 TIA_SW_ENVs_v2_Ok
+4198 391B 00298 swapf TIA_Vx_ENV_CURVES, W, BANKED
+419A 0B07 00299 andlw 0x07
+419C DB60 00300 rcall TIA_SW_ENV
+419E 00301 TIA_SW_ENVs_v2_Nok
+ 00302 ;; Enveloppe 1
+419E 2B0F 00303 incf TIA_SW_ENV_NUMBER, BANKED
+41A0 EE11 F0D2 00304 lfsr FSR1, TIA_ENV1_BASE
+41A4 511E 00305 movf TIA_ENVx_CURVES, W, BANKED
+41A6 B91F 00306 btfsc TIA_MOD_SYNC, ASSIGNED_ENVS_1, BANKED
+41A8 BFF0 00307 btfsc TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_2, BANKED
+41AA DB59 00308 rcall TIA_SW_ENV
+ 00309 ;; Enveloppe 2
+41AC 2B0F 00310 incf TIA_SW_ENV_NUMBER, BANKED
+41AE EE11 F0DD 00311 lfsr FSR1, TIA_ENV2_BASE
+41B2 391E 00312 swapf TIA_ENVx_CURVES, W, BANKED
+41B4 BB1F 00313 btfsc TIA_MOD_SYNC, ASSIGNED_ENVS_2, BANKED
+41B6 BFF0 00314 btfsc TIA_MIDI_SYNC, TIA_MIDI_SYNC_TICK_2, BANKED
+41B8 DB52 00315 rcall TIA_SW_ENV
+41BA 00316 TIA_SW_ENVs_End
+ 00317
+ 00318 SET_BSR TIA_BASE
+41BA 0101 M movlb HIGH(reg)
+41BC 6B0E 00319 clrf TIA_SW_VOICE, BANKED ; loop counter
+41BE EE11 F020 00320 lfsr FSR1, TIA_V1_BASE
+41C2 00321 TIA_SW_VoiceLoop
+41C2 0E10 00322 movlw TIA_Vx_NOTE
+41C4 50E3 00323 movf PLUSW1, W
+41C6 E002 00324 bz TIA_SW_VoiceLoop_NoPitchChange
+41C8 00325 TIA_SW_VoiceLoop_PitchChange
+41C8 D85C 00326 rcall TIA_SW_Note
+41CA D8CE 00327 rcall TIA_SW_Pitch
+ 00328
+41CC 00329 TIA_SW_VoiceLoop_NoPitchChange
+41CC D990 00330 rcall TIA_SW_Porta
+41CE DA3A 00331 rcall TIA_SW_Amp
+ 00332
+41D0 00333 TIA_SW_VoiceLoop_Next
+41D0 0E40 00334 movlw TIA_Vx_RECORD_LEN
+41D2 26E1 00335 addwf FSR1L, F
+41D4 2B0E 00336 incf TIA_SW_VOICE, F, BANKED
+41D6 0E01 00337 movlw 2-1
+41D8 650E 00338 cpfsgt TIA_SW_VOICE, BANKED
+ 00339 rgoto TIA_SW_VoiceLoop
+41DA D7F3 M bra label
+ 00340
+41DC 00341 TIA_SW_Handler_End
+ 00342
+ 00343 #if TIA_SW_MEASURE_PERFORMANCE
+ 00344 bcf PORTD, 4
+ 00345 #endif
+ 00346
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 103
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+41DC 0012 00347 return
+ 00348
+ 00349
+ 00350
+ 00351
+ 00352
+ 00353 ;; --------------------------------------------------------------------------
+ 00354 ;; This function handles the arpeggiator
+ 00355 ;; --------------------------------------------------------------------------
+41DE 00356 TIA_SW_Arp
+ 00357 ;; skip if arpeggiator rate == 0
+41DE 0E13 00358 movlw TIA_Vx_ARP_RATE
+41E0 50E3 00359 movf PLUSW1, W
+41E2 E04E 00360 bz TIA_SW_Arp_End
+ 00361
+ 00362 ;; a counter is incremented on each function call
+ 00363 ;; arpeggiator is stepped forward once the counter has reached the
+ 00364 ;; compare value: rate^0x7f + 1, multiply by 2 if MIDI sync not enabled
+41E4 0A7F 00365 xorlw 0x7f
+41E6 0F01 00366 addlw 1
+41E8 6E0B 00367 movwf IRQ_TMP1 ; compare value => IRQ_TMP1
+41EA 90D8 00368 clrc
+41EC 0E04 00369 movlw TIA_Vx_MODE
+41EE AAE3 00370 btfss PLUSW1, Vx_MODE_ARP_SYNC_ON, ACCESS ; (*2 reduce the rate a little if no MIDI sync)
+41F0 360B 00371 rlf IRQ_TMP1, F
+ 00372
+41F2 0E01 00373 movlw 1
+41F4 6E0C 00374 movwf IRQ_TMP2 ; incrementer => IRQ_TMP2
+ 00375
+ 00376 ;; special option: constant time arp cycle
+ 00377 ;; if 1 key is pressed, use the original incrementer
+ 00378 ;; if 2 keys are pressed, increment by 2
+ 00379 ;; if 3 keys are pressed, increment by 3
+ 00380 ;; if 4 keys are pressed, increment by 4
+41F6 0E23 00381 movlw TIA_Vx_NOTE_STACK_1
+41F8 50E3 00382 movf PLUSW1, W
+41FA A4D8 00383 skpz
+41FC 2A0C 00384 incf IRQ_TMP2, F
+ 00385
+41FE 0E24 00386 movlw TIA_Vx_NOTE_STACK_2
+4200 50E3 00387 movf PLUSW1, W
+4202 A4D8 00388 skpz
+4204 2A0C 00389 incf IRQ_TMP2, F
+ 00390
+4206 0E25 00391 movlw TIA_Vx_NOTE_STACK_3
+4208 50E3 00392 movf PLUSW1, W
+420A A4D8 00393 skpz
+420C 2A0C 00394 incf IRQ_TMP2, F
+ 00395
+ 00396 ;; increment counter
+420E 0E15 00397 movlw TIA_Vx_ARP_CTR
+4210 50E3 00398 movf PLUSW1, W
+4212 260C 00399 addwf IRQ_TMP2, F
+4214 E206 00400 bc TIA_SW_Arp_Overrun
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 104
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4216 0E15 00401 movlw TIA_Vx_ARP_CTR
+4218 C00C FFE3 00402 movff IRQ_TMP2, PLUSW1
+ 00403
+ 00404 ;; branch to the end so long the counter is less than the compare value
+421C 500C 00405 movf IRQ_TMP2, W
+421E 5C0B 00406 subwf IRQ_TMP1, W
+4220 E22F 00407 bc TIA_SW_Arp_End
+ 00408
+4222 00409 TIA_SW_Arp_Overrun
+ 00410 ;; clear counter
+4222 0E15 00411 movlw TIA_Vx_ARP_CTR
+4224 6AE3 00412 clrf PLUSW1
+ 00413
+ 00414 ;; increment note number (1 of 4)
+4226 0E14 00415 movlw TIA_Vx_ARP_NOTE_NUMBER
+4228 28E3 00416 incf PLUSW1, W
+422A 0B03 00417 andlw 0x03
+422C 6E0B 00418 movwf IRQ_TMP1
+ 00419
+ 00420 ;; reset note number if last one reached (TIA_Vx_NOTE_STACK_x is zero)
+422E 0E22 00421 movlw TIA_Vx_NOTE_STACK_0
+4230 240B 00422 addwf IRQ_TMP1, W
+4232 50E3 00423 movf PLUSW1, W
+4234 B4D8 00424 skpnz
+4236 6A0B 00425 clrf IRQ_TMP1
+ 00426
+ 00427 ;; save new note number
+4238 0E14 00428 movlw TIA_Vx_ARP_NOTE_NUMBER
+423A C00B FFE3 00429 movff IRQ_TMP1, PLUSW1
+ 00430
+ 00431 ;; select note
+423E 0E1E 00432 movlw TIA_Vx_ARP_NOTE_0
+4240 240B 00433 addwf IRQ_TMP1, W
+ 00434
+ 00435 ;; save new note number if != zero and != last note
+4242 50E3 00436 movf PLUSW1, W
+4244 E01D 00437 bz TIA_SW_Arp_NoNewNote
+4246 6E0B 00438 movwf IRQ_TMP1
+4248 0E10 00439 movlw TIA_Vx_NOTE
+424A 50E3 00440 movf PLUSW1, W
+424C 180B 00441 xorwf IRQ_TMP1, W
+424E E018 00442 bz TIA_SW_Arp_NoNewNote
+4250 00443 TIA_SW_Arp_NewNote
+4250 0E10 00444 movlw TIA_Vx_NOTE
+4252 C00B FFE3 00445 movff IRQ_TMP1, PLUSW1
+ 00446
+ 00447
+4256 0E0E 00448 movlw TIA_Vx_PORTA_RATE
+4258 50E3 00449 movf PLUSW1, W
+425A E012 00450 bz TIA_SW_Arp_NoPorta
+425C 00451 TIA_SW_Arp_Porta
+425C 0E03 00452 movlw TIA_Vx_STAT
+425E 8CE3 00453 bsf PLUSW1, Vx_STAT_PORTA_ENABLE
+ 00454
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 105
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00455 ;; store current frequency in TIA_Vx_PORTA_FRQ_L
+ 00456
+ 00457
+4260 0E09 00458 movlw TIA_Vx_FRQ_L
+4262 CFE3 F00B 00459 movff PLUSW1, IRQ_TMP1
+4266 0E0A 00460 movlw TIA_Vx_FRQ_H
+4268 CFE3 F00C 00461 movff PLUSW1, IRQ_TMP2
+ 00462
+426C 0E1C 00463 movlw TIA_Vx_PORTA_FRQ_L
+426E C00B FFE3 00464 movff IRQ_TMP1, PLUSW1
+4272 0E1D 00465 movlw TIA_Vx_PORTA_FRQ_H
+4274 C00C FFE3 00466 movff IRQ_TMP2, PLUSW1
+ 00467
+4278 0E1A 00468 movlw TIA_Vx_PORTA_CTR_L
+427A 6AE3 00469 clrf PLUSW1
+427C 0E1B 00470 movlw TIA_Vx_PORTA_CTR_H
+427E 6AE3 00471 clrf PLUSW1
+ 00472
+ 00473
+4280 00474 TIA_SW_Arp_NoV1
+ 00475
+4280 00476 TIA_SW_Arp_NoPorta
+ 00477
+4280 00478 TIA_SW_Arp_NoNewNote
+ 00479
+4280 00480 TIA_SW_Arp_End
+4280 0012 00481 return
+ 00482
+ 00483
+ 00484 ;; --------------------------------------------------------------------------
+ 00485 ;; This function handles the gates and initial note frequency
+ 00486 ;; --------------------------------------------------------------------------
+4282 00487 TIA_SW_Note
+ 00488
+ 00489
+ 00490
+ 00491 ;; check note delay counter, set/clear gate bit
+4282 0E12 00492 movlw TIA_Vx_NOTE_DELAY_CTR
+4284 50E3 00493 movf PLUSW1, W
+4286 E003 00494 bz TIA_SW_Note_NoDelay
+4288 0E12 00495 movlw TIA_Vx_NOTE_DELAY_CTR
+428A 06E3 00496 decf PLUSW1, F
+ 00497 rgoto TIA_SW_Note_DelayCont
+428C D03D M bra label
+428E 00498 TIA_SW_Note_NoDelay
+428E 0E03 00499 movlw TIA_Vx_STAT
+ 00500 BRA_IFSET PLUSW1, Vx_STAT_GATE_CLR_REQ, ACCESS, TIA_SW_Note_NoteOffReq
+4290 B4E3 M btfsc reg, bit, reg_a
+4292 D003 M bra label
+ 00501 BRA_IFSET PLUSW1, Vx_STAT_GATE_SET_REQ, ACCESS, TIA_SW_Note_NoteOnReq
+4294 B2E3 M btfsc reg, bit, reg_a
+4296 D019 M bra label
+ 00502 rgoto TIA_SW_Note_DelayCont
+4298 D037 M bra label
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 106
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00503
+429A 00504 TIA_SW_Note_NoteOffReq
+429A 94E3 00505 bcf PLUSW1, Vx_STAT_GATE_CLR_REQ
+429C 98E3 00506 bcf PLUSW1, Vx_STAT_GATE_NOTE_ON
+429E 0E04 00507 movlw TIA_Vx_MODE
+ 00508 ; (don't clear gate bit if GSA (gate stays active)
+ 00509 BRA_IFSET PLUSW1, Vx_MODE_GSA_ACTIVE, ACCESS, TIA_SW_Note_NoteOffReqSkp
+42A0 B0E3 M btfsc reg, bit, reg_a
+42A2 D002 M bra label
+42A4 0E03 00510 movlw TIA_Vx_STAT
+42A6 96E3 00511 bcf PLUSW1, Vx_STAT_GATE_ACTIVE
+42A8 00512 TIA_SW_Note_NoteOffReqSkp
+ 00513 ;; sync voice ENVs
+42A8 0E2A 00514 movlw TIA_Vx_ENV_MODE
+42AA 50E3 00515 movf PLUSW1, W
+ 00516 ;rrf PLUSW1, W
+ 00517 ;rrncf WREG, W
+42AC 0B0C 00518 andlw 0x0c
+42AE B10E 00519 btfsc TIA_SW_VOICE, 0, BANKED
+42B0 38E8 00520 swapf WREG, W
+42B2 6E0B 00521 movwf IRQ_TMP1
+ 00522 ;; sync assigned ENVs
+42B4 0E17 00523 movlw TIA_Vx_AMP_MOD
+42B6 50E3 00524 movf PLUSW1, W
+42B8 0B30 00525 andlw 0x30
+42BA 120B 00526 iorwf IRQ_TMP1, F
+ 00527
+42BC 0E16 00528 movlw TIA_Vx_PITCH_MOD
+42BE 38E3 00529 swapf PLUSW1, W
+42C0 0B03 00530 andlw 0x03
+42C2 100B 00531 iorwf IRQ_TMP1, W
+42C4 ECDC F025 00532 call TIA_SW_Hlp_ENVRelease
+ 00533 rgoto TIA_SW_Note_DelayCont
+42C8 D01F M bra label
+ 00534
+42CA 00535 TIA_SW_Note_NoteOnReq
+42CA 0E03 00536 movlw TIA_Vx_STAT
+42CC 92E3 00537 bcf PLUSW1, Vx_STAT_GATE_SET_REQ
+42CE 88E3 00538 bsf PLUSW1, Vx_STAT_GATE_NOTE_ON
+42D0 00539 TIA_SW_Note_NoteOnReqSkp
+42D0 0E03 00540 movlw TIA_Vx_STAT
+42D2 86E3 00541 bsf PLUSW1, Vx_STAT_GATE_ACTIVE
+ 00542
+ 00543 ;; sync assigned LFOs
+42D4 0E17 00544 movlw TIA_Vx_AMP_MOD
+42D6 50E3 00545 movf PLUSW1, W
+42D8 0B07 00546 andlw 0x07
+42DA 6E0B 00547 movwf IRQ_TMP1
+ 00548
+42DC 0E16 00549 movlw TIA_Vx_PITCH_MOD
+42DE 50E3 00550 movf PLUSW1, W
+42E0 0B07 00551 andlw 0x07
+42E2 100B 00552 iorwf IRQ_TMP1, W
+42E4 ECAA F025 00553 call TIA_SW_Hlp_SyncLFOs
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 107
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00554
+ 00555 ;; sync voice ENVs
+42E8 0E2A 00556 movlw TIA_Vx_ENV_MODE
+42EA 50E3 00557 movf PLUSW1, W
+ 00558 ;rrf PLUSW1, W
+ 00559 ;;rrncf WREG, W
+42EC 0B0C 00560 andlw 0x0c
+42EE B10E 00561 btfsc TIA_SW_VOICE, 0, BANKED
+42F0 38E8 00562 swapf WREG, W
+42F2 6E0B 00563 movwf IRQ_TMP1
+ 00564
+ 00565 ;; sync assigned ENVs
+42F4 0E17 00566 movlw TIA_Vx_AMP_MOD
+42F6 50E3 00567 movf PLUSW1, W
+42F8 0B30 00568 andlw 0x30
+42FA 120B 00569 iorwf IRQ_TMP1, F
+ 00570
+42FC 0E16 00571 movlw TIA_Vx_PITCH_MOD
+42FE 38E3 00572 swapf PLUSW1, W
+4300 0B03 00573 andlw 0x03
+4302 100B 00574 iorwf IRQ_TMP1, W
+4304 ECC7 F025 00575 call TIA_SW_Hlp_ENVAttack
+ 00576
+ 00577
+ 00578
+4308 00579 TIA_SW_Note_DelayCont
+ 00580
+4308 0E0C 00581 movlw TIA_Vx_TRANSPOSE
+430A 50E3 00582 movf PLUSW1, W
+430C 0840 00583 sublw 0x40
+430E 0AFF 00584 xorlw 0xff
+4310 6E0B 00585 movwf IRQ_TMP1
+4312 0E10 00586 movlw TIA_Vx_NOTE
+4314 50E3 00587 movf PLUSW1, W
+4316 240B 00588 addwf IRQ_TMP1, W
+4318 0F01 00589 addlw 1
+431A 6E0C 00590 movwf IRQ_TMP2
+431C 087F 00591 sublw 0x7f
+431E E207 00592 bc TIA_SW_Note_NoOverflow
+4320 0E0C 00593 movlw TIA_Vx_TRANSPOSE
+ 00594 BRA_IFSET PLUSW1, 6, ACCESS, TIA_SW_Note_PosSaturation
+4322 BCE3 M btfsc reg, bit, reg_a
+4324 D002 M bra label
+4326 00595 TIA_SW_Note_NegSaturation
+4326 6A0C 00596 clrf IRQ_TMP2
+ 00597 rgoto TIA_SW_Note_NoOverflow
+4328 D002 M bra label
+432A 00598 TIA_SW_Note_PosSaturation
+432A 0E7F 00599 movlw 0x7f
+432C 6E0C 00600 movwf IRQ_TMP2
+432E 00601 TIA_SW_Note_NoOverflow
+ 00602 ;; set target frequency depending on note number
+432E 500C 00603 movf IRQ_TMP2, W
+4330 BEE8 00604 btfsc WREG, 7; the note value
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 108
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4332 0E7F 00605 movlw 0x7f
+4334 6E0C 00606 movwf IRQ_TMP2
+ 00607
+4336 0E04 00608 movlw TIA_Vx_MODE
+ 00609 BRA_IFSET PLUSW1, Vx_MODE_KEY_EXTENDED, ACCESS, TIA_SW_Note_KeyMode_Extended
+4338 B6E3 M btfsc reg, bit, reg_a
+433A D00D M bra label
+433C 00610 TIA_SW_Note_KeyMode_NonExtended
+433C 90D8 00611 clrc
+433E 0E05 00612 movlw TIA_Vx_KEY_OFFSET
+4340 50E3 00613 movf PLUSW1, W
+4342 5E0C 00614 subwf IRQ_TMP2, F
+4344 0E00 00615 movlw 0x00
+4346 B0D8 00616 skpnc
+4348 0E1F 00617 movlw 0x1f
+434A 640C 00618 cpfsgt IRQ_TMP2, ACCESS
+434C 500C 00619 movf IRQ_TMP2, W
+434E 36E8 00620 rlf WREG, F
+4350 36E8 00621 rlf WREG, F
+4352 34E8 00622 rlf WREG, W
+ 00623 rgoto TIA_SW_Note_TargetCopy
+4354 D002 M bra label
+ 00624
+4356 00625 TIA_SW_Note_KeyMode_Extended
+ 00626 ;;etendu (7bit note to 8bit pitch)
+4356 90D8 00627 clrc
+4358 340C 00628 rlf IRQ_TMP2, W
+ 00629
+435A 00630 TIA_SW_Note_TargetCopy
+435A 6E03 00631 movwf MIOS_PARAMETER1
+ 00632
+435C 0E08 00633 movlw TIA_Vx_TARGET_FRQ_H
+435E C003 FFE3 00634 movff MIOS_PARAMETER1, PLUSW1
+4362 0E07 00635 movlw TIA_Vx_TARGET_FRQ_L
+4364 6AE3 00636 clrf PLUSW1
+4366 00637 TIA_SW_Note_End
+4366 0012 00638 return
+ 00639
+ 00640
+ 00641 ;; --------------------------------------------------------------------------
+ 00642 ;; This function handles the Note Pitch
+ 00643 ;; --------------------------------------------------------------------------
+4368 00644 TIA_SW_Pitch
+ 00645 ;; skip Pitchbender+Finetune processing if PITCHRANGE == zero
+4368 0E0D 00646 movlw TIA_Vx_PITCHRANGE
+436A 50E3 00647 movf PLUSW1, W
+436C E04D 00648 bz TIA_SW_Pitch_MOD
+ 00649
+ 00650
+ 00651 ;; result stored in IRQ_TMP[12]
+436E 6A0B 00652 clrf IRQ_TMP1
+4370 6A0C 00653 clrf IRQ_TMP2
+4372 6A0D 00654 clrf IRQ_TMP3
+ 00655
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 109
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00656 ;; calc IRQ_TMP[12] = pitchbender (9-bit signed)
+4374 0E0B 00657 movlw TIA_Vx_PITCHBENDER
+4376 50E3 00658 movf PLUSW1, W
+4378 6E0B 00659 movwf IRQ_TMP1
+437A E007 00660 bz TIA_SW_Pitch_NoPitchBender
+437C 00661 TIA_SW_Pitch_PitchBender
+437C 90D8 00662 clrc ; multiply with 2
+437E BE0B 00663 btfsc IRQ_TMP1, 7
+4380 80D8 00664 setc
+4382 360B 00665 rlf IRQ_TMP1, F
+4384 360D 00666 rlf IRQ_TMP3, F
+4386 B00D 00667 btfsc IRQ_TMP3, 0
+4388 1E0B 00668 comf IRQ_TMP1, F
+438A 00669 TIA_SW_Pitch_NoPitchBender
+ 00670
+438A 90D8 00671 clrc
+ 00672 ;; skip tuning if IRQ_TMP[12] == zero
+438C 500B 00673 movf IRQ_TMP1, W
+438E 100C 00674 iorwf IRQ_TMP2, W
+4390 E03B 00675 bz TIA_SW_Pitch_MOD
+ 00676
+4392 500B 00677 movf IRQ_TMP1, W
+4394 6FFA 00678 movwf MUL_B_L, BANKED
+4396 500C 00679 movf IRQ_TMP2, W
+4398 6FFB 00680 movwf MUL_B_H, BANKED
+ 00681
+ 00682 ;; get f_in[target], save it in IRQ_TMP[12]
+439A 90D8 00683 clrc
+439C 0E0C 00684 movlw TIA_Vx_TRANSPOSE
+439E 50E3 00685 movf PLUSW1, W
+43A0 0840 00686 sublw 0x40
+43A2 0AFF 00687 xorlw 0xff
+43A4 6E0E 00688 movwf IRQ_TMP4
+43A6 0E10 00689 movlw TIA_Vx_NOTE
+43A8 50E3 00690 movf PLUSW1, W
+43AA 240E 00691 addwf IRQ_TMP4, W
+ 00692 ;; add pitchrange depending on direction with saturation
+ 00693 BRA_IFSET IRQ_TMP3, 0, ACCESS, TIA_SW_Pitch_Decrease
+43AC B00D M btfsc reg, bit, reg_a
+43AE D009 M bra label
+43B0 00694 TIA_SW_Pitch_Increase
+ 00695
+43B0 0F01 00696 addlw 1
+43B2 6E0C 00697 movwf IRQ_TMP2
+43B4 0E0D 00698 movlw TIA_Vx_PITCHRANGE
+43B6 50E3 00699 movf PLUSW1, W
+43B8 240C 00700 addwf IRQ_TMP2, W
+43BA BEE8 00701 btfsc WREG, 7
+43BC 0E7F 00702 movlw 0x7f
+43BE 6E0C 00703 movwf IRQ_TMP2
+ 00704 rgoto TIA_SW_Pitch_Increase_Cont
+43C0 D006 M bra label
+43C2 00705 TIA_SW_Pitch_Decrease
+43C2 6E0C 00706 movwf IRQ_TMP2
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 110
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+43C4 0E0D 00707 movlw TIA_Vx_PITCHRANGE
+43C6 04E3 00708 decf PLUSW1, W
+43C8 5E0C 00709 subwf IRQ_TMP2, F
+43CA BE0C 00710 btfsc IRQ_TMP2, 7
+43CC 6A0C 00711 clrf IRQ_TMP2
+43CE 00712 TIA_SW_Pitch_Increase_Cont
+ 00713 ;; set target frequency depending on note number
+43CE 500C 00714 movf IRQ_TMP2, W
+43D0 BEE8 00715 btfsc WREG, 7; the note value
+43D2 0E7F 00716 movlw 0x7f
+43D4 6E0C 00717 movwf IRQ_TMP2
+ 00718
+43D6 0E04 00719 movlw TIA_Vx_MODE
+ 00720 BRA_IFSET PLUSW1, Vx_MODE_KEY_EXTENDED, ACCESS, TIA_SW_Pitch_KeyMode_Extended
+43D8 B6E3 M btfsc reg, bit, reg_a
+43DA D00B M bra label
+43DC 00721 TIA_SW_Pitch_KeyMode_NonExtended
+43DC 90D8 00722 clrc
+43DE 0E05 00723 movlw TIA_Vx_KEY_OFFSET
+43E0 50E3 00724 movf PLUSW1, W
+43E2 5E0C 00725 subwf IRQ_TMP2, F
+43E4 0E1F 00726 movlw 0x1f
+43E6 640C 00727 cpfsgt IRQ_TMP2, ACCESS
+43E8 500C 00728 movf IRQ_TMP2, W
+43EA 36E8 00729 rlf WREG, F
+43EC 36E8 00730 rlf WREG, F
+43EE 34E8 00731 rlf WREG, W
+ 00732 rgoto TIA_SW_Pitch_KeyMode_End
+43F0 D002 M bra label
+ 00733
+43F2 00734 TIA_SW_Pitch_KeyMode_Extended
+ 00735 ;;etendu (7bits to 8bits note)
+43F2 90D8 00736 clrc
+43F4 340C 00737 rlf IRQ_TMP2, W
+ 00738
+43F6 00739 TIA_SW_Pitch_KeyMode_End
+43F6 6E04 00740 movwf MIOS_PARAMETER2
+43F8 6A03 00741 clrf MIOS_PARAMETER1
+ 00742
+ 00743 ;; result: low-byte in WREG and MIOS_PARAMETER1, high-byte in MIOS_PARAMETER2
+ 00744
+ 00745 ;; add and multiply to target frequency
+43FA CFE2 FFDA 00746 movff FSR1H, FSR2H
+43FE 50E1 00747 movf FSR1L, W
+4400 0F07 00748 addlw TIA_Vx_TARGET_FRQ_L
+4402 6ED9 00749 movwf FSR2L
+4404 ECF1 F025 00750 call TIA_SW_Hlp_AddMul
+ 00751
+4408 00752 TIA_SW_Pitch_MOD
+4408 0E2A 00753 movlw TIA_Vx_ENV_MODE
+ 00754 BRA_IFCLR PLUSW1, Vx_ENV_TOPITCH_ON, ACCESS, TIA_SW_Pitch_Mods
+440A A6E3 M btfss reg, bit, reg_a
+440C D045 M bra label
+ 00755
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 111
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00756 ;; store dedicated enveloppe value in MUL_A_[LH],sign in MIOS_PARAMETER3
+440E 0E40 00757 movlw 0x40
+4410 B10E 00758 btfsc TIA_SW_VOICE, 0
+4412 0E80 00759 movlw 0x80
+4414 ECB7 F024 00760 call TIA_SW_Hlp_GetMOD
+ 00761 ;; result in IRQ_TMP[123]
+4418 C00D F005 00762 movff IRQ_TMP3, MIOS_PARAMETER3
+441C 500C 00763 movf IRQ_TMP2, W
+ 00764 ;btfsc MIOS_PARAMETER3, 0
+ 00765 ;comf IRQ_TMP2, W
+441E 0B7F 00766 andlw 0x7f
+4420 6FF9 00767 movwf MUL_A_H
+4422 500B 00768 movf IRQ_TMP1, W
+ 00769 ;btfsc MIOS_PARAMETER3, 0
+ 00770 ;comf IRQ_TMP1, W
+4424 6FF8 00771 movwf MUL_A_L
+ 00772
+ 00773 ;; modulate amplitude
+ 00774 ;; assigned LFOs and ENVs in WREG
+4426 0E16 00775 movlw TIA_Vx_PITCH_MOD
+4428 50E3 00776 movf PLUSW1, W
+442A 0B3F 00777 andlw 0x3f
+442C ECB7 F024 00778 call TIA_SW_Hlp_GetMOD
+ 00779 ;; result in IRQ_TMP[123]
+ 00780
+4430 00781 TIA_SW_Pitch_Mods_Env_ExM
+ 00782 ;; Modulation mode
+4430 0E2A 00783 movlw TIA_Vx_ENV_MODE
+4432 50E3 00784 movf PLUSW1, W
+4434 0B03 00785 andlw 0x03
+4436 28E8 00786 incf WREG, W
+ 00787 BRA_IFCLR WREG, Vx_ENV_MODTYP_ExM, ACCESS, TIA_SW_Pitch_Mods_Env_EM
+4438 A2E8 M btfss reg, bit, reg_a
+443A D010 M bra label
+ 00788 BRA_IFSET WREG, Vx_ENV_MODTYP_EM, ACCESS,TIA_SW_Pitch_Mods_Env_ExM_NotDoubled
+443C B0E8 M btfsc reg, bit, reg_a
+443E D002 M bra label
+ 00789 ;; Double the Dedicated ENVAUDx for AxB only Mode
+4440 37F8 00790 rlf MUL_A_L, F
+4442 37F9 00791 rlf MUL_A_H, F
+4444 00792 TIA_SW_Pitch_Mods_Env_ExM_NotDoubled
+4444 500C 00793 movf IRQ_TMP2, W
+4446 6FFB 00794 movwf MUL_B_H
+4448 500B 00795 movf IRQ_TMP1, W
+444A 6FFA 00796 movwf MUL_B_L
+ 00797 ;; multiplication
+444C ECED F01A 00798 call MATH_MUL16_16
+4450 51FE 00799 movf MUL_R_2, W, BANKED
+4452 6E0B 00800 movwf IRQ_TMP1
+4454 51FF 00801 movf MUL_R_3, W, BANKED
+4456 6E0C 00802 movwf IRQ_TMP2
+ 00803 ;; process sign
+4458 5005 00804 movf MIOS_PARAMETER3, W
+445A 1A0D 00805 xorwf IRQ_TMP3, F
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 112
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00806
+445C 00807 TIA_SW_Pitch_Mods_Env_EM
+ 00808 ;; Modulation mode
+445C 0E2A 00809 movlw TIA_Vx_ENV_MODE
+445E 50E3 00810 movf PLUSW1, W
+4460 0B03 00811 andlw 0x03
+4462 28E8 00812 incf WREG, W
+ 00813 BRA_IFCLR WREG, Vx_ENV_MODTYP_EM, ACCESS,TIA_SW_Pitch_Mods_Cont
+4464 A0E8 M btfss reg, bit, reg_a
+4466 D01E M bra label
+4468 5005 00814 movf MIOS_PARAMETER3, W
+446A 180D 00815 xorwf IRQ_TMP3, W
+446C E00D 00816 bz TIA_SW_Pitch_Mods_Env_EM_Add
+446E 00817 TIA_SW_Pitch_Mods_Env_EM_Sub
+446E 500B 00818 movf IRQ_TMP1, W
+4470 5DF8 00819 subwf MUL_A_L, W
+4472 6E0B 00820 movwf IRQ_TMP1
+4474 500C 00821 movf IRQ_TMP2, W
+4476 59F9 00822 subwfb MUL_A_H, W
+4478 6E0C 00823 movwf IRQ_TMP2
+447A E203 00824 bc TIA_SW_Pitch_Mods_Env_EM_Sub_NoCarry
+447C 1E0B 00825 comf IRQ_TMP1, F ;;Sign already in IRQ_TMP3
+447E 1E0C 00826 comf IRQ_TMP2, F
+ 00827 rgoto TIA_SW_Pitch_Mods_Cont
+4480 D011 M bra label
+4482 00828 TIA_SW_Pitch_Mods_Env_EM_Sub_NoCarry
+4482 C005 F00D 00829 movff MIOS_PARAMETER3, IRQ_TMP3
+ 00830 rgoto TIA_SW_Pitch_Mods_Cont
+4486 D00E M bra label
+ 00831
+4488 00832 TIA_SW_Pitch_Mods_Env_EM_Add
+4488 51F8 00833 movf MUL_A_L, W
+448A 260B 00834 addwf IRQ_TMP1, F
+448C 51F9 00835 movf MUL_A_H, W
+448E 220C 00836 addwfc IRQ_TMP2, F
+ 00837 ;; saturate on overflow (set frequency to zero to avoid unwanted HF beeps)
+4490 E309 00838 bnc TIA_SW_Pitch_Mods_Cont
+4492 680B 00839 setf IRQ_TMP1
+4494 680C 00840 setf IRQ_TMP2
+ 00841 rgoto TIA_SW_Pitch_Mods_Cont
+4496 D006 M bra label
+ 00842
+4498 00843 TIA_SW_Pitch_Mods
+ 00844 ;; modulate pitch
+ 00845 ;; assigned LFOs and ENVs in WREG
+4498 0E16 00846 movlw TIA_Vx_PITCH_MOD
+449A 50E3 00847 movf PLUSW1, W
+449C 0B3F 00848 andlw 0x3f
+449E E00C 00849 bz TIA_SW_Pitch_CopyFrq
+44A0 ECB7 F024 00850 call TIA_SW_Hlp_GetMOD
+ 00851 ;; unsigned result in IRQ_TMP[12]
+ 00852 ;; sign in IRQ_TMP3[0]
+ 00853
+44A4 00854 TIA_SW_Pitch_Mods_Cont
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 113
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00855 ;; skip tuning if IRQ_TMP[12] == zero
+44A4 500B 00856 movf IRQ_TMP1, W
+44A6 100C 00857 iorwf IRQ_TMP2, W
+44A8 E007 00858 bz TIA_SW_Pitch_CopyFrq
+ 00859
+ 00860 ;; add to target frequency
+44AA CFE2 FFDA 00861 movff FSR1H, FSR2H
+44AE 50E1 00862 movf FSR1L, W
+44B0 0F07 00863 addlw TIA_Vx_TARGET_FRQ_L
+44B2 6ED9 00864 movwf FSR2L
+44B4 EC0D F026 00865 call TIA_SW_Hlp_Add16
+ 00866
+44B8 00867 TIA_SW_Pitch_CopyFrq
+44B8 0E03 00868 movlw TIA_Vx_STAT
+ 00869 BRA_IFSET PLUSW1, Vx_STAT_PORTA_ENABLE, ACCESS, TIA_SW_Pitch_End
+44BA BCE3 M btfsc reg, bit, reg_a
+44BC D017 M bra label
+ 00870
+44BE 0E07 00871 movlw TIA_Vx_TARGET_FRQ_L
+44C0 CFE3 F003 00872 movff PLUSW1, MIOS_PARAMETER1
+44C4 0E08 00873 movlw TIA_Vx_TARGET_FRQ_H
+44C6 CFE3 F004 00874 movff PLUSW1, MIOS_PARAMETER2
+ 00875
+44CA 0E09 00876 movlw TIA_Vx_FRQ_L
+44CC C003 FFE3 00877 movff MIOS_PARAMETER1, PLUSW1
+44D0 0E0A 00878 movlw TIA_Vx_FRQ_H
+44D2 C004 FFE3 00879 movff MIOS_PARAMETER2, PLUSW1
+ 00880
+44D6 EE21 F002 00881 lfsr FSR2, TIA_AUDF0
+44DA B10E 00882 btfsc TIA_SW_VOICE, 0
+44DC EE21 F003 00883 lfsr FSR2, TIA_AUDF1
+ 00884
+44E0 1C04 00885 comf MIOS_PARAMETER2, W
+44E2 30E8 00886 rrf WREG, W
+44E4 30E8 00887 rrf WREG, W
+44E6 30E8 00888 rrf WREG, W
+44E8 0B1F 00889 andlw 0x1f
+44EA 6EDF 00890 movwf INDF2
+ 00891
+44EC 00892 TIA_SW_Pitch_End
+44EC 0012 00893 return
+ 00894
+ 00895
+ 00896 ;; --------------------------------------------------------------------------
+ 00897 ;; This function handles the Portamento
+ 00898 ;; --------------------------------------------------------------------------
+44EE 00899 TIA_SW_Porta
+44EE 0E03 00900 movlw TIA_Vx_STAT
+ 00901 BRA_IFCLR PLUSW1, Vx_STAT_PORTA_ENABLE, ACCESS, TIA_SW_Porta_End
+44F0 ACE3 M btfss reg, bit, reg_a
+44F2 D0A0 M bra label
+ 00902
+44F4 EE21 F002 00903 lfsr FSR2, TIA_AUDF0
+44F8 B10E 00904 btfsc TIA_SW_VOICE, 0
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 114
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+44FA EE21 F003 00905 lfsr FSR2, TIA_AUDF1
+ 00906
+ 00907 ;; branch depending on portamento option
+44FE 0E04 00908 movlw TIA_Vx_MODE
+ 00909 BRA_IFCLR PLUSW1, Vx_MODE_PORTA_CONST, ACCESS, TIA_SW_Porta_NORM
+4500 A4E3 M btfss reg, bit, reg_a
+4502 D04C M bra label
+ 00910 ;; ------------------------------------------------------------------
+ 00911 ;; "constant" portamento mode (constant glide time)
+4504 00912 TIA_SW_Porta_CONST
+ 00913
+ 00914 ;; counter -> MUL_A_[LH]
+4504 0E1A 00915 movlw TIA_Vx_PORTA_CTR_L
+4506 CFE3 F1F8 00916 movff PLUSW1, MUL_A_L
+450A 0E1B 00917 movlw TIA_Vx_PORTA_CTR_H
+450C CFE3 F1F9 00918 movff PLUSW1, MUL_A_H
+ 00919 ;; Add delay to portamento counter -> MUL_A_[LH]
+ 00920 ;; get portamento delay from envelope table
+4510 0E0E 00921 movlw TIA_Vx_PORTA_RATE
+4512 50E3 00922 movf PLUSW1, W
+4514 EC5A F030 00923 call TIA_ENV_TABLE_Get
+ 00924 ;; add result to counter
+4518 90D8 00925 clrc
+451A 5003 00926 movf MIOS_PARAMETER1, W
+451C 27F8 00927 addwf MUL_A_L, F
+451E 5004 00928 movf MIOS_PARAMETER2, W
+4520 23F9 00929 addwfc MUL_A_H, F
+4522 E23B 00930 bc TIA_SW_Porta_CONST_Cont_Reached
+ 00931
+4524 0E1A 00932 movlw TIA_Vx_PORTA_CTR_L
+4526 C1F8 FFE3 00933 movff MUL_A_L, PLUSW1
+452A 0E1B 00934 movlw TIA_Vx_PORTA_CTR_H
+452C C1F9 FFE3 00935 movff MUL_A_H, PLUSW1
+ 00936
+ 00937 ;; target frequency -> MIOS_PARAMETER[12]
+4530 0E07 00938 movlw TIA_Vx_TARGET_FRQ_L
+4532 CFE3 F003 00939 movff PLUSW1, MIOS_PARAMETER1
+4536 0E08 00940 movlw TIA_Vx_TARGET_FRQ_H
+4538 CFE3 F004 00941 movff PLUSW1, MIOS_PARAMETER2
+ 00942
+ 00943 ;; get difference between target and previous frequency -> IRQ_TMP[12]
+453C 0E1C 00944 movlw TIA_Vx_PORTA_FRQ_L
+453E 50E3 00945 movf PLUSW1, W
+4540 5C03 00946 subwf MIOS_PARAMETER1, W
+4542 6E0B 00947 movwf IRQ_TMP1
+4544 0E1D 00948 movlw TIA_Vx_PORTA_FRQ_H
+4546 50E3 00949 movf PLUSW1, W
+4548 5804 00950 subwfb MIOS_PARAMETER2, W
+454A 6E0C 00951 movwf IRQ_TMP2
+ 00952 ;; convert IRQ_TMP[12] to absolute value
+454C 900D 00953 bcf IRQ_TMP3, 0
+454E A0D8 00954 btfss STATUS, C
+4550 800D 00955 bsf IRQ_TMP3, 0
+4552 A0D8 00956 btfss STATUS, C
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 115
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4554 1E0B 00957 comf IRQ_TMP1, F
+4556 A0D8 00958 btfss STATUS, C
+4558 1E0C 00959 comf IRQ_TMP2, F
+ 00960 ;; result in IRQ_TMP[12], sign in IRQ_TMP3[0]
+ 00961
+ 00962 ;; increment four to ensure that target will be reached
+455A 0E01 00963 movlw 1
+455C 260B 00964 addwf IRQ_TMP1, F
+455E 0E00 00965 movlw 0
+4560 220C 00966 addwfc IRQ_TMP2, F
+4562 C00B F1FA 00967 movff IRQ_TMP1, MUL_B_L
+4566 C00C F1FB 00968 movff IRQ_TMP2, MUL_B_H
+ 00969
+ 00970 ;; calc MUL_A_[LH] * MUL_B_[LH]
+456A ECED F01A 00971 call MATH_MUL16_16
+ 00972 ;; result in MUL_R_2 (low-byte) and MUL_R_3 (high-byte)
+ 00973
+ 00974 ;; branch depending on direction
+ 00975 BRA_IFSET IRQ_TMP3, 0, ACCESS, TIA_SW_Porta_CONST_Down
+456E B00D M btfsc reg, bit, reg_a
+4570 D009 M bra label
+4572 00976 TIA_SW_Porta_CONST_Up
+ 00977 ;; add scaled value to starting frequency
+4572 0E1C 00978 movlw TIA_Vx_PORTA_FRQ_L
+4574 50E3 00979 movf PLUSW1, W
+4576 25FE 00980 addwf MUL_R_2, W, BANKED
+4578 6E0B 00981 movwf IRQ_TMP1
+ 00982
+457A 0E1D 00983 movlw TIA_Vx_PORTA_FRQ_H
+457C 50E3 00984 movf PLUSW1, W
+457E 21FF 00985 addwfc MUL_R_3, W, BANKED
+4580 6E0C 00986 movwf IRQ_TMP2
+ 00987
+ 00988 ;; continue at normal portamento routine
+ 00989 rgoto TIA_SW_Porta_CONST_Up_Cont
+4582 D033 M bra label
+ 00990
+4584 00991 TIA_SW_Porta_CONST_Down
+ 00992 ;; subtract scaled value from starting frequency
+4584 0E1C 00993 movlw TIA_Vx_PORTA_FRQ_L
+4586 CFE3 F00B 00994 movff PLUSW1, IRQ_TMP1
+458A 0E1D 00995 movlw TIA_Vx_PORTA_FRQ_H
+458C CFE3 F00C 00996 movff PLUSW1, IRQ_TMP2
+ 00997
+4590 51FE 00998 movf MUL_R_2, W, BANKED
+4592 5E0B 00999 subwf IRQ_TMP1, F
+4594 51FF 01000 movf MUL_R_3, W, BANKED
+4596 5A0C 01001 subwfb IRQ_TMP2, F
+ 01002
+ 01003 ;; continue at normal portamento routine
+ 01004 rgoto TIA_SW_Porta_CONST_Down_Cont
+4598 D033 M bra label
+ 01005
+459A 01006 TIA_SW_Porta_CONST_Cont_Reached
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 116
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+459A D038 01007 bra TIA_SW_Porta_Cont_Reached
+ 01008
+ 01009 ;; ------------------------------------------------------------------
+ 01010 ;; "normal" portamento mode (non-constant glide time)
+459C 01011 TIA_SW_Porta_NORM
+ 01012 ;; multiply rate with current frequency
+ 01013 ;; get portamento multiplier from envelope table -> MUL_A
+459C 0E0E 01014 movlw TIA_Vx_PORTA_RATE
+459E 50E3 01015 movf PLUSW1, W
+45A0 EC5A F030 01016 call TIA_ENV_TABLE_Get
+45A4 C003 F1F8 01017 movff MIOS_PARAMETER1, MUL_A_L
+45A8 C004 F1F9 01018 movff MIOS_PARAMETER2, MUL_A_H
+ 01019
+ 01020 ;; result: low byte in WREG and MIOS_PARAMETER1, high byte in MIOS_PARAMETER2
+ 01021
+ 01022 ;; get current frequency -> MUL_B
+ 01023
+45AC 0E09 01024 movlw TIA_Vx_FRQ_L
+45AE CFE3 F1FA 01025 movff PLUSW1, MUL_B_L
+45B2 CFE3 F00B 01026 movff PLUSW1, IRQ_TMP1
+45B6 0E0A 01027 movlw TIA_Vx_FRQ_H
+45B8 CFE3 F1FB 01028 movff PLUSW1, MUL_B_H
+45BC CFE3 F00C 01029 movff PLUSW1, IRQ_TMP2
+ 01030
+45C0 ECED F01A 01031 call MATH_MUL16_16
+ 01032 ;; result in MUL_R_2 (low-byte) and MUL_R_3 (high-byte)
+ 01033 ;; ensure that result is != 0
+45C4 51FE 01034 movf MUL_R_2, W, BANKED
+45C6 11FF 01035 iorwf MUL_R_3, W, BANKED
+45C8 B4D8 01036 skpnz
+45CA 2BFE 01037 incf MUL_R_2, F, BANKED
+ 01038
+ 01039 ;; TIA_Vx_FRQ += result (depending on Portamento Direction)
+ 01040 ;movff MUL_R_2, IRQ_TMP1
+ 01041
+ 01042 ;; store target frequency in MIOS_PARAMETER[12]
+45CC 0E07 01043 movlw TIA_Vx_TARGET_FRQ_L
+45CE CFE3 F003 01044 movff PLUSW1, MIOS_PARAMETER1
+45D2 0E08 01045 movlw TIA_Vx_TARGET_FRQ_H
+45D4 CFE3 F004 01046 movff PLUSW1, MIOS_PARAMETER2
+ 01047
+ 01048 ;; branch depending on portamento direction
+ 01049 ;; check if value > current value
+45D8 5003 01050 movf MIOS_PARAMETER1, W
+45DA 5C0B 01051 subwf IRQ_TMP1, W
+45DC 5004 01052 movf MIOS_PARAMETER2, W
+45DE 580C 01053 subwfb IRQ_TMP2, W
+45E0 E20B 01054 bc TIA_SW_Porta_Down
+ 01055
+45E2 01056 TIA_SW_Porta_Up ;; decrement FRQ
+45E2 51FE 01057 movf MUL_R_2, W
+45E4 260B 01058 addwf IRQ_TMP1, F
+45E6 51FF 01059 movf MUL_R_3, W, BANKED
+45E8 220C 01060 addwfc IRQ_TMP2, F
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 117
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 01061
+45EA 01062 TIA_SW_Porta_CONST_Up_Cont ; re-used by ENV2 option
+ 01063 ;; check if value > MAX_VALUE
+45EA 90D8 01064 clrc
+45EC 500B 01065 movf IRQ_TMP1, W
+45EE 5C03 01066 subwf MIOS_PARAMETER1, W
+45F0 500C 01067 movf IRQ_TMP2, W
+45F2 5804 01068 subwfb MIOS_PARAMETER2, W
+45F4 E213 01069 bc TIA_SW_Porta_Cont ; branch to end if MAX_VALUE not reached
+ 01070 rgoto TIA_SW_Porta_Cont_Reached ; else copy MAX_VALUE into value and finish portamento
+45F6 D00A M bra label
+ 01071
+45F8 01072 TIA_SW_Porta_Down ;; increment FRQ
+45F8 51FE 01073 movf MUL_R_2, W
+45FA 5E0B 01074 subwf IRQ_TMP1, F
+45FC 51FF 01075 movf MUL_R_3, W, BANKED
+45FE 5A0C 01076 subwfb IRQ_TMP2, F
+ 01077
+4600 01078 TIA_SW_Porta_CONST_Down_Cont ; re-used by ENV2 option
+ 01079 ;; check if value < MIN_VALUE
+4600 90D8 01080 clrc
+4602 5003 01081 movf MIOS_PARAMETER1, W
+4604 5C0B 01082 subwf IRQ_TMP1, W
+4606 5004 01083 movf MIOS_PARAMETER2, W
+4608 580C 01084 subwfb IRQ_TMP2, W
+460A E208 01085 bc TIA_SW_Porta_Cont ; branch to end if MIN_VALUE not reached
+ 01086 ; else copy MIN_VALUE into value and finish portamento
+ 01087 ;rgoto TIA_SW_Porta_Cont_Reached ; else copy MAX_VALUE into value and finish portamento
+ 01088
+460C 01089 TIA_SW_Porta_Cont_Reached
+460C 0E07 01090 movlw TIA_Vx_TARGET_FRQ_L
+460E CFE3 F00B 01091 movff PLUSW1, IRQ_TMP1
+ 01092
+4612 0E08 01093 movlw TIA_Vx_TARGET_FRQ_H
+4614 CFE3 F00C 01094 movff PLUSW1, IRQ_TMP2
+ 01095
+4618 0E03 01096 movlw TIA_Vx_STAT
+461A 9CE3 01097 bcf PLUSW1, Vx_STAT_PORTA_ENABLE
+ 01098
+461C 01099 TIA_SW_Porta_Cont
+ 01100
+ 01101
+ 01102
+ 01103 ;; Copy Freq
+461C 0E09 01104 movlw TIA_Vx_FRQ_L
+461E C00B FFE3 01105 movff IRQ_TMP1, PLUSW1
+4622 0E0A 01106 movlw TIA_Vx_FRQ_H
+4624 C00C FFE3 01107 movff IRQ_TMP2, PLUSW1
+ 01108
+4628 1C0C 01109 comf IRQ_TMP2, W
+462A 30E8 01110 rrf WREG, W
+462C 30E8 01111 rrf WREG, W
+462E 30E8 01112 rrf WREG, W
+4630 0B1F 01113 andlw 0x1f
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 118
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4632 6EDF 01114 movwf INDF2
+ 01115
+4634 01116 TIA_SW_Porta_End
+4634 0012 01117 return
+ 01118
+ 01119 ;; --------------------------------------------------------------------------
+ 01120 ;; Help Function used from tia_midi.inc and tia_ccin.inc to reset ENV2
+ 01121 ;; --------------------------------------------------------------------------
+4636 01122 TIA_SW_Hlp_PortaCTR_Reset
+4636 C000 F001 01123 movff FSR0, FSR1
+ 01124
+463A 0E1A 01125 movlw TIA_Vx_PORTA_CTR_L
+463C 6AE3 01126 clrf PLUSW1, ACCESS
+463E 0E1B 01127 movlw TIA_Vx_PORTA_CTR_H
+4640 6AE3 01128 clrf PLUSW1, ACCESS
+ 01129
+4642 0012 01130 return
+ 01131
+ 01132 ;; --------------------------------------------------------------------------
+ 01133 ;; This function handles the amplitude
+ 01134 ;; --------------------------------------------------------------------------
+4644 01135 TIA_SW_Amp
+ 01136 ;; TIA_AUDCx
+4644 EE21 F000 01137 lfsr FSR2, TIA_BASE
+4648 0E04 01138 movlw 0x04
+464A 250E 01139 addwf TIA_SW_VOICE, W
+464C 6ED9 01140 movwf FSR2L
+ 01141
+ 01142
+464E 01143 TIA_SW_Amp_MasterVol
+ 01144 ;; Vx volume * Master Volume
+464E 0E0F 01145 movlw TIA_Vx_VOLUME
+4650 50E3 01146 movf PLUSW1, W
+4652 6E0B 01147 movwf IRQ_TMP1
+4654 510B 01148 movf TIA_MASTER_VOL, W
+4656 0F01 01149 addlw 1
+4658 020B 01150 mulwf IRQ_TMP1
+465A 36F3 01151 rlf PRODL, F
+465C 34F4 01152 rlf PRODH, W
+465E 6E03 01153 movwf MIOS_PARAMETER1
+4660 B4D8 01154 skpnz
+ 01155 rgoto TIA_SW_Amp_Gate
+4662 D090 M bra label
+ 01156
+ 01157 #if 0
+ 01158 movlw TIA_Vx_ENV_MODE
+ 01159 BRA_IFCLR PLUSW1, Vx_ENV_TOAMP_ON, ACCESS, TIA_SW_Amp_Mods
+ 01160
+ 01161 ;; store dedicated enveloppe value in MUL_A_[LH],sign in MIOS_PARAMETER3
+ 01162 movlw 0x40
+ 01163 btfsc TIA_SW_VOICE, 0
+ 01164 movlw 0x80
+ 01165 call TIA_SW_Hlp_GetMOD
+ 01166 ;; result in IRQ_TMP[123]
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 119
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 01167 movff IRQ_TMP3, MIOS_PARAMETER3
+ 01168 movf IRQ_TMP2, W
+ 01169 andlw 0x7f
+ 01170 movwf MUL_A_H
+ 01171 movf IRQ_TMP1, W
+ 01172 movwf MUL_A_L
+ 01173
+ 01174 ;; modulate amplitude
+ 01175 ;; assigned LFOs and ENVs in WREG
+ 01176 movlw TIA_Vx_PITCH_MOD
+ 01177 movf PLUSW1, W
+ 01178 andlw 0x3f
+ 01179 call TIA_SW_Hlp_GetMOD
+ 01180 ;; result in IRQ_TMP[123]
+ 01181
+ 01182 TIA_SW_Amp_Mods_Env_ExM
+ 01183 ;; Modulation mode
+ 01184 movlw TIA_Vx_ENV_MODE
+ 01185 movf PLUSW1, W
+ 01186 andlw 0x03
+ 01187 incf WREG, W
+ 01188 BRA_IFCLR WREG, Vx_ENV_MODTYP_ExM, ACCESS, TIA_SW_Amp_Mods_Env_EM
+ 01189 BRA_IFSET WREG, Vx_ENV_MODTYP_EM, ACCESS,TIA_SW_Amp_Mods_Env_ExM_NotDoubled
+ 01190 ;; Double the Dedicated ENVAUDx for AxB only Mode
+ 01191 rlf MUL_A_L, F
+ 01192 rlf MUL_A_H, F
+ 01193 TIA_SW_Amp_Mods_Env_ExM_NotDoubled
+ 01194 movf IRQ_TMP2, W
+ 01195 movwf MUL_B_H
+ 01196 movf IRQ_TMP1, W
+ 01197 movwf MUL_B_L
+ 01198 ;; multiplication
+ 01199 call MATH_MUL16_16
+ 01200 movf MUL_R_2, W, BANKED
+ 01201 movwf IRQ_TMP1
+ 01202 movf MUL_R_3, W, BANKED
+ 01203 movwf IRQ_TMP2
+ 01204 ;; process sign
+ 01205 movf MIOS_PARAMETER3, W
+ 01206 xorwf IRQ_TMP3, F
+ 01207
+ 01208 TIA_SW_Amp_Mods_Env_EM
+ 01209 ;; Modulation mode
+ 01210 movlw TIA_Vx_ENV_MODE
+ 01211 movf PLUSW1, W
+ 01212 btfsc TIA_SW_VOICE, 0
+ 01213 swapf WREG, W
+ 01214 andlw 0x03
+ 01215 incf WREG, W
+ 01216 BRA_IFCLR WREG, Vx_ENV_MODTYP_EM, ACCESS,TIA_SW_Amp_Mods_Cont
+ 01217 movf MIOS_PARAMETER3, W
+ 01218 bz TIA_SW_Amp_Mods_Env_EM_Pos
+ 01219 TIA_SW_Amp_Mods_Env_EM_Neg
+ 01220 comf MUL_A_L, F
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 120
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 01221 comf MUL_A_H, F
+ 01222 movf IRQ_TMP3, W
+ 01223 bz TIA_SW_Amp_Mods_Env_EM_Pos
+ 01224 movf IRQ_TMP1, W
+ 01225 subwf MUL_A_L, W
+ 01226 movwf IRQ_TMP1
+ 01227 movf IRQ_TMP2, W
+ 01228 subwfb MUL_A_H, W
+ 01229 movwf IRQ_TMP2
+ 01230 clrf IRQ_TMP3
+ 01231 bc TIA_SW_Amp_Mods_Cont
+ 01232 clrf IRQ_TMP1
+ 01233 clrf IRQ_TMP2
+ 01234 rgoto TIA_SW_Amp_Mods_Cont
+ 01235
+ 01236 TIA_SW_Amp_Mods_Env_EM_Pos
+ 01237 movf MUL_A_L, W
+ 01238 addwf IRQ_TMP1, F
+ 01239 movf MUL_A_H, W
+ 01240 addwfc IRQ_TMP2, F
+ 01241 TIA_SW_Amp_Mods_Env_EM_Set
+ 01242 ;; saturate on overflow (set frequency to zero to avoid unwanted HF beeps)
+ 01243 bnc TIA_SW_Amp_Mods_Cont
+ 01244 setf IRQ_TMP1
+ 01245 setf IRQ_TMP2
+ 01246 rgoto TIA_SW_Amp_Mods_Cont
+ 01247
+ 01248 TIA_SW_Amp_Mods
+ 01249 ;; modulate pitch
+ 01250 ;; assigned LFOs and ENVs in WREG
+ 01251 movlw TIA_Vx_PITCH_MOD
+ 01252 movf PLUSW1, W
+ 01253 andlw 0x3f
+ 01254 bz TIA_SW_Amp_CopyFrq
+ 01255 call TIA_SW_Hlp_GetMOD
+ 01256 ;; unsigned result in IRQ_TMP[12]
+ 01257 ;; sign in IRQ_TMP3[0]
+ 01258
+ 01259 TIA_SW_Amp_Mods_Cont
+ 01260 ;; skip tuning if IRQ_TMP[12] == zero
+ 01261 movf IRQ_TMP1, W
+ 01262 iorwf IRQ_TMP2, W
+ 01263 bz TIA_SW_Amp_Mods_End
+ 01264
+ 01265
+ 01266 #else
+ 01267
+4664 01268 TIA_SW_Amp_Mods
+4664 0E2A 01269 movlw TIA_Vx_ENV_MODE
+ 01270 BRA_IFCLR PLUSW1, Vx_ENV_TOAMP_ON, ACCESS, TIA_SW_Amp_Mods_Cont
+4666 A4E3 M btfss reg, bit, reg_a
+4668 D03D M bra label
+ 01271
+ 01272 ;; Modulation type in MIOS_PARAMETER3
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 121
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+466A 0E2A 01273 movlw TIA_Vx_ENV_MODE
+466C 50E3 01274 movf PLUSW1, W
+466E 0B03 01275 andlw 0x03
+4670 6E05 01276 movwf MIOS_PARAMETER3
+4672 2A05 01277 incf MIOS_PARAMETER3, F
+ 01278
+ 01279 ;; prepare enveloppe value in MIOS_PARAMETER2
+ 01280 ;; env2amp in WREG
+4674 0E40 01281 movlw 0x40
+4676 B10E 01282 btfsc TIA_SW_VOICE, 0
+4678 0E80 01283 movlw 0x80
+467A ECB7 F024 01284 call TIA_SW_Hlp_GetMOD
+ 01285 ;; result in IRQ_TMP[123]
+467E 500C 01286 movf IRQ_TMP2, W
+4680 B00D 01287 btfsc IRQ_TMP3, 0
+4682 1C0C 01288 comf IRQ_TMP2, W
+4684 0B7F 01289 andlw 0x7f
+4686 6E04 01290 movwf MIOS_PARAMETER2
+ 01291
+ 01292 ;; modulate amplitude
+ 01293 ;; assigned LFOs and ENVs in WREG
+4688 0E17 01294 movlw TIA_Vx_AMP_MOD
+468A 50E3 01295 movf PLUSW1, W
+468C 0B3F 01296 andlw 0x3f
+468E ECB7 F024 01297 call TIA_SW_Hlp_GetMOD
+ 01298 ;; result in IRQ_TMP[123]
+ 01299
+ 01300
+4692 01301 TIA_SW_Amp_Mods_Env_ExM
+ 01302 BRA_IFCLR MIOS_PARAMETER3, Vx_ENV_MODTYP_ExM, ACCESS, TIA_SW_Amp_Mods_Env_EM
+4692 A205 M btfss reg, bit, reg_a
+4694 D017 M bra label
+ 01303 BRA_IFSET MIOS_PARAMETER3, Vx_ENV_MODTYP_EM, ACCESS, TIA_SW_Amp_Mods_Env_EM_ExM
+4696 B005 M btfsc reg, bit, reg_a
+4698 D010 M bra label
+469A 3604 01304 rlcf MIOS_PARAMETER2, F
+469C 0E3F 01305 movlw 0x3f
+469E 6EF4 01306 movwf PRODH
+46A0 6AF3 01307 clrf PRODL
+46A2 EC31 F025 01308 call TIA_SW_Hlp_AddOffset16
+ 01309 ;; result in IRQ_TMP[12]
+46A6 500C 01310 movf IRQ_TMP2, W
+46A8 BE0C 01311 btfsc IRQ_TMP2, 7
+46AA 0E7F 01312 movlw 0x7f
+ 01313
+46AC 0204 01314 mulwf MIOS_PARAMETER2
+46AE 36F3 01315 rlf PRODL, F
+46B0 34F4 01316 rlf PRODH, W
+46B2 BEE8 01317 btfsc WREG, 7
+46B4 0E7F 01318 movlw 0x7f
+46B6 6E04 01319 movwf MIOS_PARAMETER2
+ 01320 rgoto TIA_SW_Amp_Mods_Env_Cont
+46B8 D00C M bra label
+ 01321
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 122
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+46BA 01322 TIA_SW_Amp_Mods_Env_EM_ExM
+46BA 500C 01323 movf IRQ_TMP2, W
+46BC 0204 01324 mulwf MIOS_PARAMETER2
+46BE 50F4 01325 movf PRODH, W
+46C0 6E0C 01326 movwf IRQ_TMP2
+46C2 6A0B 01327 clrf IRQ_TMP1
+ 01328
+46C4 01329 TIA_SW_Amp_Mods_Env_EM
+46C4 3004 01330 rrf MIOS_PARAMETER2, W
+46C6 EC2D F025 01331 call TIA_SW_Hlp_AddOffset
+ 01332 ;; result in IRQ_TMP[12]
+46CA 500C 01333 movf IRQ_TMP2, W
+46CC BE0C 01334 btfsc IRQ_TMP2, 7
+46CE 0E7F 01335 movlw 0x7f
+46D0 6E04 01336 movwf MIOS_PARAMETER2
+ 01337
+46D2 01338 TIA_SW_Amp_Mods_Env_Cont
+46D2 5003 01339 movf MIOS_PARAMETER1, W
+46D4 04E8 01340 decf WREG, W
+46D6 0204 01341 mulwf MIOS_PARAMETER2
+46D8 36F3 01342 rlf PRODL, F
+46DA 34F4 01343 rlf PRODH, W
+46DC BEE8 01344 btfsc WREG, 7
+46DE 0E7F 01345 movlw 0x7f
+46E0 6E03 01346 movwf MIOS_PARAMETER1
+ 01347 rgoto TIA_SW_Amp_Mods_End
+46E2 D00E M bra label
+ 01348
+46E4 01349 TIA_SW_Amp_Mods_Cont
+ 01350 ;; modulate amplitude
+ 01351 ;; assigned LFOs and ENVs in WREG
+46E4 0E17 01352 movlw TIA_Vx_AMP_MOD
+46E6 50E3 01353 movf PLUSW1, W
+46E8 0B3F 01354 andlw 0x3f
+46EA E00A 01355 bz TIA_SW_Amp_Mods_End
+46EC ECB7 F024 01356 call TIA_SW_Hlp_GetMOD
+ 01357 ;; result in IRQ_TMP[123]
+46F0 B00D 01358 btfsc IRQ_TMP3, 0
+46F2 6A03 01359 clrf MIOS_PARAMETER1
+46F4 5003 01360 movf MIOS_PARAMETER1, W
+46F6 020C 01361 mulwf IRQ_TMP2
+46F8 44F4 01362 rlncf PRODH, W
+46FA BEE8 01363 btfsc WREG, 7
+46FC 0E7F 01364 movlw 0x7f
+46FE 6E03 01365 movwf MIOS_PARAMETER1
+ 01366 #endif
+4700 01367 TIA_SW_Amp_Mods_End
+ 01368
+4700 0E03 01369 movlw TIA_Vx_STAT
+ 01370 BRA_IFSET PLUSW1, Vx_STAT_ENV_ACTIVE, ACCESS, TIA_SW_Amp_Vel
+4702 BAE3 M btfsc reg, bit, reg_a
+4704 D002 M bra label
+ 01371 BRA_IFCLR PLUSW1, Vx_STAT_GATE_NOTE_ON, ACCESS, TIA_SW_Amp_Vel_End
+4706 A8E3 M btfss reg, bit, reg_a
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 123
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4708 D03D M bra label
+470A 01372 TIA_SW_Amp_Vel
+470A 0E04 01373 movlw TIA_Vx_MODE
+ 01374 BRA_IFCLR PLUSW1, Vx_MODE_VEL2AMP_ON, ACCESS, TIA_SW_Amp_Vel_End
+470C A8E3 M btfss reg, bit, reg_a
+470E D03A M bra label
+ 01375 ;; Velocity calc
+4710 0E29 01376 movlw TIA_Vx_DEPTH_VEL
+4712 50E3 01377 movf PLUSW1, W
+4714 6E0C 01378 movwf IRQ_TMP2
+4716 0A40 01379 xorlw 0x40
+4718 E035 01380 bz TIA_SW_Amp_Vel_End
+ 01381
+471A 6A0D 01382 clrf IRQ_TMP3
+471C 0E29 01383 movlw TIA_Vx_DEPTH_VEL
+471E ACE3 01384 btfss PLUSW1, 6, ACCESS
+4720 800D 01385 bsf IRQ_TMP3, 0
+ 01386
+4722 500C 01387 movf IRQ_TMP2, W
+4724 0B3F 01388 andlw 0x3f
+ 01389 ;; depth * velocity
+4726 90D8 01390 clrc
+4728 34E8 01391 rlf WREG, W
+ 01392 ;addlw 2
+ 01393 ;movwf IRQ_TMP2
+ 01394
+472A B00D 01395 btfsc IRQ_TMP3, 0, ACCESS
+ 01396 rgoto TIA_SW_Amp_Vel_Neg
+472C D01A M bra label
+ 01397
+472E 01398 TIA_SW_Amp_Vel_Pos
+472E 0F02 01399 addlw 2
+4730 6E0C 01400 movwf IRQ_TMP2
+ 01401
+4732 0E28 01402 movlw TIA_Vx_LAST_VEL
+4734 50E3 01403 movf PLUSW1, W
+4736 020C 01404 mulwf IRQ_TMP2
+4738 90D8 01405 clrc
+473A 36F3 01406 rlf PRODL, F
+473C 34F4 01407 rlf PRODH, W
+473E 0F01 01408 addlw 1
+4740 6E0C 01409 movwf IRQ_TMP2
+ 01410
+4742 0E04 01411 movlw TIA_Vx_MODE
+ 01412 BRA_IFSET PLUSW1, Vx_MODE_GSA_ACTIVE, ACCESS, TIA_SW_Amp_Vel_Pos_GSA
+4744 B0E3 M btfsc reg, bit, reg_a
+4746 D006 M bra label
+4748 5003 01413 movf MIOS_PARAMETER1, W
+474A 020C 01414 mulwf IRQ_TMP2
+474C 36F3 01415 rlf PRODL, F
+474E 34F4 01416 rlf PRODH, W
+4750 6E03 01417 movwf MIOS_PARAMETER1
+ 01418 rgoto TIA_SW_Amp_Vel_End
+4752 D018 M bra label
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 124
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4754 01419 TIA_SW_Amp_Vel_Pos_GSA
+4754 5003 01420 movf MIOS_PARAMETER1, W
+4756 087F 01421 sublw 0x7f
+4758 020C 01422 mulwf IRQ_TMP2
+475A 36F3 01423 rlf PRODL, F
+475C 34F4 01424 rlf PRODH, W
+475E 2603 01425 addwf MIOS_PARAMETER1, F
+ 01426 rgoto TIA_SW_Amp_Vel_End
+4760 D011 M bra label
+ 01427
+4762 01428 TIA_SW_Amp_Vel_Neg
+4762 1CE8 01429 comf WREG, W
+4764 0B7F 01430 andlw 0x7f
+4766 0F02 01431 addlw 2
+4768 6E0C 01432 movwf IRQ_TMP2
+ 01433
+476A 0E28 01434 movlw TIA_Vx_LAST_VEL
+476C 50E3 01435 movf PLUSW1, W
+476E 020C 01436 mulwf IRQ_TMP2
+4770 90D8 01437 clrc
+4772 36F3 01438 rlf PRODL, F
+4774 34F4 01439 rlf PRODH, W
+4776 0F01 01440 addlw 1
+4778 6E0C 01441 movwf IRQ_TMP2
+ 01442
+477A 5003 01443 movf MIOS_PARAMETER1, W
+477C 020C 01444 mulwf IRQ_TMP2
+477E 36F3 01445 rlf PRODL, F
+4780 34F4 01446 rlf PRODH, W
+4782 5E03 01447 subwf MIOS_PARAMETER1, F
+ 01448 ;rgoto TIA_SW_Amp_Vel_End
+4784 01449 TIA_SW_Amp_Vel_End
+ 01450
+4784 01451 TIA_SW_Amp_Gate
+4784 0E2A 01452 movlw TIA_Vx_ENV_MODE
+ 01453 BRA_IFCLR PLUSW1, Vx_ENV_TOAMP_ON, ACCESS, TIA_SW_Amp_Gate_Act
+4786 A4E3 M btfss reg, bit, reg_a
+4788 D003 M bra label
+478A 0E03 01454 movlw TIA_Vx_STAT
+ 01455 BRA_IFSET PLUSW1, Vx_STAT_ENV_ACTIVE, ACCESS, TIA_SW_Amp_CopyAmp
+478C BAE3 M btfsc reg, bit, reg_a
+478E D018 M bra label
+4790 01456 TIA_SW_Amp_Gate_Act
+4790 0E03 01457 movlw TIA_Vx_STAT
+ 01458 BRA_IFSET PLUSW1, Vx_STAT_GATE_ACTIVE, ACCESS, TIA_SW_Amp_CopyAmp
+4792 B6E3 M btfsc reg, bit, reg_a
+4794 D015 M bra label
+4796 0E0F 01459 movlw 0x0f
+4798 14DF 01460 andwf INDF2, W
+479A E00C 01461 bz TIA_SW_Amp_PolynomResync
+ 01462
+479C 01463 TIA_SW_Amp_Gate_FadeOut
+479C 6E0C 01464 movwf IRQ_TMP2
+479E 0E02 01465 movlw DEFAULT_TIA_GATE_FADEOUT
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 125
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+47A0 5A0C 01466 subwfb IRQ_TMP2, F
+47A2 E201 01467 bc TIA_SW_Amp_Gate_FadeOut_Norm
+47A4 01468 TIA_SW_Amp_Gate_FadeOut_Clear
+47A4 6A0C 01469 clrf IRQ_TMP2
+ 01470
+47A6 01471 TIA_SW_Amp_Gate_FadeOut_Norm
+47A6 0EF0 01472 movlw 0xf0
+47A8 16DF 01473 andwf INDF2, F
+47AA 0E0F 01474 movlw 0x0f
+47AC 140C 01475 andwf IRQ_TMP2, W
+47AE 10DF 01476 iorwf INDF2, W
+47B0 0B0F 01477 andlw 0x0f
+47B2 6EDF 01478 movwf INDF2
+47B4 01479 TIA_SW_Amp_PolynomResync
+47B4 0E04 01480 movlw TIA_Vx_MODE
+ 01481 BRA_IFCLR PLUSW1, Vx_MODE_GRP_ACTIVE, ACCESS, TIA_SW_Amp_End
+47B6 A2E3 M btfss reg, bit, reg_a
+47B8 D00B M bra label
+47BA 0EFC 01482 movlw -4
+47BC 8EDB 01483 bsf PLUSW2, 7
+ 01484 rgoto TIA_SW_Amp_End
+47BE D008 M bra label
+ 01485
+47C0 01486 TIA_SW_Amp_CopyAmp
+47C0 90D8 01487 clrc
+47C2 3203 01488 rrf MIOS_PARAMETER1, F
+47C4 4203 01489 rrncf MIOS_PARAMETER1, F
+47C6 4003 01490 rrncf MIOS_PARAMETER1, W
+47C8 0B0F 01491 andlw 0x0f
+47CA 6EDF 01492 movwf INDF2
+47CC 0EFC 01493 movlw -4
+47CE 9EDB 01494 bcf PLUSW2, 7
+47D0 01495 TIA_SW_Amp_End
+47D0 0012 01496 return
+ 01497
+ 01498
+ 01499 ;; --------------------------------------------------------------------------
+ 01500 ;; This function handles the LFOs
+ 01501 ;; --------------------------------------------------------------------------
+47D2 01502 TIA_SW_LFO
+ 01503 ;; LFO number in TIA_SW_LFO_NUMBER - calculate base address
+ 01504 ;lfsr FSR1, TIA_LFO1_BASE
+ 01505 ;movf TIA_SW_LFO_NUMBER, W, BANKED
+ 01506 ;mullw TIA_LFOx_RECORD_LEN
+ 01507 ;movf PRODL, W
+ 01508 ;addwf FSR1L, F
+ 01509
+ 01510 ;; clear result register and skip LFO if not enabled
+47D2 0E00 01511 movlw TIA_LFOx_MODE
+ 01512 BRA_IFSET PLUSW1, LFOx_MODE_ENABLE, ACCESS, TIA_SW_LFO_Enabled
+47D4 B0E3 M btfsc reg, bit, reg_a
+47D6 D005 M bra label
+47D8 01513 TIA_SW_LFO_Disabled
+47D8 0E05 01514 movlw TIA_LFOx_RVALUE_L
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 126
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+47DA 6AE3 01515 clrf PLUSW1
+47DC 0E06 01516 movlw TIA_LFOx_RVALUE_H
+47DE 6AE3 01517 clrf PLUSW1
+ 01518 rgoto TIA_SW_LFO_End
+47E0 D03D M bra label
+47E2 01519 TIA_SW_LFO_Enabled
+ 01520
+ 01521 ;; increment step counter, store result also in IRQ_TMP1
+47E2 0E02 01522 movlw TIA_LFOx_CTR
+47E4 2AE3 01523 incf PLUSW1, F
+47E6 CFE3 F00B 01524 movff PLUSW1, IRQ_TMP1
+ 01525
+ 01526 ;; get CTR/ADD entry from LFO table depending on LFO Rate
+47EA 0E01 01527 movlw TIA_LFOx_RATE
+47EC 50E3 01528 movf PLUSW1, W
+47EE ECEA F030 01529 call TIA_LFO_TABLE_Get
+ 01530 ;; result: CTR value in WREG and MIOS_PARAMETER1, ADD value in MIOS_PARAMETER2
+ 01531
+ 01532 ;; exit if max step counter value (CTR) not reached
+ 01533 ;; movf MIOS_PARAMETER1, W
+47F2 5C0B 01534 subwf IRQ_TMP1, W ; result of LFOx_CTR in IRQ_TMP1
+47F4 E333 01535 bnc TIA_SW_LFO_End
+ 01536
+ 01537 ;; else clear step counter
+47F6 0E02 01538 movlw TIA_LFOx_CTR
+47F8 6AE3 01539 clrf PLUSW1
+ 01540
+ 01541 ;; skip multiply routine if LFO_x_DEPTH is 0x40 (zero depth)
+47FA 0E04 01542 movlw TIA_LFOx_DEPTH
+47FC 50E3 01543 movf PLUSW1, W
+47FE 0A40 01544 xorlw 0x40
+4800 E105 01545 bnz TIA_SW_LFO_DepthOk
+4802 01546 TIA_SW_LFO_Depth40
+ 01547 ;; clear 16bit result value registers and exit
+4802 0E05 01548 movlw TIA_LFOx_RVALUE_L
+4804 6AE3 01549 clrf PLUSW1
+4806 0E06 01550 movlw TIA_LFOx_RVALUE_H
+4808 6AE3 01551 clrf PLUSW1
+ 01552 rgoto TIA_SW_LFO_End
+480A D028 M bra label
+480C 01553 TIA_SW_LFO_DepthOk
+ 01554
+ 01555 ;; add or subtract ADD value to linear LFO value
+480C 0E03 01556 movlw TIA_LFOx_VALUE
+480E CFE3 F00D 01557 movff PLUSW1, IRQ_TMP3
+ 01558
+4812 0E00 01559 movlw TIA_LFOx_MODE
+ 01560 BRA_IFSET PLUSW1, LFOx_MODE_DECINC, ACCESS, TIA_SW_LFO_Dec
+4814 BEE3 M btfsc reg, bit, reg_a
+4816 D008 M bra label
+4818 01561 TIA_SW_LFO_Inc
+4818 5004 01562 movf MIOS_PARAMETER2, W ; get ADD value
+481A 260D 01563 addwf IRQ_TMP3, F ; add to linear LFO value
+481C E30D 01564 bnc TIA_SW_LFO_Cont ; skip next if max value (0xff) not reached
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 127
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+481E 1C0D 01565 comf IRQ_TMP3, W ; subtract the missing ticks
+4820 260D 01566 addwf IRQ_TMP3, F
+4822 0E00 01567 movlw TIA_LFOx_MODE
+4824 8EE3 01568 bsf PLUSW1, LFOx_MODE_DECINC ; switch to decrement
+ 01569 rgoto TIA_SW_LFO_Cont
+4826 D008 M bra label
+ 01570
+4828 01571 TIA_SW_LFO_Dec
+4828 5004 01572 movf MIOS_PARAMETER2, W ; get ADD value
+482A 5E0D 01573 subwf IRQ_TMP3, F ; decrement from linear LFO value
+482C E205 01574 bc TIA_SW_LFO_Cont ; skip next if min value (0x00) not reached
+482E 1C0D 01575 comf IRQ_TMP3, W ; add the missing ticks
+4830 0F01 01576 addlw 1
+4832 260D 01577 addwf IRQ_TMP3, F
+4834 0E00 01578 movlw TIA_LFOx_MODE
+4836 9EE3 01579 bcf PLUSW1, LFOx_MODE_DECINC ; switch to increment
+4838 01580 TIA_SW_LFO_Cont
+ 01581
+ 01582 ;; write back IRQ_TMP3 -> TIA_LFOx_VALUE
+4838 0E03 01583 movlw TIA_LFOx_VALUE
+483A C00D FFE3 01584 movff IRQ_TMP3, PLUSW1
+ 01585
+ 01586 ;; convert linear LFO value to waveform by using the TIA_SW_LFO_Hlp_Waveform function
+ 01587 ;; LFO mode in IRQ_TMP1
+483E 0E00 01588 movlw TIA_LFOx_MODE
+4840 CFE3 F00B 01589 movff PLUSW1, IRQ_TMP1
+ 01590 ;; LFO depth in IRQ_TMP2
+4844 0E04 01591 movlw TIA_LFOx_DEPTH
+4846 CFE3 F00C 01592 movff PLUSW1, IRQ_TMP2
+ 01593 ;; linear LFO value in WREG
+484A 500D 01594 movf IRQ_TMP3, W
+ 01595 ;; process waveform
+ 01596
+484C EC57 F025 01597 call TIA_SW_LFO_Hlp_Waveform
+ 01598
+ 01599 ;; store 16bit result in RVALUE registers
+4850 0E05 01600 movlw TIA_LFOx_RVALUE_L
+4852 CFF3 FFE3 01601 movff PRODL, PLUSW1
+4856 0E06 01602 movlw TIA_LFOx_RVALUE_H
+4858 CFF4 FFE3 01603 movff PRODH, PLUSW1
+485C 01604 TIA_SW_LFO_End
+485C 0012 01605 return
+ 01606
+ 01607
+ 01608 ;; --------------------------------------------------------------------------
+ 01609 ;; This function handles the ENVs
+ 01610 ;; expects TIA_ENVx_CURVES bitfield (lower or upper nibble) in WREG
+ 01611 ;;
+ 01612 ;; TIA_ENVx_CURVES.7 and TIA_ENVx_CURVES.3 contain the ACCENT flag which
+ 01613 ;; is used in TB303 mode (copied to IRQ_TMP4.3
+ 01614 ;; --------------------------------------------------------------------------
+485E 01615 TIA_SW_ENV
+485E 0B07 01616 andlw 0x07
+4860 6E0E 01617 movwf IRQ_TMP4
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 128
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 01618
+4862 510F 01619 movf TIA_SW_ENV_NUMBER, W, BANKED
+4864 0BFE 01620 andlw 0xfe
+4866 E108 01621 bnz TIA_SW_ENV_VxStatSkp
+ 01622
+ 01623 ;; Vx dedicated Env clear/set Active
+4868 0E03 01624 movlw TIA_Vx_STAT
+486A 9ADB 01625 bcf PLUSW2, Vx_STAT_ENV_ACTIVE
+486C 0E00 01626 movlw TIA_ENVx_MODE
+486E 50E3 01627 movf PLUSW1, W
+4870 0B1F 01628 andlw 0x1f
+4872 E002 01629 bz TIA_SW_ENV_VxStatSkp
+4874 0E03 01630 movlw TIA_Vx_STAT
+4876 8ADB 01631 bsf PLUSW2, Vx_STAT_ENV_ACTIVE
+4878 01632 TIA_SW_ENV_VxStatSkp
+ 01633
+ 01634 ;; prepare call of TIA_SW_ENV_GetBendedValue
+4878 0E07 01635 movlw TIA_ENVx_CURVE
+487A CFE3 F00C 01636 movff PLUSW1, IRQ_TMP2
+487E 0E02 01637 movlw TIA_ENVx_CTR_H
+4880 CFE3 F00B 01638 movff PLUSW1, IRQ_TMP1
+ 01639
+ 01640 ;; branch depending on ENV state
+4884 0E00 01641 movlw TIA_ENVx_MODE
+ 01642 BRA_IFSET PLUSW1, ENVx_MODE_RELEASE, ACCESS, TIA_SW_ENV_Release
+4886 B6E3 M btfsc reg, bit, reg_a
+4888 D03E M bra label
+ 01643 BRA_IFCLR PLUSW1, ENVx_MODE_ATTACK, ACCESS, TIA_SW_ENV_Calc
+488A A0E3 M btfss reg, bit, reg_a
+488C D054 M bra label
+ 01644 BRA_IFSET PLUSW1, ENVx_MODE_SUSTAIN, ACCESS, TIA_SW_ENV_Sustain
+488E B4E3 M btfsc reg, bit, reg_a
+4890 D032 M bra label
+ 01645 BRA_IFSET PLUSW1, ENVx_MODE_DECAY, ACCESS, TIA_SW_ENV_Decay
+4892 B2E3 M btfsc reg, bit, reg_a
+4894 D013 M bra label
+ 01646
+4896 01647 TIA_SW_ENV_Attack
+ 01648 ;; get attack rate depending on curve setting
+4896 0E03 01649 movlw TIA_ENVx_ATTACK
+4898 CFE3 F00D 01650 movff PLUSW1, IRQ_TMP3
+489C 500E 01651 movf IRQ_TMP4, W
+489E 0B01 01652 andlw 0x01
+48A0 EC26 F026 01653 call TIA_SW_ENV_GetBendedValue
+ 01654 ;; result: low byte in WREG and MIOS_PARAMETER1, high byte in MIOS_PARAMETER2
+ 01655
+ 01656 ;; add to ENV counter
+48A4 0E01 01657 movlw TIA_ENVx_CTR_L
+48A6 50E3 01658 movf PLUSW1, W
+48A8 2603 01659 addwf MIOS_PARAMETER1, F
+48AA 0E02 01660 movlw TIA_ENVx_CTR_H
+48AC 50E3 01661 movf PLUSW1, W
+48AE 2204 01662 addwfc MIOS_PARAMETER2, F
+48B0 E342 01663 bnc TIA_SW_ENV_Calc
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 129
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 01664
+ 01665 ;; if value >= 0xffff: set to 0xffff, switch to Decay
+48B2 6803 01666 setf MIOS_PARAMETER1
+48B4 6804 01667 setf MIOS_PARAMETER2
+48B6 0E00 01668 movlw TIA_ENVx_MODE
+48B8 82E3 01669 bsf PLUSW1, ENVx_MODE_DECAY
+ 01670 rgoto TIA_SW_ENV_Calc
+48BA D03D M bra label
+ 01671
+ 01672
+ 01673
+48BC 01674 TIA_SW_ENV_Decay
+ 01675 ;; get decay rate depending on curve setting
+48BC 0E04 01676 movlw TIA_ENVx_DECAY
+48BE CFE3 F00D 01677 movff PLUSW1, IRQ_TMP3
+ 01678
+48C2 500E 01679 movf IRQ_TMP4, W
+48C4 0B02 01680 andlw 0x02
+48C6 EC26 F026 01681 call TIA_SW_ENV_GetBendedValue
+ 01682 ;; result: low byte in WREG and MIOS_PARAMETER1, high byte in MIOS_PARAMETER2
+ 01683
+ 01684 ;; subtraction with current counter value
+48CA 0E01 01685 movlw TIA_ENVx_CTR_L
+48CC CFE3 F00B 01686 movff PLUSW1, IRQ_TMP1
+48D0 0E02 01687 movlw TIA_ENVx_CTR_H
+48D2 CFE3 F00C 01688 movff PLUSW1, IRQ_TMP2
+ 01689
+48D6 5003 01690 movf MIOS_PARAMETER1, W
+48D8 5C0B 01691 subwf IRQ_TMP1, W
+48DA 6E03 01692 movwf MIOS_PARAMETER1
+48DC 5004 01693 movf MIOS_PARAMETER2, W
+48DE 580C 01694 subwfb IRQ_TMP2, W
+48E0 6E04 01695 movwf MIOS_PARAMETER2
+48E2 E309 01696 bnc TIA_SW_ENV_Sustain
+ 01697
+ 01698 ;; check if counter value < sustain value
+48E4 0E05 01699 movlw TIA_ENVx_SUSTAIN
+48E6 34E3 01700 rlf PLUSW1, W
+48E8 0BFE 01701 andlw 0xfe
+48EA 6E0B 01702 movwf IRQ_TMP1
+48EC 0E00 01703 movlw 0x00
+48EE 5C03 01704 subwf MIOS_PARAMETER1, W
+48F0 500B 01705 movf IRQ_TMP1, W
+48F2 5804 01706 subwfb MIOS_PARAMETER2, W
+48F4 E220 01707 bc TIA_SW_ENV_Calc
+ 01708
+48F6 01709 TIA_SW_ENV_Sustain
+ 01710 ;; write sustain value into counter
+48F6 0E05 01711 movlw TIA_ENVx_SUSTAIN
+48F8 34E3 01712 rlf PLUSW1, W
+48FA 0BFE 01713 andlw 0xfe
+48FC 6E04 01714 movwf MIOS_PARAMETER2
+48FE 6A03 01715 clrf MIOS_PARAMETER1
+ 01716
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 130
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4900 0E00 01717 movlw TIA_ENVx_MODE
+4902 84E3 01718 bsf PLUSW1, ENVx_MODE_SUSTAIN
+ 01719 rgoto TIA_SW_ENV_Calc
+4904 D018 M bra label
+ 01720
+4906 01721 TIA_SW_ENV_Release
+ 01722 ;; get release rate depending on curve setting
+4906 0E06 01723 movlw TIA_ENVx_RELEASE
+4908 CFE3 F00D 01724 movff PLUSW1, IRQ_TMP3
+490C 500E 01725 movf IRQ_TMP4, W
+490E 0B04 01726 andlw 0x04
+4910 EC26 F026 01727 call TIA_SW_ENV_GetBendedValue
+ 01728 ;; result: low byte in WREG and MIOS_PARAMETER1, high byte in MIOS_PARAMETER2
+ 01729
+ 01730 ;; subtraction with current counter value
+4914 0E01 01731 movlw TIA_ENVx_CTR_L
+4916 CFE3 F00B 01732 movff PLUSW1, IRQ_TMP1
+491A 0E02 01733 movlw TIA_ENVx_CTR_H
+491C CFE3 F00C 01734 movff PLUSW1, IRQ_TMP2
+ 01735
+4920 5003 01736 movf MIOS_PARAMETER1, W
+4922 5C0B 01737 subwf IRQ_TMP1, W
+4924 6E03 01738 movwf MIOS_PARAMETER1
+4926 5004 01739 movf MIOS_PARAMETER2, W
+4928 580C 01740 subwfb IRQ_TMP2, W
+492A 6E04 01741 movwf MIOS_PARAMETER2
+492C E204 01742 bc TIA_SW_ENV_Calc
+ 01743
+ 01744 ;; zero reached
+492E 6A03 01745 clrf MIOS_PARAMETER1
+4930 6A04 01746 clrf MIOS_PARAMETER2
+4932 0E00 01747 movlw TIA_ENVx_MODE
+4934 6AE3 01748 clrf PLUSW1
+4936 01749 TIA_SW_ENV_Calc
+ 01750 ;; copy MIOS_PARAMETER[12] to TIA_ENVx_CTR_[LH]
+4936 0E01 01751 movlw TIA_ENVx_CTR_L
+4938 C003 FFE3 01752 movff MIOS_PARAMETER1, PLUSW1
+493C 0E02 01753 movlw TIA_ENVx_CTR_H
+493E C004 FFE3 01754 movff MIOS_PARAMETER2, PLUSW1
+ 01755
+ 01756 ;; calculate envelope value depending on envelope rate
+ 01757
+ 01758 ;; clear ENV ResultValue Registers
+4942 0E09 01759 movlw TIA_ENVx_RVALUE_L
+4944 6AE3 01760 clrf PLUSW1
+4946 0E0A 01761 movlw TIA_ENVx_RVALUE_H
+4948 6AE3 01762 clrf PLUSW1
+ 01763
+ 01764 ;; skip multiply routine if ENV_x_DEPTH is 0x40
+494A 0E08 01765 movlw TIA_ENVx_DEPTH
+494C 50E3 01766 movf PLUSW1, W
+494E 0A40 01767 xorlw 0x40
+4950 E00D 01768 bz TIA_SW_ENV_End
+ 01769
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 131
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 01770 ;; convert linear ENV value to waveform by using the TIA_SW_ENV_Hlp_Waveform function
+ 01771 ;; depth in IRQ_TMP2
+4952 0E08 01772 movlw TIA_ENVx_DEPTH
+4954 CFE3 F00C 01773 movff PLUSW1, IRQ_TMP2
+ 01774 ;; linear ENV value in WREG
+4958 0E02 01775 movlw TIA_ENVx_CTR_H
+495A 30E3 01776 rrf PLUSW1, W
+ 01777 ;; process waveform
+495C EC4F F025 01778 call TIA_SW_ENV_Hlp_Waveform
+ 01779 ;; store 16bit result in RVALUE registers
+4960 0E09 01780 movlw TIA_ENVx_RVALUE_L
+4962 CFF3 FFE3 01781 movff PRODL, PLUSW1
+4966 0E0A 01782 movlw TIA_ENVx_RVALUE_H
+4968 CFF4 FFE3 01783 movff PRODH, PLUSW1
+496C 01784 TIA_SW_ENV_End
+496C 0012 01785 return
+ 01786
+ 01787
+ 01788 ;; --------------------------------------------------------------------------
+ 01789 ;; Help Function: add modulation values depending on enabled sources
+ 01790 ;; In: Enabled LFOs and ENCs in WREG, 7-bit offset in IRQ_TMP4
+ 01791 ;; Out: signed 16bit result value in IRQ_TMP[12]
+ 01792 ;; --------------------------------------------------------------------------
+496E 01793 TIA_SW_Hlp_GetMOD
+496E 6A0B 01794 clrf IRQ_TMP1
+4970 6A0C 01795 clrf IRQ_TMP2
+4972 6A0D 01796 clrf IRQ_TMP3
+4974 6E0E 01797 movwf IRQ_TMP4 ; save assigned LFOs and ENVs in IRQ_TMP4
+ 01798
+ 01799 ;; add all enabled LFO values (16 bit -> 24 bit)
+ 01800 BRA_IFCLR IRQ_TMP4, ASSIGNED_LFOS_1, ACCESS, TIA_SW_Hlp_GetMOD_NoLFO1
+4976 A00E M btfss reg, bit, reg_a
+4978 D00A M bra label
+497A 01801 TIA_SW_Hlp_GetMOD_LFO1
+497A 51A5 01802 movf TIA_LFO1_BASE + TIA_LFOx_RVALUE_L, W, BANKED
+497C 260B 01803 addwf IRQ_TMP1, F
+497E 51A6 01804 movf TIA_LFO1_BASE + TIA_LFOx_RVALUE_H, W, BANKED
+4980 220C 01805 addwfc IRQ_TMP2, F
+4982 0E00 01806 movlw 0x00
+4984 BFA6 01807 btfsc TIA_LFO1_BASE + TIA_LFOx_RVALUE_H, 7, BANKED
+4986 0EFF 01808 movlw 0xff
+4988 B0D8 01809 skpnc
+498A 0F01 01810 addlw 1
+498C 260D 01811 addwf IRQ_TMP3, F
+498E 01812 TIA_SW_Hlp_GetMOD_NoLFO1
+ 01813
+ 01814 BRA_IFCLR IRQ_TMP4, ASSIGNED_LFOS_2, ACCESS, TIA_SW_Hlp_GetMOD_NoLFO2
+498E A20E M btfss reg, bit, reg_a
+4990 D00A M bra label
+4992 01815 TIA_SW_Hlp_GetMOD_LFO2
+4992 51AC 01816 movf TIA_LFO2_BASE + TIA_LFOx_RVALUE_L, W, BANKED
+4994 260B 01817 addwf IRQ_TMP1, F
+4996 51AD 01818 movf TIA_LFO2_BASE + TIA_LFOx_RVALUE_H, W, BANKED
+4998 220C 01819 addwfc IRQ_TMP2, F
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 132
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+499A 0E00 01820 movlw 0x00
+499C BFAD 01821 btfsc TIA_LFO2_BASE + TIA_LFOx_RVALUE_H, 7, BANKED
+499E 0EFF 01822 movlw 0xff
+49A0 B0D8 01823 skpnc
+49A2 0F01 01824 addlw 1
+49A4 260D 01825 addwf IRQ_TMP3, F
+49A6 01826 TIA_SW_Hlp_GetMOD_NoLFO2
+ 01827
+ 01828 BRA_IFCLR IRQ_TMP4, ASSIGNED_LFOS_3, ACCESS, TIA_SW_Hlp_GetMOD_NoLFO3
+49A6 A40E M btfss reg, bit, reg_a
+49A8 D00A M bra label
+49AA 01829 TIA_SW_Hlp_GetMOD_LFO3
+49AA 51B3 01830 movf TIA_LFO3_BASE + TIA_LFOx_RVALUE_L, W, BANKED
+49AC 260B 01831 addwf IRQ_TMP1, F
+49AE 51B4 01832 movf TIA_LFO3_BASE + TIA_LFOx_RVALUE_H, W, BANKED
+49B0 220C 01833 addwfc IRQ_TMP2, F
+49B2 0E00 01834 movlw 0x00
+49B4 BFB4 01835 btfsc TIA_LFO3_BASE + TIA_LFOx_RVALUE_H, 7, BANKED
+49B6 0EFF 01836 movlw 0xff
+49B8 B0D8 01837 skpnc
+49BA 0F01 01838 addlw 1
+49BC 260D 01839 addwf IRQ_TMP3, F
+49BE 01840 TIA_SW_Hlp_GetMOD_NoLFO3
+ 01841
+ 01842 BRA_IFCLR IRQ_TMP4, ASSIGNED_LFOS_4, ACCESS, TIA_SW_Hlp_GetMOD_NoLFO4
+49BE A60E M btfss reg, bit, reg_a
+49C0 D00A M bra label
+49C2 01843 TIA_SW_Hlp_GetMOD_LFO4
+49C2 51BA 01844 movf TIA_LFO4_BASE + TIA_LFOx_RVALUE_L, W, BANKED
+49C4 260B 01845 addwf IRQ_TMP1, F
+49C6 51BB 01846 movf TIA_LFO4_BASE + TIA_LFOx_RVALUE_H, W, BANKED
+49C8 220C 01847 addwfc IRQ_TMP2, F
+49CA 0E00 01848 movlw 0x00
+49CC BFBB 01849 btfsc TIA_LFO4_BASE + TIA_LFOx_RVALUE_H, 7, BANKED
+49CE 0EFF 01850 movlw 0xff
+49D0 B0D8 01851 skpnc
+49D2 0F01 01852 addlw 1
+49D4 260D 01853 addwf IRQ_TMP3, F
+49D6 01854 TIA_SW_Hlp_GetMOD_NoLFO4
+ 01855
+ 01856 BRA_IFCLR IRQ_TMP4, ASSIGNED_ENVS_1, ACCESS, TIA_SW_Hlp_GetMOD_NoENV1
+49D6 A80E M btfss reg, bit, reg_a
+49D8 D00A M bra label
+49DA 01857 TIA_SW_Hlp_GetMOD_ENV1
+49DA 51DB 01858 movf TIA_ENV1_BASE + TIA_ENVx_RVALUE_L, W, BANKED
+49DC 260B 01859 addwf IRQ_TMP1, F
+49DE 51DC 01860 movf TIA_ENV1_BASE + TIA_ENVx_RVALUE_H, W, BANKED
+49E0 220C 01861 addwfc IRQ_TMP2, F
+49E2 0E00 01862 movlw 0x00
+49E4 BFDC 01863 btfsc TIA_ENV1_BASE + TIA_ENVx_RVALUE_H, 7, BANKED
+49E6 0EFF 01864 movlw 0xff
+49E8 B0D8 01865 skpnc
+49EA 0F01 01866 addlw 1
+49EC 260D 01867 addwf IRQ_TMP3, F
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 133
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+49EE 01868 TIA_SW_Hlp_GetMOD_NoENV1
+ 01869
+ 01870 BRA_IFCLR IRQ_TMP4, ASSIGNED_ENVS_2, ACCESS, TIA_SW_Hlp_GetMOD_NoENV2
+49EE AA0E M btfss reg, bit, reg_a
+49F0 D00A M bra label
+49F2 01871 TIA_SW_Hlp_GetMOD_ENV2
+49F2 51E6 01872 movf TIA_ENV2_BASE + TIA_ENVx_RVALUE_L, W, BANKED
+49F4 260B 01873 addwf IRQ_TMP1, F
+49F6 51E7 01874 movf TIA_ENV2_BASE + TIA_ENVx_RVALUE_H, W, BANKED
+49F8 220C 01875 addwfc IRQ_TMP2, F
+49FA 0E00 01876 movlw 0x00
+49FC BFE7 01877 btfsc TIA_ENV2_BASE + TIA_ENVx_RVALUE_H, 7, BANKED
+49FE 0EFF 01878 movlw 0xff
+4A00 B0D8 01879 skpnc
+4A02 0F01 01880 addlw 1
+4A04 260D 01881 addwf IRQ_TMP3, F
+4A06 01882 TIA_SW_Hlp_GetMOD_NoENV2
+ 01883
+ 01884 BRA_IFCLR IRQ_TMP4, ASSIGNED_ENVS_A0, ACCESS, TIA_SW_Hlp_GetMOD_NoENVAUD0
+4A06 AC0E M btfss reg, bit, reg_a
+4A08 D00A M bra label
+4A0A 01885 TIA_SW_Hlp_GetMOD_ENVAUD0
+4A0A 51C5 01886 movf TIA_V1_ENV_BASE + TIA_ENVx_RVALUE_L, W, BANKED
+4A0C 260B 01887 addwf IRQ_TMP1, F
+4A0E 51C6 01888 movf TIA_V1_ENV_BASE + TIA_ENVx_RVALUE_H, W, BANKED
+4A10 220C 01889 addwfc IRQ_TMP2, F
+4A12 0E00 01890 movlw 0x00
+4A14 BFC6 01891 btfsc TIA_V1_ENV_BASE + TIA_ENVx_RVALUE_H, 7, BANKED
+4A16 0EFF 01892 movlw 0xff
+4A18 B0D8 01893 skpnc
+4A1A 0F01 01894 addlw 1
+4A1C 260D 01895 addwf IRQ_TMP3, F
+4A1E 01896 TIA_SW_Hlp_GetMOD_NoENVAUD0
+ 01897
+ 01898 BRA_IFCLR IRQ_TMP4, ASSIGNED_ENVS_A1, ACCESS, TIA_SW_Hlp_GetMOD_NoENVAUD1
+4A1E AE0E M btfss reg, bit, reg_a
+4A20 D00A M bra label
+4A22 01899 TIA_SW_Hlp_GetMOD_ENVAUD1
+4A22 51D0 01900 movf TIA_V2_ENV_BASE + TIA_ENVx_RVALUE_L, W, BANKED
+4A24 260B 01901 addwf IRQ_TMP1, F
+4A26 51D1 01902 movf TIA_V2_ENV_BASE + TIA_ENVx_RVALUE_H, W, BANKED
+4A28 220C 01903 addwfc IRQ_TMP2, F
+4A2A 0E00 01904 movlw 0x00
+4A2C BFD1 01905 btfsc TIA_V2_ENV_BASE + TIA_ENVx_RVALUE_H, 7, BANKED
+4A2E 0EFF 01906 movlw 0xff
+4A30 B0D8 01907 skpnc
+4A32 0F01 01908 addlw 1
+4A34 260D 01909 addwf IRQ_TMP3, F
+4A36 01910 TIA_SW_Hlp_GetMOD_NoENVAUD1
+ 01911
+ 01912 ;; saturate to absolute 16 bit-value, keep sign in IRQ_TMP3[0]
+ 01913 BRA_IFSET IRQ_TMP3, 7, ACCESS, TIA_SW_Hlp_GetMOD_Negative
+4A36 BE0D M btfsc reg, bit, reg_a
+4A38 D006 M bra label
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 134
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4A3A 01914 TIA_SW_Hlp_GetMOD_Positive
+4A3A 500D 01915 movf IRQ_TMP3, W
+4A3C E00D 01916 bz TIA_SW_Hlp_GetMOD_Cont
+4A3E 680B 01917 setf IRQ_TMP1
+4A40 680C 01918 setf IRQ_TMP2
+4A42 6A0D 01919 clrf IRQ_TMP3 ; save sign in IRQ_TMP3
+ 01920 rgoto TIA_SW_Hlp_GetMOD_Cont
+4A44 D009 M bra label
+ 01921
+4A46 01922 TIA_SW_Hlp_GetMOD_Negative
+4A46 500D 01923 movf IRQ_TMP3, W
+4A48 0B7F 01924 andlw 0x7f
+4A4A E102 01925 bnz TIA_SW_Hlp_GetMOD_Negative_C
+4A4C 6A0B 01926 clrf IRQ_TMP1
+4A4E 6A0C 01927 clrf IRQ_TMP2
+4A50 01928 TIA_SW_Hlp_GetMOD_Negative_C
+4A50 1E0B 01929 comf IRQ_TMP1, F ; invert result
+4A52 1E0C 01930 comf IRQ_TMP2, F
+4A54 0E01 01931 movlw 0x01 ; save sign in IRQ_TMP3
+4A56 6E0D 01932 movwf IRQ_TMP3
+4A58 01933 TIA_SW_Hlp_GetMOD_Cont
+ 01934
+4A58 0012 01935 return
+ 01936
+ 01937 ;; --------------------------------------------------------------------------
+ 01938 ;; Help Function to add a 7-bit offset to IRQ_TMP[123] and saturate
+ 01939 ;; In: offset in WREG, absolute 16-bit value in IRQ_TMP[12], sign in IRQ_TMP3[0]
+ 01940 ;; Out: New value in IRQ_TMP[12]
+ 01941 ;; --------------------------------------------------------------------------
+4A5A 01942 TIA_SW_Hlp_AddOffset
+4A5A 90D8 01943 clrc
+4A5C 34E8 01944 rlf WREG, W
+4A5E 6EF4 01945 movwf PRODH
+4A60 6AF3 01946 clrf PRODL
+ 01947 ;; rgoto TIA_SW_Hlp_AddOffset16
+ 01948
+ 01949 ;; --------------------------------------------------------------------------
+ 01950 ;; Help Function to add a 16-bit offset to IRQ_TMP[123] and saturate
+ 01951 ;; In: offset in PROD[LH], absolute 16-bit value in IRQ_TMP[12], sign in IRQ_TMP3[0]
+ 01952 ;; Out: New value in IRQ_TMP[12]
+ 01953 ;; --------------------------------------------------------------------------
+4A62 01954 TIA_SW_Hlp_AddOffset16
+ 01955 ;; add offset and saturate
+ 01956 BRA_IFSET IRQ_TMP3, 0, ACCESS, TIA_SW_Hlp_AddOffset16_Negative
+4A62 B00D M btfsc reg, bit, reg_a
+4A64 D008 M bra label
+4A66 01957 TIA_SW_Hlp_AddOffset16_Positive
+4A66 50F3 01958 movf PRODL, W ; add offset
+4A68 260B 01959 addwf IRQ_TMP1, F
+4A6A 50F4 01960 movf PRODH, W
+4A6C 220C 01961 addwfc IRQ_TMP2, F
+4A6E E30C 01962 bnc TIA_SW_Hlp_AddOffset16_End
+4A70 680B 01963 setf IRQ_TMP1 ; saturate
+4A72 680C 01964 setf IRQ_TMP2
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 135
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 01965 rgoto TIA_SW_Hlp_AddOffset16_End
+4A74 D009 M bra label
+4A76 01966 TIA_SW_Hlp_AddOffset16_Negative
+4A76 500B 01967 movf IRQ_TMP1, W ; subtract offset
+4A78 5CF3 01968 subwf PRODL, W
+4A7A 6E0B 01969 movwf IRQ_TMP1
+4A7C 500C 01970 movf IRQ_TMP2, W
+4A7E 58F4 01971 subwfb PRODH, W
+4A80 6E0C 01972 movwf IRQ_TMP2
+4A82 E202 01973 bc TIA_SW_Hlp_AddOffset16_End
+4A84 6A0B 01974 clrf IRQ_TMP1
+4A86 6A0C 01975 clrf IRQ_TMP2
+4A88 01976 TIA_SW_Hlp_AddOffset16_End
+ 01977
+4A88 0012 01978 return
+ 01979
+ 01980 ;; --------------------------------------------------------------------------
+ 01981 ;; Help Function: Get absolute value
+ 01982 ;; IN: signed 16-bit value in IRQ_TMP[12]
+ 01983 ;; Out: unsigned absolute value in IRQ_TMP[12]
+ 01984 ;; sign in IRQ_TMP3[0]
+ 01985 ;; --------------------------------------------------------------------------
+4A8A 01986 TIA_SW_Hlp_GetAbs16
+ 01987 ;; convert IRQ_TMP[12] to unsigned integer, keep sign in IRQ_TMP3[0]
+4A8A 6A0D 01988 clrf IRQ_TMP3
+ 01989 BRA_IFCLR IRQ_TMP2, 7, ACCESS, TIA_SW_Hlp_GetABS16_Pos
+4A8C AE0C M btfss reg, bit, reg_a
+4A8E D006 M bra label
+4A90 01990 TIA_SW_Hlp_GetABS16_Neg
+4A90 800D 01991 bsf IRQ_TMP3, 0 ; memorize sign in IRQ_TMP3[0]
+4A92 1E0B 01992 comf IRQ_TMP1, F
+4A94 1E0C 01993 comf IRQ_TMP2, F
+4A96 2A0B 01994 incf IRQ_TMP1, F
+4A98 B4D8 01995 skpnz
+4A9A 2A0C 01996 incf IRQ_TMP2, F
+4A9C 01997 TIA_SW_Hlp_GetABS16_Pos
+4A9C 0012 01998 return
+ 01999
+ 02000
+ 02001 ;; --------------------------------------------------------------------------
+ 02002 ;; Help Function for ENV Waveforms (resuses the LFO Waveform routine)
+ 02003 ;; In: ENV_x_VALUE in WREG
+ 02004 ;; ENV_x_DEPTH in IRQ_TMP2,
+ 02005 ;; Accent flag in IRQ_TMP4.3
+ 02006 ;; Out: Result in PROD[LH]
+ 02007 ;; --------------------------------------------------------------------------
+4A9E 02008 TIA_SW_ENV_Hlp_Waveform
+ 02009
+ 02010 ; BRA_IFCLR TIA_SE_OPTION, SE_OPTION_TB303, BANKED, TIA_SW_ENV_Hlp_Waveform_NotTB303
+ 02011 ;TIA_SW_ENV_Hlp_Waveform_TB303
+ 02012 ; movwf IRQ_TMP1
+ 02013 ; ;; in TB303 mode the depth parameter is used as "env mod" which is always positive
+ 02014 ; ;; modify depth depending on ACCENT flag
+ 02015 ; rrf IRQ_TMP2, W
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 136
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 02016 ; andlw 0x3f
+ 02017 ; movwf IRQ_TMP2
+ 02018 ; BRA_IFCLR IRQ_TMP4, 3, ACCESS, TIA_SW_ENV_Hlp_Waveform_NoAcc
+ 02019 ;TIA_SW_ENV_Hlp_Waveform_Acc
+ 02020 ;; addlw 0x10
+ 02021 ; movwf IRQ_TMP2
+ 02022 ;TIA_SW_ENV_Hlp_Waveform_NoAcc
+ 02023 ; movf IRQ_TMP1, W
+ 02024 ; andlw 0x7f
+ 02025 ; mulwf IRQ_TMP2, ACCESS
+ 02026 ; return
+ 02027
+ 02028 ;TIA_SW_ENV_Hlp_Waveform_NotTB303
+ 02029 ;; set mode to 0x10, don't overwrite WREG
+4A9E 6A0B 02030 clrf IRQ_TMP1
+4AA0 880B 02031 bsf IRQ_TMP1, 4 ; (triangle waveform)
+ 02032
+ 02033 ;; convert linear envelope value
+4AA2 0B7F 02034 andlw 0x7f
+4AA4 BC0C 02035 btfsc IRQ_TMP2, 6; shift positive values to > 0x0000
+4AA6 0F80 02036 addlw 0x80
+4AA8 AC0C 02037 btfss IRQ_TMP2, 6; inversion if depth < 0x40
+4AAA 0A7F 02038 xorlw 0x7f
+ 02039 rgoto TIA_SW_ENV_Hlp_Waveform_Cont
+4AAC D002 M bra label
+ 02040
+ 02041 ;; --------------------------------------------------------------------------
+ 02042 ;; Help Function for LFO and ENV Waveforms
+ 02043 ;; In: LFO_x_VALUE in WREG
+ 02044 ;; LFO_x_MODE in IRQ_TMP1
+ 02045 ;; LFO_x_DEPTH in IRQ_TMP2,
+ 02046 ;; LFO/ENV number in TIA_SW_LFO_NUMBER
+ 02047 ;; pointer to LFOx_BASE in FSR1
+ 02048 ;; Out: Result in PROD[LH]
+ 02049 ;; Scaled Value in IRQ_TMP1
+ 02050 ;; --------------------------------------------------------------------------
+4AAE 02051 TIA_SW_LFO_Hlp_Waveform
+ 02052 ;; invert if negative depth (<0x40)
+4AAE AC0C 02053 btfss IRQ_TMP2, 6
+4AB0 0AFF 02054 xorlw 0xff
+ 02055
+ 02056 ;; envelope waveform routine continues here
+4AB2 02057 TIA_SW_ENV_Hlp_Waveform_Cont
+4AB2 6E0D 02058 movwf IRQ_TMP3
+ 02059
+ 02060 ;; get absolute value of depth from TIA_DEPTH_TABLE
+ 02061 ;; (to keep it compatible with MIDIbox TIA V1.5)
+4AB4 500C 02062 movf IRQ_TMP2, W
+4AB6 D8C3 02063 rcall TIA_SW_Hlp_Abs7
+4AB8 0F3E 02064 addlw TIA_DEPTH_TABLE & 0xff
+4ABA 6EF6 02065 movwf TBLPTRL
+4ABC 6AF7 02066 clrf TBLPTRH
+4ABE 0E32 02067 movlw TIA_DEPTH_TABLE >> 8
+4AC0 22F7 02068 addwfc TBLPTRH, F
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 137
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4AC2 0009 02069 tblrd*+
+4AC4 50F5 02070 movf TABLAT, W
+4AC6 6E0C 02071 movwf IRQ_TMP2
+ 02072
+ 02073 ;; branch depending on selected waveform
+4AC8 380B 02074 swapf IRQ_TMP1, W
+4ACA 0B07 02075 andlw 0x07
+ 02076 JUMPTABLE_2BYTES_UNSECURE
+4ACC ECC8 F016 M call MIOS_HLP_GetIndex_2bytes
+ 02077 rgoto TIA_SW_LFO_Hlp_WFBranch_0
+4AD0 D007 M bra label
+ 02078 rgoto TIA_SW_LFO_Hlp_WFBranch_1
+4AD2 D00A M bra label
+ 02079 rgoto TIA_SW_LFO_Hlp_WFBranch_2
+4AD4 D00D M bra label
+ 02080 rgoto TIA_SW_LFO_Hlp_WFBranch_3
+4AD6 D011 M bra label
+ 02081 rgoto TIA_SW_LFO_Hlp_WFBranch_4
+4AD8 D014 M bra label
+ 02082 rgoto TIA_SW_LFO_Hlp_WFBranch_5
+4ADA D02A M bra label
+ 02083 rgoto TIA_SW_LFO_Hlp_WFBranch_6
+4ADC D001 M bra label
+ 02084 rgoto TIA_SW_LFO_Hlp_WFBranch_7
+4ADE D000 M bra label
+ 02085
+4AE0 02086 TIA_SW_LFO_Hlp_WFBranch_0 ; Sine
+4AE0 02087 TIA_SW_LFO_Hlp_WFBranch_6 ; (reserved)
+4AE0 02088 TIA_SW_LFO_Hlp_WFBranch_7 ; (reserved)
+4AE0 500D 02089 movf IRQ_TMP3, W
+4AE2 ECD0 F018 02090 call TIA_SIN_TABLE_Get
+ 02091 rgoto TIA_SW_LFO_Hlp_WFBranch_Cont
+4AE6 D025 M bra label
+ 02092
+4AE8 02093 TIA_SW_LFO_Hlp_WFBranch_1 ; Triangle
+ 02094 ;; Triangle: return unsigned value
+4AE8 500D 02095 movf IRQ_TMP3, W
+4AEA AE0D 02096 btfss IRQ_TMP3, 7
+4AEC 0A7F 02097 xorlw 0x7f
+ 02098 rgoto TIA_SW_LFO_Hlp_WFBranch_Cont
+4AEE D021 M bra label
+ 02099
+4AF0 02100 TIA_SW_LFO_Hlp_WFBranch_2 ; sawtooth
+ 02101 ;; Sawtooth: x/2, MODE_DECINC is the eight bit
+4AF0 300D 02102 rrf IRQ_TMP3, W
+4AF2 0B7F 02103 andlw 0x7f
+4AF4 BE0B 02104 btfsc IRQ_TMP1, LFOx_MODE_DECINC ; (IRQ_TMP1=LFO_x_MODE)
+4AF6 0980 02105 iorlw 0x80
+ 02106 rgoto TIA_SW_LFO_Hlp_WFBranch_Cont
+4AF8 D01C M bra label
+4AFA 02107 TIA_SW_LFO_Hlp_WFBranch_3 ; pulse
+ 02108 ;; Pulse: 0x00 when Dec, 0xff when Inc, take inversion bit also into account
+4AFA 0E00 02109 movlw 0x00
+4AFC BE0B 02110 btfsc IRQ_TMP1, LFOx_MODE_DECINC; (IRQ_TMP1=LFO_x_MODE)
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 138
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4AFE 0EFF 02111 movlw 0xff
+ 02112 rgoto TIA_SW_LFO_Hlp_WFBranch_Cont
+4B00 D018 M bra label
+4B02 02113 TIA_SW_LFO_Hlp_WFBranch_4 ; random
+ 02114 ;; each second LFO is in S&H mode
+ 02115 BRA_IFCLR TIA_SW_LFO_NUMBER, 0, BANKED, TIA_SW_LFO_Hlp_WFBranch_4_Random
+4B02 A10F M btfss reg, bit, reg_a
+4B04 D00C M bra label
+4B06 02116 TIA_SW_LFO_Hlp_WFBranch_4_S_H
+4B06 500D 02117 movf IRQ_TMP3, W ; latch on period match
+4B08 0E05 02118 movlw TIA_LFOx_RVALUE_L
+4B0A B4D8 02119 skpnz
+4B0C 0EFE 02120 movlw TIA_LFOx_RVALUE_L - TIA_LFOx_RECORD_LEN
+4B0E CFE3 FFF3 02121 movff PLUSW1, PRODL
+ 02122
+4B12 0E06 02123 movlw TIA_LFOx_RVALUE_H
+4B14 B4D8 02124 skpnz
+4B16 0EFF 02125 movlw TIA_LFOx_RVALUE_H - TIA_LFOx_RECORD_LEN
+4B18 CFE3 FFF4 02126 movff PLUSW1, PRODH
+ 02127 rgoto TIA_SW_LFO_Hlp_Waveform_End
+4B1C D011 M bra label
+ 02128
+4B1E 02129 TIA_SW_LFO_Hlp_WFBranch_4_Random
+4B1E 511D 02130 movf TIA_LFO_RANDOM_SEED_H, W, BANKED
+4B20 0B55 02131 andlw 0x55
+4B22 6E0B 02132 movwf IRQ_TMP1
+4B24 511C 02133 movf TIA_LFO_RANDOM_SEED_L, W, BANKED
+4B26 0BAA 02134 andlw 0xaa
+4B28 100B 02135 iorwf IRQ_TMP1, W
+4B2A 24CE 02136 addwf TMR1L, W ; super-random ;-)
+4B2C 18CC 02137 xorwf TMR2, W
+ 02138 rgoto TIA_SW_LFO_Hlp_WFBranch_Cont
+4B2E D001 M bra label
+ 02139
+4B30 02140 TIA_SW_LFO_Hlp_WFBranch_5 ; (AIN)
+ 02141 #if ENABLE_AIN_LFO_WAVEFORM
+ 02142 movf TIA_SW_LFO_NUMBER, W, BANKED
+ 02143 movff FSR1L, IRQ_TMP1 ; save FSR1
+ 02144 movff FSR1H, IRQ_TMP3
+ 02145 call MIOS_AIN_PinGet ; get value of analog pin
+ 02146 movff IRQ_TMP1, FSR1L ; restore FSR1
+ 02147 movff IRQ_TMP3, FSR1H
+ 02148 SET_BSR TIA_BASE
+ 02149 rrf MIOS_PARAMETER2, F ; convert 10bit to 8bit
+ 02150 rrf MIOS_PARAMETER1, F
+ 02151 rrf MIOS_PARAMETER2, F
+ 02152 rrf MIOS_PARAMETER1, W
+ 02153
+ 02154 ;; biased at 0x80
+ 02155 BRA_IFSET WREG, 7, ACCESS, TIA_SW_LFO_Hlp_WFBranch_Cont
+ 02156 xorlw 0x7f
+ 02157 addlw 1
+ 02158 btfsc WREG, 7
+ 02159 movlw 0x7f
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 139
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 02160 #else
+4B30 0E80 02161 movlw 0x80
+ 02162 #endif
+ 02163 ;; rgoto TIA_SW_LFO_Hlp_WFBranch_Cont
+ 02164
+4B32 02165 TIA_SW_LFO_Hlp_WFBranch_Cont
+4B32 6E0B 02166 movwf IRQ_TMP1
+ 02167
+ 02168 ;; process scaling (depth * scaled value)
+4B34 0B7F 02169 andlw 0x7f ; remove sign from value
+4B36 020C 02170 mulwf IRQ_TMP2 ; multiply with depth (in IRQ_TMP2)
+ 02171 ;; result in PROD[LH]
+ 02172
+ 02173 ;; invert if DECINC flag not set
+ 02174 BRA_IFSET IRQ_TMP1, 7, ACCESS, TIA_SW_LFO_Hlp_Waveform_End
+4B38 BE0B M btfsc reg, bit, reg_a
+4B3A D002 M bra label
+4B3C 1EF3 02175 comf PRODL, F
+4B3E 1EF4 02176 comf PRODH, F
+4B40 02177 TIA_SW_LFO_Hlp_Waveform_End
+4B40 0012 02178 return
+ 02179
+ 02180
+ 02181 ;; --------------------------------------------------------------------------
+ 02182 ;; Help Function to sync all LFOs
+ 02183 ;; --------------------------------------------------------------------------
+4B42 02184 TIA_SW_Hlp_SyncAllLFOs
+4B42 EE21 F0A0 02185 lfsr FSR2, TIA_LFO1_BASE + TIA_LFOx_MODE
+4B46 0E04 02186 movlw 0x04
+4B48 6E0B 02187 movwf IRQ_TMP1
+4B4A 02188 TIA_SW_Hlp_SyncAllLFOs_Loop
+4B4A ECBA F025 02189 call TIA_SW_Hlp_SyncLFO_Now
+4B4E 2E0B 02190 decfsz IRQ_TMP1, F
+ 02191 rgoto TIA_SW_Hlp_SyncAllLFOs_Loop
+4B50 D7FC M bra label
+4B52 0012 02192 return
+ 02193
+ 02194 ;; --------------------------------------------------------------------------
+ 02195 ;; Help Function for gate bit, syncs the LFOs
+ 02196 ;; In: TIA_Vx_PITCH_MOD | TIA_Vx_VOLUME_MOD | assigned filter flags
+ 02197 ;; --------------------------------------------------------------------------
+4B54 02198 TIA_SW_Hlp_SyncLFOs
+4B54 EE21 F0A0 02199 lfsr FSR2, TIA_LFO1_BASE + TIA_LFOx_MODE
+4B58 6E0B 02200 movwf IRQ_TMP1
+4B5A D806 02201 rcall TIA_SW_Hlp_SyncSingleLFO
+4B5C 320B 02202 rrf IRQ_TMP1, F
+4B5E D804 02203 rcall TIA_SW_Hlp_SyncSingleLFO
+4B60 320B 02204 rrf IRQ_TMP1, F
+4B62 D802 02205 rcall TIA_SW_Hlp_SyncSingleLFO
+4B64 320B 02206 rrf IRQ_TMP1, F
+4B66 D800 02207 rcall TIA_SW_Hlp_SyncSingleLFO
+ 02208
+ 02209
+4B68 02210 TIA_SW_Hlp_SyncSingleLFO
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 140
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 02211 BRA_IFSET INDF2, LFOx_MODE_SYNC_ALL, ACCESS, TIA_SW_Hlp_SyncLFO_Now
+4B68 B4DF M btfsc reg, bit, reg_a
+4B6A D004 M bra label
+ 02212 BRA_IFCLR IRQ_TMP1, 0, ACCESS, TIA_SW_Hlp_SyncLFO_Skip
+4B6C A00B M btfss reg, bit, reg_a
+4B6E D00C M bra label
+ 02213 BRA_IFCLR INDF2, LFOx_MODE_SYNC, ACCESS, TIA_SW_Hlp_SyncLFO_Skip
+4B70 A2DF M btfss reg, bit, reg_a
+4B72 D00A M bra label
+4B74 02214 TIA_SW_Hlp_SyncLFO_Now
+4B74 9EDF 02215 bcf INDF2, LFOx_MODE_DECINC
+4B76 2AD9 02216 incf FSR2L, F ; switch to LFO_x_RATE
+4B78 2AD9 02217 incf FSR2L, F ; switch to LFO_x_CTR
+4B7A 6ADE 02218 clrf POSTINC2 ; clear counter,
+ 02219 ; switch to LFO_x_VALUE
+4B7C 0E80 02220 movlw 0x80 ; write 0x80 into value
+4B7E 6EDE 02221 movwf POSTINC2
+ 02222 ; switch to LFO_x_DEPTH
+4B80 2AD9 02223 incf FSR2L, F ; switch to LFO_x_RVALUE_L
+4B82 6ADE 02224 clrf POSTINC2 ; clear LFO_x_RAVLUE_L
+4B84 6ADE 02225 clrf POSTINC2 ; clear LFO_x_RAVLUE_H
+ 02226
+4B86 0012 02227 return
+ 02228
+4B88 02229 TIA_SW_Hlp_SyncLFO_Skip
+4B88 0E07 02230 movlw TIA_LFOx_RECORD_LEN ; switch to LFO_x+1_MODE
+4B8A 26D9 02231 addwf FSR2L, F
+4B8C 0012 02232 return
+ 02233
+ 02234 ;; --------------------------------------------------------------------------
+ 02235 ;; Help Function for gate bit, sets ENVs to attack mode
+ 02236 ;; In: TIA_Vx_ENVS | assigned filter flags
+ 02237 ;; --------------------------------------------------------------------------
+4B8E 02238 TIA_SW_Hlp_ENVAttack
+ 02239 ;; set envelope generators to attack mode if voice (or filter) has been assigned
+4B8E 6E0B 02240 movwf IRQ_TMP1
+ 02241
+ 02242 ;movf IRQ_TMP1, W
+4B90 0B11 02243 andlw 0x11
+4B92 E002 02244 bz TIA_SW_Hlp_ENVAttack_Not1
+4B94 0E01 02245 movlw (1 << ENVx_MODE_ATTACK)
+4B96 6FD2 02246 movwf TIA_ENV1_BASE + TIA_ENVx_MODE, BANKED
+4B98 02247 TIA_SW_Hlp_ENVAttack_Not1
+ 02248
+4B98 500B 02249 movf IRQ_TMP1, W
+4B9A 0B22 02250 andlw 0x22
+4B9C E002 02251 bz TIA_SW_Hlp_ENVAttack_Not2
+4B9E 0E01 02252 movlw (1 << ENVx_MODE_ATTACK)
+4BA0 6FDD 02253 movwf TIA_ENV2_BASE + TIA_ENVx_MODE, BANKED
+4BA2 02254 TIA_SW_Hlp_ENVAttack_Not2
+ 02255
+4BA2 500B 02256 movf IRQ_TMP1, W
+4BA4 0B0C 02257 andlw 0x0c
+4BA6 E002 02258 bz TIA_SW_Hlp_ENVAttack_Not3
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 141
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4BA8 0E01 02259 movlw (1 << ENVx_MODE_ATTACK)
+4BAA 6FBC 02260 movwf TIA_V1_ENV_BASE + TIA_ENVx_MODE, BANKED
+4BAC 02261 TIA_SW_Hlp_ENVAttack_Not3
+ 02262
+4BAC 500B 02263 movf IRQ_TMP1, W
+4BAE 0BC0 02264 andlw 0xc0
+4BB0 E002 02265 bz TIA_SW_Hlp_ENVAttack_Not4
+4BB2 0E01 02266 movlw (1 << ENVx_MODE_ATTACK)
+4BB4 6FC7 02267 movwf TIA_V2_ENV_BASE + TIA_ENVx_MODE, BANKED
+4BB6 02268 TIA_SW_Hlp_ENVAttack_Not4
+4BB6 0012 02269 return
+ 02270
+ 02271 ;; --------------------------------------------------------------------------
+ 02272 ;; Help Function for gate bit, sets ENVs to release mode
+ 02273 ;; In: TIA_Vx_ENVS | assigned filter flags
+ 02274 ;; --------------------------------------------------------------------------
+4BB8 02275 TIA_SW_Hlp_ENVRelease
+ 02276 ;; set envelope generators to release mode if voice (or filter) has been assigned
+4BB8 6E0B 02277 movwf IRQ_TMP1
+ 02278
+4BBA 0B11 02279 andlw 0x11
+4BBC E002 02280 bz TIA_SW_Hlp_ENVRelease_Not1
+4BBE 0E08 02281 movlw (1 << ENVx_MODE_RELEASE)
+4BC0 6FD2 02282 movwf TIA_ENV1_BASE + TIA_ENVx_MODE, BANKED
+4BC2 02283 TIA_SW_Hlp_ENVRelease_Not1
+ 02284
+4BC2 500B 02285 movf IRQ_TMP1, W
+4BC4 0B22 02286 andlw 0x22
+4BC6 E002 02287 bz TIA_SW_Hlp_ENVRelease_Not2
+4BC8 0E08 02288 movlw (1 << ENVx_MODE_RELEASE)
+4BCA 6FDD 02289 movwf TIA_ENV2_BASE + TIA_ENVx_MODE, BANKED
+4BCC 02290 TIA_SW_Hlp_ENVRelease_Not2
+ 02291
+4BCC 500B 02292 movf IRQ_TMP1, W
+4BCE 0B0C 02293 andlw 0x0c
+4BD0 E002 02294 bz TIA_SW_Hlp_ENVRelease_Not3
+4BD2 0E08 02295 movlw (1 << ENVx_MODE_RELEASE)
+4BD4 6FBC 02296 movwf TIA_V1_ENV_BASE + TIA_ENVx_MODE, BANKED
+4BD6 02297 TIA_SW_Hlp_ENVRelease_Not3
+ 02298
+4BD6 500B 02299 movf IRQ_TMP1, W
+4BD8 0BC0 02300 andlw 0xc0
+4BDA E002 02301 bz TIA_SW_Hlp_ENVRelease_Not4
+4BDC 0E08 02302 movlw (1 << ENVx_MODE_RELEASE)
+4BDE 6FC7 02303 movwf TIA_V2_ENV_BASE + TIA_ENVx_MODE, BANKED
+4BE0 02304 TIA_SW_Hlp_ENVRelease_Not4
+4BE0 0012 02305 return
+ 02306
+ 02307 ;; --------------------------------------------------------------------------
+ 02308 ;; Help Function for TIA_SW_Pitch
+ 02309 ;; IN: TIA_Vx_TARGET_FRQ_LH in FSR2
+ 02310 ;; OUT: new result in TIA_Vx_TARGET_FRQ_LH
+ 02311 ;; --------------------------------------------------------------------------
+4BE2 02312 TIA_SW_Hlp_AddMul
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 142
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 02313 BRA_IFCLR IRQ_TMP3, 0, ACCESS, TIA_SW_Hlp_AddMul_Pos
+4BE2 A00D M btfss reg, bit, reg_a
+4BE4 D00D M bra label
+4BE6 02314 TIA_SW_Hlp_AddMul_Neg
+ 02315 ;; calc MUL_A_[LH] = TIA_Vx_FRQ_[LH] - MIOS_PARAMETER[12]
+4BE6 5003 02316 movf MIOS_PARAMETER1, W
+4BE8 5CDE 02317 subwf POSTINC2, W ; TIA_Vx_TARGET_FRQ_LH+0, W, BANKED
+4BEA 6FF8 02318 movwf MUL_A_L, BANKED
+4BEC 5004 02319 movf MIOS_PARAMETER2, W
+4BEE 58DD 02320 subwfb POSTDEC2, W ; TIA_Vx_TARGET_FRQ_LH+1, W, BANKED
+4BF0 6FF9 02321 movwf MUL_A_H, BANKED
+ 02322
+ 02323 ;; calc MUL_R_[12] = MUL_A_[LH] * MUL_B_[LH]
+4BF2 ECED F01A 02324 call MATH_MUL16_16
+ 02325 ;; TIA_Vx_FRQ -= result
+4BF6 51FD 02326 movf MUL_R_1, W, BANKED
+4BF8 5EDE 02327 subwf POSTINC2, F ; TIA_Vx_TARGET_FRQ_LH+0, F, BANKED
+4BFA 51FE 02328 movf MUL_R_2, W, BANKED
+4BFC 5ADD 02329 subwfb POSTDEC2, F ; TIA_Vx_TARGET_FRQ_LH+1, F, BANKED
+4BFE 0012 02330 return
+ 02331
+4C00 02332 TIA_SW_Hlp_AddMul_Pos
+ 02333 ;; calc MUL_A_[LH] = MIOS_PARAMETER[12] - TIA_Vx_FRQ_[LH]
+4C00 50DE 02334 movf POSTINC2, W ; TIA_Vx_TARGET_FRQ_LH+0, W, BANKED
+4C02 5C03 02335 subwf MIOS_PARAMETER1, W
+4C04 6FF8 02336 movwf MUL_A_L, BANKED
+4C06 50DD 02337 movf POSTDEC2, W ; TIA_Vx_TARGET_FRQ_LH+1, W, BANKED
+4C08 5804 02338 subwfb MIOS_PARAMETER2, W
+4C0A 6FF9 02339 movwf MUL_A_H, BANKED
+ 02340
+ 02341 ;; calc MUL_R_[12] = MUL_A_[LH] * MUL_B_[LH]
+4C0C ECED F01A 02342 call MATH_MUL16_16
+ 02343 ;; TIA_Vx_FRQ += result
+4C10 51FD 02344 movf MUL_R_1, W, BANKED
+4C12 26DE 02345 addwf POSTINC2, F ; TIA_Vx_TARGET_FRQ_LH+0, F, BANKED
+4C14 51FE 02346 movf MUL_R_2, W, BANKED
+4C16 22DD 02347 addwfc POSTDEC2, F ; TIA_Vx_TARGET_FRQ_LH+1, F, BANKED
+4C18 0012 02348 return
+ 02349
+ 02350
+ 02351 ;; --------------------------------------------------------------------------
+ 02352 ;; Help Function for TIA_SW_Pitch
+ 02353 ;; IN: addend and IRQ_TMP[12], TIA_Vx_TARGET_FRQ_LH in FSR2
+ 02354 ;; OUT: new result in TIA_Vx_TARGET_FRQ_LH
+ 02355 ;; --------------------------------------------------------------------------
+4C1A 02356 TIA_SW_Hlp_Add16
+ 02357 ;; divide / 4 for a better scaling
+ 02358 ;clrc
+ 02359 ;rrf IRQ_TMP2, F
+ 02360 ;rrf IRQ_TMP1, F
+ 02361 ;clrc
+ 02362 ;rrf IRQ_TMP2, F
+ 02363 ;rrf IRQ_TMP1, F
+ 02364
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 143
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 02365 BRA_IFCLR IRQ_TMP3, 0, ACCESS, TIA_SW_Hlp_Add16_Pos
+4C1A A00D M btfss reg, bit, reg_a
+4C1C D008 M bra label
+4C1E 02366 TIA_SW_Hlp_Add16_Neg
+ 02367 ;; TIA_Vx_TARGET_FRQ -= MOD
+4C1E 500B 02368 movf IRQ_TMP1, W
+4C20 5EDE 02369 subwf POSTINC2, F ; TIA_Vx_TARGET_FRQ_LH+0, F, BANKED
+4C22 500C 02370 movf IRQ_TMP2, W
+4C24 5ADD 02371 subwfb POSTDEC2, F ; TIA_Vx_TARGET_FRQ_LH+1, F, BANKED
+ 02372 ;; saturate on overflow
+4C26 E202 02373 bc TIA_SW_Hlp_Add16_Neg_End
+4C28 6ADE 02374 clrf POSTINC2 ; TIA_Vx_TARGET_FRQ_LH+0, BANKED
+4C2A 6ADD 02375 clrf POSTDEC2 ; TIA_Vx_TARGET_FRQ_LH+1, BANKED
+4C2C 02376 TIA_SW_Hlp_Add16_Neg_End
+4C2C 0012 02377 return
+ 02378
+4C2E 02379 TIA_SW_Hlp_Add16_Pos
+ 02380 ;; TIA_Vx_TARGET_FRQ += MOD
+4C2E 500B 02381 movf IRQ_TMP1, W
+4C30 26DE 02382 addwf POSTINC2, F ; TIA_Vx_TARGET_FRQ_LH+0, F, BANKED
+4C32 500C 02383 movf IRQ_TMP2, W
+4C34 22DD 02384 addwfc POSTDEC2, F ; TIA_Vx_TARGET_FRQ_LH+1, F, BANKED
+ 02385 ;; saturate on overflow (set frequency to zero to avoid unwanted HF beeps)
+4C36 E302 02386 bnc TIA_SW_Hlp_Add16_Pos_End
+4C38 68DE 02387 setf POSTINC2 ; TIA_Vx_TARGET_FRQ_LH+0, BANKED
+4C3A 68DD 02388 setf POSTDEC2 ; TIA_Vx_TARGET_FRQ_LH+1, BANKED
+4C3C 02389 TIA_SW_Hlp_Add16_Pos_End
+4C3C 0012 02390 return
+ 02391
+ 02392
+ 02393 ;; --------------------------------------------------------------------------
+ 02394 ;; Help Function for TIA_SW_ENV, etc.
+ 02395 ;; IN: 7-bit signed value in WREG
+ 02396 ;; OUT: absolute value (0x00-0x3f) in WREG
+ 02397 ;; --------------------------------------------------------------------------
+4C3E 02398 TIA_SW_Hlp_Abs7
+4C3E 50E8 02399 movf WREG, W
+4C40 B4D8 02400 skpnz
+4C42 0F01 02401 addlw 1
+4C44 ACE8 02402 btfss WREG, 6
+4C46 0840 02403 sublw 0x40
+4C48 0B3F 02404 andlw 0x3f
+4C4A 0012 02405 return
+ 02406
+ 02407 ;; --------------------------------------------------------------------------
+ 02408 ;; Help Function for TIA_SW_ENV
+ 02409 ;; IN: ENV_x_CTR_H in IRQ_TMP1
+ 02410 ;; ENV_x_CURVE in IRQ_TMP2
+ 02411 ;; ENV_x_ATTACK/ENV_x_DECAY or ENV_x_SUSTAIN in IRQ_TMP3
+ 02412 ;; WREG != 0: use curve, WREG == 0: don't use curve parameter
+ 02413 ;; OUT: value which should be added to - or subtracted from - ENV_x_CTR_[LH]
+ 02414 ;; low-byte in WREG and MIOS_PARAMETER1; high-byte in MIOS_PARAMETER2
+ 02415 ;; --------------------------------------------------------------------------
+4C4C 02416 TIA_SW_ENV_GetBendedValue
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 144
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4C4C E103 02417 bnz TIA_SW_ENV_GetBendedValue_Curve
+ 02418
+ 02419 ;; curve not selected, get value from ENV_TABLE
+4C4E 500D 02420 movf IRQ_TMP3, W
+4C50 EF5A F030 02421 goto TIA_ENV_TABLE_Get
+ 02422
+4C54 02423 TIA_SW_ENV_GetBendedValue_Curve
+ 02424 ;; return ENV_x_DECAY when ENV_x_CURVE == 0x40
+4C54 0E40 02425 movlw 0x40
+4C56 620C 02426 cpfseq IRQ_TMP2, ACCESS
+ 02427 rgoto TIA_SW_ENV_GetBendedValue_UD
+4C58 D002 M bra label
+4C5A 1C0D 02428 comf IRQ_TMP3, W
+ 02429 rgoto TIA_SW_ENV_GetBendedValue_Cont
+4C5C D011 M bra label
+ 02430
+4C5E 02431 TIA_SW_ENV_GetBendedValue_UD
+ 02432 ;; feedback: calculate ABS7(CURVE) * ENV_x_CTR_H
+4C5E 500C 02433 movf IRQ_TMP2, W ; get absolute value of curve parameter
+4C60 DFEE 02434 rcall TIA_SW_Hlp_Abs7
+4C62 020B 02435 mulwf IRQ_TMP1, ACCESS ; multiply with current counter value
+ 02436
+ 02437 ;; when CURVE parameter < 0x40: bend down, else up
+ 02438 BRA_IFCLR IRQ_TMP2, 6, ACCESS, TIA_SW_ENV_GetBendedValue_Down
+4C64 AC0C M btfss reg, bit, reg_a
+4C66 D007 M bra label
+4C68 02439 TIA_SW_ENV_GetBendedValue_Up
+4C68 1E0D 02440 comf IRQ_TMP3, F
+4C6A 9E0D 02441 bcf IRQ_TMP3, 7
+4C6C 50F4 02442 movf PRODH, W
+4C6E 5C0D 02443 subwf IRQ_TMP3, W
+4C70 BEE8 02444 btfsc WREG, 7
+4C72 0E00 02445 movlw 0x00
+ 02446 rgoto TIA_SW_ENV_GetBendedValue_Cont
+4C74 D005 M bra label
+ 02447
+4C76 02448 TIA_SW_ENV_GetBendedValue_Down
+4C76 1C0D 02449 comf IRQ_TMP3, W
+4C78 0B7F 02450 andlw 0x7f
+4C7A 24F4 02451 addwf PRODH, W
+4C7C BEE8 02452 btfsc WREG, 7
+4C7E 0E7F 02453 movlw 0x7f
+ 02454 ;; rgoto TIA_SW_ENV_GetBendedValue_Cont
+ 02455
+4C80 02456 TIA_SW_ENV_GetBendedValue_Cont
+4C80 0B7F 02457 andlw 0x7f
+4C82 EF41 F018 02458 goto TIA_FRQ_TABLE_Get
+ 02459
+ 02460
+ 00403 #include "tia_wt.inc"
+ 00001 ; $Id: tia_wt.inc 111 2008-02-22 00:41:21Z tk $
+ 00002 ;
+ 00003 ; MIDIbox TIA
+ 00004 ; Wavetable Sequencer
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 145
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00005 ;
+ 00006 ; MEMO - when MIDI sync is enabled, following WT clock rates are usefull:
+ 00007 ; 126: 8 steps = 1/4 note
+ 00008 ; 123: 8 steps = 1/2 note
+ 00009 ; 117: 8 steps = 1 note
+ 00010 ;
+ 00011 ; ==========================================================================
+ 00012 ;
+ 00013 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00014 ; Licensed for personal non-commercial use only.
+ 00015 ; All other rights reserved.
+ 00016 ;
+ 00017 ; ==========================================================================
+ 00018
+ 00019 ;; --------------------------------------------------------------------------
+ 00020 ;; TIA Wavetable Init
+ 00021 ;; --------------------------------------------------------------------------
+4C86 00022 TIA_WT_Init
+4C86 D8B4 00023 rcall TIA_WT_Hlp_VxFromP
+ 00024 ;;bcf PLUSW0, WT_STATE_INIT_REQ
+ 00025
+4C88 D8C0 00026 rcall TIA_WT_Hlp_BkPst_Prepare
+ 00027 ;; Px assignment
+4C8A 0E11 00028 movlw 17
+4C8C 6EA9 00029 movwf EEADR
+4C8E EC62 F01C 00030 call TIA_BANK_Read
+4C92 6E03 00031 movwf MIOS_PARAMETER1
+4C94 0E33 00032 movlw TIA_Vx_WT_ASSIGN_P1
+4C96 C003 FFEB 00033 movff MIOS_PARAMETER1, PLUSW0
+4C9A EC62 F01C 00034 call TIA_BANK_Read
+4C9E 6E03 00035 movwf MIOS_PARAMETER1
+4CA0 0E34 00036 movlw TIA_Vx_WT_ASSIGN_P2
+4CA2 C003 FFEB 00037 movff MIOS_PARAMETER1, PLUSW0
+4CA6 EC62 F01C 00038 call TIA_BANK_Read
+4CAA 6E03 00039 movwf MIOS_PARAMETER1
+4CAC 0E35 00040 movlw TIA_Vx_WT_ASSIGN_P3
+4CAE C003 FFEB 00041 movff MIOS_PARAMETER1, PLUSW0
+ 00042 ;; ADSR
+4CB2 EC62 F01C 00043 call TIA_BANK_Read
+4CB6 6E03 00044 movwf MIOS_PARAMETER1
+4CB8 0E37 00045 movlw TIA_Vx_WT_ATTACK
+4CBA C003 FFEB 00046 movff MIOS_PARAMETER1, PLUSW0
+4CBE EC62 F01C 00047 call TIA_BANK_Read
+4CC2 6E03 00048 movwf MIOS_PARAMETER1
+4CC4 0E38 00049 movlw TIA_Vx_WT_DECAY
+4CC6 C003 FFEB 00050 movff MIOS_PARAMETER1, PLUSW0
+4CCA EC62 F01C 00051 call TIA_BANK_Read
+4CCE 6E03 00052 movwf MIOS_PARAMETER1
+4CD0 0E39 00053 movlw TIA_Vx_WT_SUSTAIN
+4CD2 C003 FFEB 00054 movff MIOS_PARAMETER1, PLUSW0
+4CD6 EC62 F01C 00055 call TIA_BANK_Read
+4CDA 6E03 00056 movwf MIOS_PARAMETER1
+4CDC 0E3A 00057 movlw TIA_Vx_WT_RELEASE
+4CDE C003 FFEB 00058 movff MIOS_PARAMETER1, PLUSW0
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 146
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00059
+4CE2 0012 00060 return
+ 00061
+ 00062 ;; --------------------------------------------------------------------------
+ 00063 ;; TIA Wavetable ADSR copy
+ 00064 ;; --------------------------------------------------------------------------
+ 00065
+4CE4 00066 TIA_WT_ADSR_Copy
+4CE4 D885 00067 rcall TIA_WT_Hlp_VxFromP
+ 00068 ;; WT ADSR to Vx ADSR
+4CE6 0E37 00069 movlw TIA_Vx_WT_ATTACK
+4CE8 CFEB FFE6 00070 movff PLUSW0, POSTINC1
+4CEC 0E38 00071 movlw TIA_Vx_WT_DECAY
+4CEE CFEB FFE6 00072 movff PLUSW0, POSTINC1
+4CF2 0E39 00073 movlw TIA_Vx_WT_SUSTAIN
+4CF4 CFEB FFE6 00074 movff PLUSW0, POSTINC1
+4CF8 0E3A 00075 movlw TIA_Vx_WT_RELEASE
+4CFA CFEB FFE6 00076 movff PLUSW0, POSTINC1
+4CFE 0012 00077 return
+ 00078
+ 00079 ;; --------------------------------------------------------------------------
+ 00080 ;; TIA Wavetable Handler
+ 00081 ;; --------------------------------------------------------------------------
+4D00 00082 TIA_WT_Handler
+ 00083 SET_BSR TIA_BASE ; init BSR
+4D00 0101 M movlb HIGH(reg)
+ 00084
+4D02 6A27 00085 clrf TIA_WT_VOICE ; loop counter
+4D04 EE01 F020 00086 lfsr FSR0, TIA_V1_BASE
+4D08 00087 TIA_WT_VoiceLoop
+ 00088 ;; exit handler if wavetable disabled
+4D08 0E2B 00089 movlw TIA_Vx_OPTION
+ 00090 BRA_IFCLR PLUSW0, Vx_OPTION_WT_ON, ACCESS, TIA_WT_VoiceLoop_Exit
+4D0A A0EB M btfss reg, bit, reg_a
+4D0C D06A M bra label
+ 00091 ;; exit handler if wavetable rate == 0
+4D0E 0E2F 00092 movlw TIA_Vx_WT_RATE
+4D10 50EB 00093 movf PLUSW0, W
+4D12 B4D8 00094 skpnz
+ 00095 rgoto TIA_WT_VoiceLoop_Next
+4D14 D066 M bra label
+ 00096
+ 00097 ;; reset requested?
+4D16 0E2E 00098 movlw TIA_Vx_WT_STATE
+ 00099 BRA_IFCLR PLUSW0, WT_STATE_RESET, ACCESS, TIA_WT_NoReset
+4D18 A2EB M btfss reg, bit, reg_a
+4D1A D022 M bra label
+4D1C 00100 TIA_WT_Reset
+ 00101 IRQ_DISABLE
+4D1C 9EF2 M bcf INTCON, GIE
+4D1E 92EB 00102 bcf PLUSW0, WT_STATE_RESET
+4D20 90EB 00103 bcf PLUSW0, WT_STATE_STOP
+4D22 9AEB 00104 bcf PLUSW0, WT_STATE_SLIDE
+4D24 9CEB 00105 bcf PLUSW0, WT_STATE_SLIDE_PREV
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 147
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4D26 6A36 00106 clrf TIA_Vx_WT_303_TICK_CTR
+ 00107
+ 00108 ;; clear counter & position and request first entry
+4D28 0E2B 00109 movlw TIA_Vx_OPTION
+ 00110 BRA_IFCLR PLUSW0, Vx_OPTION_WTSYNC_ON, ACCESS, TIA_WT_Handler_IntClk
+4D2A A2EB M btfss reg, bit, reg_a
+4D2C D00B M bra label
+4D2E 00111 TIA_WT_Handler_ExtClk
+4D2E 0E2F 00112 movlw TIA_Vx_WT_RATE
+4D30 1CEB 00113 comf PLUSW0, W
+4D32 0B7F 00114 andlw 0x7f
+4D34 6E09 00115 movwf TMP4
+4D36 0E2E 00116 movlw TIA_Vx_WT_STATE
+4D38 AAEB 00117 btfss PLUSW0, Vx_OPTION_TB303
+4D3A 2A09 00118 incf TMP4, F
+4D3C 0E31 00119 movlw TIA_Vx_WT_CTR
+4D3E C009 FFEB 00120 movff TMP4, PLUSW0
+ 00121 rgoto TIA_WT_Handler_ExtClk_C
+4D42 D008 M bra label
+4D44 00122 TIA_WT_Handler_IntClk
+4D44 0E2F 00123 movlw TIA_Vx_WT_RATE
+4D46 1CEB 00124 comf PLUSW0, W
+4D48 6E09 00125 movwf TMP4
+4D4A 0E31 00126 movlw TIA_Vx_WT_CTR
+4D4C C009 FFEB 00127 movff TMP4, PLUSW0
+4D50 90D8 00128 clrc
+4D52 36EB 00129 rlf PLUSW0, F
+4D54 00130 TIA_WT_Handler_ExtClk_C
+4D54 0E32 00131 movlw TIA_Vx_WT_POS
+4D56 6AEB 00132 clrf PLUSW0
+4D58 0E30 00133 movlw TIA_Vx_WT_CLK_REQ_CTR
+4D5A 6AEB 00134 clrf PLUSW0
+4D5C 2AEB 00135 incf PLUSW0, F
+ 00136 IRQ_ENABLE
+4D5E 8EF2 M bsf INTCON, GIE
+4D60 00137 TIA_WT_NoReset
+ 00138
+ 00139
+ 00140 ;; handle all requested clocks
+4D60 00141 TIA_WT_NextClkLoop
+4D60 0E30 00142 movlw TIA_Vx_WT_CLK_REQ_CTR
+4D62 50EB 00143 movf PLUSW0, W
+4D64 E03E 00144 bz TIA_WT_VoiceLoop_Next
+4D66 0E2E 00145 movlw TIA_Vx_WT_STATE
+ 00146 BRA_IFSET PLUSW0, WT_STATE_STOP, ACCESS, TIA_WT_VoiceLoop_Exit
+4D68 B0EB M btfsc reg, bit, reg_a
+4D6A D03B M bra label
+4D6C 0E30 00147 movlw TIA_Vx_WT_CLK_REQ_CTR
+4D6E 06EB 00148 decf PLUSW0, F
+ 00149
+ 00150 ;; get first entry
+4D70 D84C 00151 rcall TIA_WT_Hlp_BkPst_Prepare
+4D72 D85A 00152 rcall TIA_WT_Hlp_StepCmd_Get
+ 00153 ;; cmd in TMP4
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 148
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4D74 00154 TIA_WT_Loop
+ 00155 ;; branch depending on entry ID
+4D74 5009 00156 movf TMP4, W
+4D76 0B03 00157 andlw 0x03
+ 00158 JUMPTABLE_2BYTES_UNSECURE
+4D78 ECC8 F016 M call MIOS_HLP_GetIndex_2bytes
+ 00159 rgoto TIA_WT_Branch_Inc
+4D7C D02A M bra label
+ 00160 rgoto TIA_WT_Branch_Play
+4D7E D002 M bra label
+ 00161 rgoto TIA_WT_Branch_Goto
+4D80 D01C M bra label
+ 00162 rgoto TIA_WT_Branch_End
+4D82 D018 M bra label
+ 00163
+4D84 00164 TIA_WT_Branch_Play
+ 00165 ;; send MIDI clock if enabled for synchronization of external sequencers or similar
+ 00166 ;; Voice 1(Aud0) priority
+ 00167
+4D84 0EF8 00168 movlw 0xf8
+ 00169 CALL_IFSET TIA_MIDI_SYNC, TIA_MIDI_SYNC_SEND_CLK, BANKED, MIOS_MIDI_TxBufferPut
+4D86 B1F0 M btfsc reg, bit, reg_a
+4D88 EC24 F016 M call label
+ 00170 SET_BSR TIA_BASE
+4D8C 0101 M movlb HIGH(reg)
+ 00171
+ 00172 #if 0
+ 00173 BRA_IFCLR TIA_SE_OPTION, SE_OPTION_TB303, BANKED, TIA_WT_Branch_Play_NotTB303
+ 00174 TIA_WT_Branch_Play_TB303
+ 00175 ;; in TB303 mode:
+ 00176 ;; increment tick counter, reset if counter >= 6
+ 00177 incf TIA_WT_303_TICK_CTR, F, BANKED
+ 00178 movlw 0x6
+ 00179 cpfslt TIA_WT_303_TICK_CTR, BANKED
+ 00180 clrf TIA_WT_303_TICK_CTR, BANKED
+ 00181
+ 00182 ;; play note when counter-1 == 0
+ 00183 decf TIA_WT_303_TICK_CTR, W, BANKED
+ 00184 bz TIA_WT_Branch_Play_TB303Note
+ 00185 ;; release gate when counter-1 == 3
+ 00186 decf TIA_WT_303_TICK_CTR, W, BANKED
+ 00187 xorlw 3
+ 00188 bz TIA_WT_Branch_Play_TB303G0
+ 00189 rgoto TIA_WT_NextClkLoop
+ 00190
+ 00191 TIA_WT_Branch_Play_TB303G0
+ 00192 IRQ_DISABLE
+ 00193 ;; exception: don't clear when slide is active
+ 00194 BRA_IFCLR TIA_WT_STATE, WT_STATE_SLIDE, BANKED, TIA_WT_Branch_Play_TB303G0_Clr
+ 00195 TIA_WT_Branch_Play_TB303G0_Slide
+ 00196 bsf TIA_WT_STATE, WT_STATE_SLIDE_PREV, BANKED
+ 00197 rgoto TIA_WT_Branch_Play_TB303G0_End
+ 00198
+ 00199 TIA_WT_Branch_Play_TB303G0_Clr
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 149
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00200 bcf TIA_WT_STATE, WT_STATE_SLIDE_PREV, BANKED
+ 00201 bcf TIA_V1_BASE + TIA_Vx_MODE, TIA_Vx_MODE_GATE_SET_REQ, BANKED
+ 00202 bsf TIA_V1_BASE + TIA_Vx_MODE, TIA_Vx_MODE_GATE_CLR_REQ, BANKED
+ 00203 ;; rgoto TIA_WT_Branch_Play_TB303G0_End
+ 00204
+ 00205 TIA_WT_Branch_Play_TB303G0_End
+ 00206 IRQ_ENABLE
+ 00207 rgoto TIA_WT_NextClkLoop
+ 00208 TIA_WT_Branch_Play_TB303Note
+ 00209
+ 00210 #endif
+4D8E 00211 TIA_WT_Branch_Play_NotTB303
+ 00212
+ 00213 ;; disable interrupts until all tracks have been handled!
+ 00214 IRQ_DISABLE
+4D8E 9EF2 M bcf INTCON, GIE
+ 00215
+4D90 D83C 00216 rcall TIA_WT_Hlp_BkPst_Prepare
+4D92 D85B 00217 rcall TIA_WT_Hlp_StepP1_Get
+ 00218 ;; first parameter in TMP2
+ 00219
+ 00220 #if 0
+ 00221 BRA_IFCLR TIA_SE_OPTION, SE_OPTION_TB303, BANKED, TIA_WT_Branch_PlayP1_NotTB303
+ 00222 TIA_WT_Branch_PlayP1_TB303
+ 00223 ;; set gate flag
+ 00224 bcf TIA_WT_STATE, WT_STATE_GATE, BANKED
+ 00225 btfsc TMP2, 4
+ 00226 bsf TIA_WT_STATE, WT_STATE_GATE, BANKED
+ 00227
+ 00228 ;; slide flag
+ 00229 bcf TIA_WT_STATE, WT_STATE_SLIDE, BANKED
+ 00230 btfsc TMP2, 5
+ 00231 bsf TIA_WT_STATE, WT_STATE_SLIDE, BANKED
+ 00232
+ 00233 ;; set accent flag of voice 1 if velocity >= 8
+ 00234 bcf TIA_V1_BASE + TIA_Vx_MODE, TIA_Vx_MODE_ACCENT
+ 00235 btfsc TMP2, 3
+ 00236 bsf TIA_V1_BASE + TIA_Vx_MODE, TIA_Vx_MODE_ACCENT
+ 00237
+ 00238 ;; modify sustain if gate flag set and no active slide (which wouldn't retrigger the gate)
+ 00239 BRA_IFCLR TIA_WT_STATE, WT_STATE_GATE, BANKED, TIA_WT_Branch_Play_TB303NoteNSus
+ 00240 BRA_IFSET TIA_WT_STATE, WT_STATE_SLIDE_PREV, BANKED, TIA_WT_Branch_Play_TB303NoteNSus
+ 00241 BRA_IFSET TIA_SE_OPTION, SE_OPTION_GSA, BANKED, TIA_WT_Branch_Play_TB303NoteNSus
+ 00242 TIA_WT_Branch_Play_TB303NoteSus
+ 00243 ;; 0x08 + accent/2
+ 00244 rlf TMP2, W
+ 00245 rlf WREG, W
+ 00246 addlw 0x08
+ 00247 andlw 0x78
+ 00248
+ 00249 movwf TMP2
+ 00250 movlw 57 ; CC#57: Voice 1 Sustain
+ 00251 movwf TMP3
+ 00252 rcall TIA_WT_Hlp_Play_P_Cont
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 150
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00253 TIA_WT_Branch_Play_TB303NoteNSus
+ 00254 rgoto TIA_WT_Branch_PlayP1_TB303Cont
+ 00255 #endif
+ 00256
+ 00257
+4D94 00258 TIA_WT_Branch_PlayP1_NotTB303
+ 00259 ;;btfsc TMP4, 4
+ 00260 ;;bsf TMP2, 7
+4D94 0E33 00261 movlw TIA_Vx_WT_ASSIGN_P1
+4D96 50EB 00262 movf PLUSW0, W
+4D98 A4D8 00263 skpz
+4D9A D867 00264 rcall TIA_WT_Hlp_Play_P
+4D9C 00265 TIA_WT_Branch_PlayP1_TB303Cont
+ 00266
+ 00267 ;; second parameter
+ 00268 ;;bsf TIA_WT_STATE, WT_STATE_PLAY_2ND, BANKED ; will only be used in TB303 mode
+4D9C D85A 00269 rcall TIA_WT_Hlp_StepP2_Get
+ 00270 ;; second parameter in TMP2
+ 00271 ;;btfsc TMP4, 5
+ 00272 ;;bsf TMP2, 7
+ 00273 ;; in TB303 mode: always assigned to CC#9 (play note of voice 1)
+ 00274 ;;movlw 9
+ 00275 ;;BRA_IFSET TIA_SE_OPTION, SE_OPTION_TB303, BANKED, TIA_WT_Branch_PlayP2_TB303
+ 00276 ;; else play assigned parameter
+4D9E 0E34 00277 movlw TIA_Vx_WT_ASSIGN_P2
+4DA0 50EB 00278 movf PLUSW0, W
+4DA2 E001 00279 bz TIA_WT_Branch_PlayP2_Skip
+4DA4 00280 TIA_WT_Branch_PlayP2_TB303
+4DA4 D862 00281 rcall TIA_WT_Hlp_Play_P
+4DA6 00282 TIA_WT_Branch_PlayP2_Skip
+ 00283
+ 00284 ;; third parameter
+4DA6 D859 00285 rcall TIA_WT_Hlp_StepP3_Get
+ 00286 ;; third parameter in TMP2
+ 00287 ;;btfsc TMP4, 6
+ 00288 ;;bsf TMP2, 7
+4DA8 0E35 00289 movlw TIA_Vx_WT_ASSIGN_P3
+4DAA 50EB 00290 movf PLUSW0, W
+4DAC A4D8 00291 skpz
+4DAE D85D 00292 rcall TIA_WT_Hlp_Play_P
+ 00293 ;;bcf TIA_WT_STATE, WT_STATE_PLAY_2ND, BANKED
+ 00294
+ 00295 IRQ_ENABLE ; enable interrupts again
+4DB0 8EF2 M bsf INTCON, GIE
+ 00296
+4DB2 00297 TIA_WT_Branch_Play_End
+ 00298 rgoto TIA_WT_Branch_Inc
+4DB2 D00F M bra label
+ 00299
+ 00300 ;; ---
+4DB4 00301 TIA_WT_Branch_End
+4DB4 0E2E 00302 movlw TIA_Vx_WT_STATE
+4DB6 80EB 00303 bsf PLUSW0, WT_STATE_STOP
+ 00304 rgoto TIA_WT_NextClkLoop
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 151
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4DB8 D7D3 M bra label
+ 00305
+ 00306 ;; ---
+4DBA 00307 TIA_WT_Branch_Goto
+ 00308 ;;bcf TIA_WT_STATE, WT_STATE_SLIDE, BANKED
+ 00309 ;;bcf TIA_WT_STATE, WT_STATE_SLIDE_PREV, BANKED
+ 00310
+4DBA D847 00311 rcall TIA_WT_Hlp_StepP1_Get
+ 00312 ;; goto step in TMP2
+4DBC 0E1F 00313 movlw 0x1f
+4DBE 1607 00314 andwf TMP2, F
+4DC0 0E32 00315 movlw TIA_Vx_WT_POS
+4DC2 C007 FFEB 00316 movff TMP2, PLUSW0
+ 00317
+4DC6 D830 00318 rcall TIA_WT_Hlp_StepCmd_Get
+ 00319 ;; step command in TMP4
+4DC8 5009 00320 movf TMP4, W
+4DCA 0B03 00321 andlw 0x03
+4DCC 0A02 00322 xorlw 0x02
+4DCE E0F2 00323 bz TIA_WT_Branch_End
+ 00324 rgoto TIA_WT_Loop
+4DD0 D7D1 M bra label
+ 00325
+ 00326 ;; ---
+4DD2 00327 TIA_WT_Branch_Inc
+4DD2 0E32 00328 movlw TIA_Vx_WT_POS
+4DD4 28EB 00329 incf PLUSW0, W
+4DD6 0B1F 00330 andlw 0x1f
+4DD8 6E07 00331 movwf TMP2
+4DDA 0E32 00332 movlw TIA_Vx_WT_POS
+4DDC C007 FFEB 00333 movff TMP2, PLUSW0
+ 00334 rgoto TIA_WT_NextClkLoop
+4DE0 D7BF M bra label
+ 00335
+4DE2 00336 TIA_WT_VoiceLoop_Exit
+ 00337
+4DE2 00338 TIA_WT_VoiceLoop_Next
+4DE2 0E40 00339 movlw TIA_Vx_RECORD_LEN
+4DE4 26E9 00340 addwf FSR0L, F
+4DE6 2A27 00341 incf TIA_WT_VOICE, F
+4DE8 0E01 00342 movlw 2-1
+4DEA 6427 00343 cpfsgt TIA_WT_VOICE, ACCESS
+ 00344 rgoto TIA_WT_VoiceLoop
+4DEC D78D M bra label
+4DEE 0012 00345 return
+ 00346
+ 00347
+ 00348
+ 00349 ;; --------------------------------------------------------------------------
+ 00350 ;; get Voice number from parameter
+4DF0 00351 TIA_WT_Hlp_VxFromP
+4DF0 0E60 00352 movlw TIA_V2_BASE & 0xff
+4DF2 60E1 00353 cpfslt FSR1L, ACCESS
+4DF4 D005 00354 bra TIA_WT_Init_V2
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 152
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4DF6 00355 TIA_WT_Init_V1
+4DF6 EE01 F020 00356 lfsr FSR0, TIA_V1_BASE
+4DFA EE11 F0BF 00357 lfsr FSR1, TIA_V1_ENV_BASE + TIA_ENVx_ATTACK
+4DFE D004 00358 bra TIA_WT_Hlp_VxFromP_End
+4E00 00359 TIA_WT_Init_V2
+4E00 EE01 F060 00360 lfsr FSR0, TIA_V2_BASE
+4E04 EE11 F0CA 00361 lfsr FSR1, TIA_V2_ENV_BASE + TIA_ENVx_ATTACK
+4E08 00362 TIA_WT_Hlp_VxFromP_End
+4E08 0012 00363 return
+ 00364
+ 00365 ;; --------------------------------------------------------------------------
+ 00366 ;; prepare bank & preset
+4E0A 00367 TIA_WT_Hlp_BkPst_Prepare
+4E0A 0E2C 00368 movlw TIA_Vx_WBANK
+4E0C CFEB F011 00369 movff PLUSW0, TIA_BANK
+4E10 5011 00370 movf TIA_BANK, W
+4E12 0B06 00371 andlw 0x06
+4E14 44E8 00372 rlncf WREG, W
+4E16 B011 00373 btfsc TIA_BANK, 0
+4E18 28E8 00374 incf WREG, W
+4E1A 0F10 00375 addlw DEFAULT_BS_KBANK_ID*4
+4E1C 0F02 00376 addlw 0x02
+4E1E 6E11 00377 movwf TIA_BANK
+ 00378
+4E20 0E2D 00379 movlw TIA_Vx_WT
+4E22 CFEB F012 00380 movff PLUSW0, TIA_PRESET
+4E26 0012 00381 return
+ 00382
+ 00383 ;; --------------------------------------------------------------------------
+ 00384 ;; loads step command
+4E28 00385 TIA_WT_Hlp_StepCmd_Get
+ 00386 ;; register addr
+4E28 0E32 00387 movlw TIA_Vx_WT_POS
+4E2A 40EB 00388 rrncf PLUSW0, W
+4E2C 40E8 00389 rrncf WREG, W
+4E2E 0B07 00390 andlw 0x07
+4E30 0F18 00391 addlw 24
+4E32 6EA9 00392 movwf EEADR
+4E34 EC62 F01C 00393 call TIA_BANK_Read
+4E38 6E09 00394 movwf TMP4
+ 00395 ;; 2 bits cmd extraction
+4E3A 0E32 00396 movlw TIA_Vx_WT_POS
+4E3C B0EB 00397 btfsc PLUSW0, 0
+4E3E 4209 00398 rrncf TMP4, F
+4E40 B0EB 00399 btfsc PLUSW0, 0
+4E42 4209 00400 rrncf TMP4, F
+4E44 B2EB 00401 btfsc PLUSW0, 1
+4E46 3A09 00402 swapf TMP4, F
+4E48 0012 00403 return
+ 00404
+ 00405 ;; --------------------------------------------------------------------------
+ 00406 ;; loads parameter 1 value or goto step addr
+4E4A 00407 TIA_WT_Hlp_StepP1_Get
+ 00408 ;; register addr
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 153
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4E4A 0E32 00409 movlw TIA_Vx_WT_POS
+4E4C 50EB 00410 movf PLUSW0, W
+4E4E 0F20 00411 addlw 32
+ 00412 rgoto TIA_WT_Hlp_StepPx_Get_End
+4E50 D007 M bra label
+ 00413 ;; --------------------------------------------------------------------------
+ 00414 ;; loads parameter 2 value
+4E52 00415 TIA_WT_Hlp_StepP2_Get
+ 00416 ;; register addr
+4E52 0E32 00417 movlw TIA_Vx_WT_POS
+4E54 50EB 00418 movf PLUSW0, W
+4E56 0F40 00419 addlw 64
+ 00420 rgoto TIA_WT_Hlp_StepPx_Get_End
+4E58 D003 M bra label
+ 00421 ;; --------------------------------------------------------------------------
+ 00422 ;; loads parameter 3 value
+4E5A 00423 TIA_WT_Hlp_StepP3_Get
+ 00424 ;; register addr
+4E5A 0E32 00425 movlw TIA_Vx_WT_POS
+4E5C 50EB 00426 movf PLUSW0, W
+4E5E 0F60 00427 addlw 96
+ 00428 ;;rgoto TIA_WT_Hlp_StepPx_Get_End
+ 00429 ;; --------------------------------------------------------------------------
+4E60 00430 TIA_WT_Hlp_StepPx_Get_End
+4E60 6EA9 00431 movwf EEADR
+4E62 EC62 F01C 00432 call TIA_BANK_Read
+4E66 6E07 00433 movwf TMP2
+4E68 0012 00434 return
+ 00435
+ 00436 ;; --------------------------------------------------------------------------
+ 00437 ;; play a WT entry
+4E6A 00438 TIA_WT_Hlp_Play_P
+4E6A 6E08 00439 movwf TMP3 ; save CC number in TMP3
+ 00440
+ 00441 BRA_IFSET TMP2, 7, ACCESS, TIA_WT_Hlp_Play_P_Cont
+4E6C BE07 M btfsc reg, bit, reg_a
+4E6E D010 M bra label
+ 00442
+ 00443 ;; add/subtract with saturation
+4E70 EC39 F02F 00444 call TIA_CCOUT_Get
+ 00445
+ 00446 BRA_IFSET TMP2, 6, ACCESS, TIA_WT_Hlp_Play_P_Sub
+4E74 BC07 M btfsc reg, bit, reg_a
+4E76 D007 M bra label
+4E78 00447 TIA_WT_Hlp_Play_P_Add
+4E78 2607 00448 addwf TMP2, F
+ 00449 BRA_IFCLR TMP2, 7, ACCESS, TIA_WT_Hlp_Play_P_Cont
+4E7A AE07 M btfss reg, bit, reg_a
+4E7C D009 M bra label
+4E7E 0E7F 00450 movlw 0x7f
+4E80 6E07 00451 movwf TMP2
+4E82 EF48 F027 00452 goto TIA_WT_Hlp_Play_P_Cont
+4E86 00453 TIA_WT_Hlp_Play_P_Sub
+4E86 8E07 00454 bsf TMP2, 7
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 154
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4E88 2607 00455 addwf TMP2, F
+ 00456 BRA_IFCLR TMP2, 7, ACCESS, TIA_WT_Hlp_Play_P_Cont
+4E8A AE07 M btfss reg, bit, reg_a
+4E8C D001 M bra label
+4E8E 6A07 00457 clrf TMP2
+ 00458 ;; rgoto TIA_WT_Hlp_Play_P_Cont
+ 00459
+4E90 00460 TIA_WT_Hlp_Play_P_Cont
+4E90 5007 00461 movf TMP2, W
+4E92 0B7F 00462 andlw 0x7f
+4E94 6E03 00463 movwf MIOS_PARAMETER1
+4E96 5008 00464 movf TMP3, W
+4E98 EF23 F02D 00465 goto TIA_CCIN_Set
+ 00404 #include "tia_midi.inc"
+ 00001 ; $Id: tia_midi.inc bdupeyron.tech@gmail.com(Antichambre)
+ 00002 ;
+ 00003 ; MIDIbox TIA
+ 00004 ; MIDI Interface part
+ 00005 ;
+ 00006 ; ==========================================================================
+ 00007 ;
+ 00008 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00009 ; Licensed for personal non-commercial use only.
+ 00010 ; All other rights reserved.
+ 00011 ;
+ 00012 ; ==========================================================================
+ 00013
+ 00014 ;; --------------------------------------------------------------------------
+ 00015 ;; This function is called by TIA_MPROC when a complete MIDI event has been
+ 00016 ;; received
+ 00017 ;; Input:
+ 00018 ;; o first MIDI event byte in MIOS_PARAMETER1
+ 00019 ;; o second MIDI event byte in MIOS_PARAMETER2
+ 00020 ;; o third MIDI event byte in MIOS_PARAMETER3
+ 00021 ;; --------------------------------------------------------------------------
+4E9C 00022 TIA_MIDI_NotifyReceivedEvent
+ 00023
+ 00024 ;; branch to appr. TIA routine depending on received event
+4E9C 3803 00025 swapf MIOS_PARAMETER1, W
+4E9E 0B07 00026 andlw 0x07
+ 00027 JUMPTABLE_2BYTES_UNSECURE
+4EA0 ECC8 F016 M call MIOS_HLP_GetIndex_2bytes
+ 00028 rgoto TIA_MIDI_NoteOff
+4EA4 D040 M bra label
+ 00029 rgoto TIA_MIDI_NoteOn
+4EA6 D006 M bra label
+ 00030 rgoto TIA_MIDI_AfterTouch
+4EA8 D0C2 M bra label
+ 00031 rgoto TIA_MIDI_CC
+4EAA D081 M bra label
+ 00032 rgoto TIA_MIDI_ProgramChange
+4EAC D0A7 M bra label
+ 00033 rgoto TIA_MIDI_PolyAfterTouch
+4EAE D0BC M bra label
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 155
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00034 rgoto TIA_MIDI_PitchBender
+4EB0 D06D M bra label
+4EB2 0012 00035 return
+ 00036
+ 00037 ;; --------------------------------------------------------------------------
+ 00038 ;; This function is rcalled to forward a Note On event to the synthesizer
+ 00039 ;; Input:
+ 00040 ;; o first MIDI event byte in MIOS_PARAMETER1
+ 00041 ;; o second MIDI event byte in MIOS_PARAMETER2
+ 00042 ;; o third MIDI event byte in MIOS_PARAMETER3
+ 00043 ;; --------------------------------------------------------------------------
+4EB4 00044 TIA_MIDI_NoteOn
+4EB4 5005 00045 movf MIOS_PARAMETER3, W ; branch to NoteOff if velocity is zero
+4EB6 B4D8 00046 skpnz
+ 00047 rgoto TIA_MIDI_NoteOff
+4EB8 D036 M bra label
+ 00048
+ 00049
+ 00050
+ 00051 SET_BSR TIA_BASE ; prepare BSR for TIA register access
+4EBA 0101 M movlb HIGH(reg)
+ 00052
+ 00053 BRA_IFCLR TIA_PLAY_MODE, TIA_PLAY_MODE_POLY, BANKED, TIA_MIDI_NoteOn_MonoMode
+4EBC A10C M btfss reg, bit, reg_a
+4EBE D00F M bra label
+4EC0 00054 TIA_MIDI_NoteOn_PolyMode
+ 00055 ;; in poly mode we only react on MIDI channel of voice 1!
+4EC0 5003 00056 movf MIOS_PARAMETER1, W ; leave routine if MIDI channel doesn't match
+4EC2 0B0F 00057 andlw 0x0f
+4EC4 6320 00058 cpfseq TIA_V1_BASE + TIA_Vx_MIDI_CHANNEL, BANKED
+4EC6 0012 00059 return
+ 00060
+ 00061 ;; in poly mode: determine free voice
+4EC8 0E01 00062 movlw 0x01
+4ECA 5342 00063 movf TIA_V1_BASE + TIA_Vx_NOTE_STACK_0, F, BANKED
+4ECC E004 00064 bz TIA_MIDI_NoteOn_Poly_Cont
+4ECE 0E02 00065 movlw 0x02
+4ED0 5382 00066 movf TIA_V2_BASE + TIA_Vx_NOTE_STACK_0, F, BANKED
+4ED2 E001 00067 bz TIA_MIDI_NoteOn_Poly_Cont
+ 00068 rgoto TIA_MIDI_NoteOn_Poly_Failed
+4ED4 D026 M bra label
+4ED6 00069 TIA_MIDI_NoteOn_Poly_Cont
+4ED6 6E0A 00070 movwf TMP5 ; TMP5 contains the voices which should be played
+4ED8 D960 00071 rcall TIA_MIDI_GetAssignedKeys
+4EDA D95F 00072 rcall TIA_MIDI_GetAssignedKeys
+ 00073 rgoto TIA_MIDI_NoteOn_Start_Handlers
+4EDC D005 M bra label
+ 00074
+4EDE 00075 TIA_MIDI_NoteOn_MonoMode
+ 00076 ;; check for the assigned MIDI channels, result in TMP5
+4EDE D938 00077 rcall TIA_MIDI_GetAssignedChannels
+4EE0 D944 00078 rcall TIA_MIDI_GetAssignedVoices
+4EE2 D95B 00079 rcall TIA_MIDI_GetAssignedKeys
+ 00080 ;; leave routine if no voice is assigned to channel
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 156
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4EE4 B4D8 00081 skpnz
+4EE6 0012 00082 return
+ 00083
+4EE8 00084 TIA_MIDI_NoteOn_Start_Handlers
+ 00085 IRQ_DISABLE
+4EE8 9EF2 M bcf INTCON, GIE
+ 00086
+ 00087 ;; --[ Voice 1 Handler ]--
+4EEA 00088 TIA_MIDI_NoteOn_V1
+ 00089 BRA_IFCLR TMP5, 0, ACCESS, TIA_MIDI_NoteOn_V1_Failed
+4EEA A00A M btfss reg, bit, reg_a
+4EEC D00C M bra label
+4EEE EE11 F042 00090 lfsr FSR1, TIA_V1_BASE + TIA_Vx_NOTE_STACK_0 ; push note to stack
+4EF2 D8A9 00091 rcall TIA_MIDI_Hlp_PushNote
+ 00092 BRA_IFSET WREG, 0, ACCESS, TIA_MIDI_NoteOn_V1_Failed ; exit if note already in stack
+4EF4 B0E8 M btfsc reg, bit, reg_a
+4EF6 D007 M bra label
+4EF8 EE01 F020 00093 lfsr FSR0, TIA_V1_BASE
+4EFC 5004 00094 movf MIOS_PARAMETER2, W ; note which should be disabled
+ 00095 ; RCALL_IFSET TIA_PLAY_MODE, TIA_PLAY_MODE_LEGATO_OFF, BANKED, TIA_MIDI_Hlp_GateOff ; request gate-off if !legato
+4EFE D8D4 00096 rcall TIA_MIDI_Hlp_NoteOn ; call note-on handler
+4F00 EE21 F020 00097 lfsr FSR2, TIA_V1_BASE ; sort notes for arpeggios
+4F04 D966 00098 rcall TIA_MIDI_Arp_Sorter
+4F06 00099 TIA_MIDI_NoteOn_V1_Failed
+ 00100
+ 00101 ;; --[ Voice 2 Handler ]--
+4F06 00102 TIA_MIDI_NoteOn_V2
+ 00103 BRA_IFCLR TMP5, 1, ACCESS, TIA_MIDI_NoteOn_V2_Failed
+4F06 A20A M btfss reg, bit, reg_a
+4F08 D00C M bra label
+4F0A EE11 F082 00104 lfsr FSR1, TIA_V2_BASE + TIA_Vx_NOTE_STACK_0 ; push note to stack
+4F0E D89B 00105 rcall TIA_MIDI_Hlp_PushNote
+ 00106 BRA_IFSET WREG, 0, ACCESS, TIA_MIDI_NoteOn_V2_Failed ; exit if note already in stack
+4F10 B0E8 M btfsc reg, bit, reg_a
+4F12 D007 M bra label
+4F14 EE01 F060 00107 lfsr FSR0, TIA_V2_BASE
+4F18 5004 00108 movf MIOS_PARAMETER2, W ; note which should be disabled
+ 00109 ; RCALL_IFSET TIA_PLAY_MODE, TIA_PLAY_MODE_LEGATO_OFF, BANKED, TIA_MIDI_Hlp_GateOff ; request gate-off if !legato
+4F1A D8C6 00110 rcall TIA_MIDI_Hlp_NoteOn ; call note-on handler
+4F1C EE21 F060 00111 lfsr FSR2, TIA_V2_BASE ; sort notes for arpeggios
+4F20 D958 00112 rcall TIA_MIDI_Arp_Sorter
+4F22 00113 TIA_MIDI_NoteOn_V2_Failed
+ 00114
+4F22 00115 TIA_MIDI_NoteOn_Poly_Failed
+ 00116
+ 00117 IRQ_ENABLE
+4F22 8EF2 M bsf INTCON, GIE
+4F24 0012 00118 return
+ 00119
+ 00120 ;; --------------------------------------------------------------------------
+ 00121 ;; This function is rcalled to forward a Note Off event to the synthesizer
+ 00122 ;; Input:
+ 00123 ;; o first MIDI event byte in MIOS_PARAMETER1
+ 00124 ;; o second MIDI event byte in MIOS_PARAMETER2
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 157
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00125 ;; o third MIDI event byte in MIOS_PARAMETER3
+ 00126 ;; --------------------------------------------------------------------------
+4F26 00127 TIA_MIDI_NoteOff
+ 00128 SET_BSR TIA_BASE ; prepare BSR for TIA register access
+4F26 0101 M movlb HIGH(reg)
+ 00129
+ 00130 ;; ensure that velocity is cleared
+4F28 6A05 00131 clrf MIOS_PARAMETER3
+ 00132
+ 00133 BRA_IFCLR TIA_PLAY_MODE, TIA_PLAY_MODE_POLY, BANKED, TIA_MIDI_NoteOff_MonoMode
+4F2A A10C M btfss reg, bit, reg_a
+4F2C D003 M bra label
+4F2E 00134 TIA_MIDI_NoteOff_PolyMode
+ 00135 ;; in poly mode, handle all channels
+4F2E 0E0F 00136 movlw 0x0f
+4F30 6E0A 00137 movwf TMP5
+ 00138 rgoto TIA_MIDI_NoteOff_Start_Handlers
+4F32 D005 M bra label
+4F34 00139 TIA_MIDI_NoteOff_MonoMode
+ 00140 ;; check for the assigned MIDI channels, result in TMP5
+4F34 D90D 00141 rcall TIA_MIDI_GetAssignedChannels
+4F36 D919 00142 rcall TIA_MIDI_GetAssignedVoices ; (not so optimal if split points modified during notes are played)
+4F38 D930 00143 rcall TIA_MIDI_GetAssignedKeys
+ 00144 ;; leave routine if no voice is assigned to channel
+4F3A B4D8 00145 skpnz
+4F3C 0012 00146 return
+ 00147
+4F3E 00148 TIA_MIDI_NoteOff_Start_Handlers
+ 00149 IRQ_DISABLE
+4F3E 9EF2 M bcf INTCON, GIE
+ 00150
+ 00151 ;; --[ Voice 1 Handler ]--
+4F40 00152 TIA_MIDI_NoteOff_V1
+ 00153 BRA_IFCLR TMP5, 0, ACCESS, TIA_MIDI_NoteOff_V1_NotFnd
+4F40 A00A M btfss reg, bit, reg_a
+4F42 D010 M bra label
+4F44 EE11 F042 00154 lfsr FSR1, TIA_V1_BASE + TIA_Vx_NOTE_STACK_0 ; pop note from stack
+4F48 CFE7 F008 00155 movff INDF1, TMP3 ; save current #0 entry in TMP3 for later use
+4F4C D895 00156 rcall TIA_MIDI_Hlp_PopNote
+ 00157 BRA_IFSET WREG, 0, ACCESS, TIA_MIDI_NoteOff_V1_NotFnd
+4F4E B0E8 M btfsc reg, bit, reg_a
+4F50 D009 M bra label
+4F52 EE01 F020 00158 lfsr FSR0, TIA_V1_BASE
+4F56 5008 00159 movf TMP3, W ; restore note
+4F58 D8DA 00160 rcall TIA_MIDI_Hlp_NoteOff
+ 00161 RCALL_IFSET WREG, 0, ACCESS, TIA_MIDI_Hlp_NoteOn
+4F5A B0E8 M btfsc reg, bit, reg_a
+4F5C D8A5 M rcall label
+4F5E EE21 F020 00162 lfsr FSR2, TIA_V1_BASE ; sort notes for arpeggios
+4F62 D937 00163 rcall TIA_MIDI_Arp_Sorter
+4F64 00164 TIA_MIDI_NoteOff_V1_NotFnd
+ 00165
+ 00166 ;; --[ Voice 2 Handler ]--
+4F64 00167 TIA_MIDI_NoteOff_V2
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 158
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00168 BRA_IFCLR TMP5, 1, ACCESS, TIA_MIDI_NoteOff_V2_NotFnd
+4F64 A20A M btfss reg, bit, reg_a
+4F66 D010 M bra label
+4F68 EE11 F082 00169 lfsr FSR1, TIA_V2_BASE + TIA_Vx_NOTE_STACK_0 ; pop note from stack
+4F6C CFE7 F008 00170 movff INDF1, TMP3 ; save current #0 entry in TMP3 for later use
+4F70 D883 00171 rcall TIA_MIDI_Hlp_PopNote
+ 00172 BRA_IFSET WREG, 0, ACCESS, TIA_MIDI_NoteOff_V2_NotFnd
+4F72 B0E8 M btfsc reg, bit, reg_a
+4F74 D009 M bra label
+4F76 EE01 F060 00173 lfsr FSR0, TIA_V2_BASE
+4F7A 5008 00174 movf TMP3, W ; restore note
+4F7C D8C8 00175 rcall TIA_MIDI_Hlp_NoteOff
+ 00176 RCALL_IFSET WREG, 0, ACCESS, TIA_MIDI_Hlp_NoteOn
+4F7E B0E8 M btfsc reg, bit, reg_a
+4F80 D893 M rcall label
+4F82 EE21 F060 00177 lfsr FSR2, TIA_V2_BASE ; sort notes for arpeggios
+4F86 D925 00178 rcall TIA_MIDI_Arp_Sorter
+4F88 00179 TIA_MIDI_NoteOff_V2_NotFnd
+ 00180
+ 00181 IRQ_ENABLE
+4F88 8EF2 M bsf INTCON, GIE
+4F8A 0012 00182 return
+ 00183
+ 00184
+ 00185 ;; --------------------------------------------------------------------------
+ 00186 ;; This function is rcalled to forward a PitchBender event to the synthesizer
+ 00187 ;; Input:
+ 00188 ;; o first MIDI event byte in MIOS_PARAMETER1
+ 00189 ;; o second MIDI event byte in MIOS_PARAMETER2
+ 00190 ;; o third MIDI event byte in MIOS_PARAMETER3
+ 00191 ;; --------------------------------------------------------------------------
+4F8C 00192 TIA_MIDI_PitchBender
+ 00193 SET_BSR TIA_BASE
+4F8C 0101 M movlb HIGH(reg)
+4F8E 3404 00194 rlf MIOS_PARAMETER2, W
+4F90 0BFE 00195 andlw 0xfe
+4F92 0A80 00196 xorlw 0x80
+4F94 6E04 00197 movwf MIOS_PARAMETER2
+ 00198
+4F96 5003 00199 movf MIOS_PARAMETER1, W ; leave routine if MIDI channel doesn't match
+4F98 0B0F 00200 andlw 0x0f
+4F9A 00201 TIA_MIDI_PitchBender_v1
+4F9A 6320 00202 cpfseq TIA_V1_BASE + TIA_Vx_MIDI_CHANNEL, BANKED
+ 00203 rgoto TIA_MIDI_PitchBender_v2
+4F9C D003 M bra label
+4F9E 5004 00204 movf MIOS_PARAMETER2, W
+4FA0 6F2B 00205 movwf TIA_V1_BASE + TIA_Vx_PITCHBENDER, BANKED
+ 00206 rgoto TIA_MIDI_PitchBender_End
+4FA2 D004 M bra label
+ 00207
+4FA4 00208 TIA_MIDI_PitchBender_v2
+4FA4 6360 00209 cpfseq TIA_V2_BASE + TIA_Vx_MIDI_CHANNEL, BANKED
+ 00210 rgoto TIA_MIDI_PitchBender_End
+4FA6 D002 M bra label
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 159
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4FA8 5004 00211 movf MIOS_PARAMETER2, W
+4FAA 6F6B 00212 movwf TIA_V2_BASE + TIA_Vx_PITCHBENDER, BANKED
+4FAC 00213 TIA_MIDI_PitchBender_End
+4FAC 0012 00214 return
+ 00215
+ 00216 ;; --------------------------------------------------------------------------
+ 00217 ;; This function is rcalled to forward a Controller event to the synthesizer
+ 00218 ;; Input:
+ 00219 ;; o first MIDI event byte in MIOS_PARAMETER1
+ 00220 ;; o second MIDI event byte in MIOS_PARAMETER2
+ 00221 ;; o third MIDI event byte in MIOS_PARAMETER3
+ 00222 ;; --------------------------------------------------------------------------
+4FAE 00223 TIA_MIDI_CC
+ 00224 SET_BSR TIA_BASE
+4FAE 0101 M movlb HIGH(reg)
+ 00225
+ 00226 ;; special treatment for CC#0 (bank change)
+4FB0 5004 00227 movf MIOS_PARAMETER2, W
+4FB2 E11A 00228 bnz TIA_MIDI_CC_No00
+4FB4 00229 TIA_MIDI_CC_00
+ 00230 ;; exit if bank number >= DEFAULT_BS_KBANK_ID*4
+4FB4 0E10 00231 movlw DEFAULT_BS_KBANK_ID*4
+4FB6 6005 00232 cpfslt MIOS_PARAMETER3
+4FB8 0012 00233 return
+ 00234
+4FBA 5003 00235 movf MIOS_PARAMETER1, W ; leave routine if MIDI channel doesn't match
+4FBC 0B0F 00236 andlw 0x0f
+4FBE 6320 00237 cpfseq TIA_V1_BASE + TIA_Vx_MIDI_CHANNEL, BANKED
+4FC0 0012 00238 return
+ 00239
+4FC2 C005 F014 00240 movff MIOS_PARAMETER3, TIA_PBANK
+ 00241
+ 00242 ;; Int.Patch if ==0
+4FC6 5013 00243 movf TIA_PATCH, W
+4FC8 E00C 00244 bz TIA_MIDI_CC_00_Ok
+ 00245
+ 00246 ;; Banstick Ready
+4FCA 5014 00247 movf TIA_PBANK, W
+4FCC EC8F F01C 00248 call TIA_BANK_GetBankStickReady
+4FD0 B4D8 00249 skpnz
+4FD2 6A13 00250 clrf TIA_PATCH ;; to Int. Patch if BS not ready
+ 00251
+ 00252 ;; Banstick Size
+4FD4 EC9C F01C 00253 call TIA_BANK_GetBankStickSize
+4FD8 E104 00254 bnz TIA_MIDI_CC_00_Ok
+ 00255 ;; 64/128 patches
+4FDA 5013 00256 movf TIA_PATCH, W
+4FDC 0BC0 00257 andlw 0xc0
+4FDE A4D8 00258 skpz
+4FE0 6A13 00259 clrf TIA_PATCH ;; to Int. Patch if >63
+ 00260
+4FE2 00261 TIA_MIDI_CC_00_Ok
+4FE2 ECCE F01B 00262 call TIA_PATCH_Init
+ 00263 ;;goto USER_DISPLAY_Init
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 160
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+4FE6 00264 TIA_MIDI_CC_00_End
+4FE6 0012 00265 return
+ 00266
+ 00267
+4FE8 00268 TIA_MIDI_CC_No00
+4FE8 5003 00269 movf MIOS_PARAMETER1, W ; leave routine if MIDI channel doesn't match
+4FEA 0B0F 00270 andlw 0x0f
+4FEC 6320 00271 cpfseq TIA_V1_BASE + TIA_Vx_MIDI_CHANNEL, BANKED
+4FEE 0012 00272 return
+ 00273
+ 00274 ;; forward CC to CCIN_Set routine
+4FF0 C005 F003 00275 movff MIOS_PARAMETER3, MIOS_PARAMETER1
+4FF4 5004 00276 movf MIOS_PARAMETER2, W
+4FF6 EC23 F02D 00277 call TIA_CCIN_Set
+ 00278
+4FFA 0012 00279 return
+ 00280
+ 00281
+ 00282 ;; --------------------------------------------------------------------------
+ 00283 ;; This function is rcalled to forward a Program Change event to the synthesizer
+ 00284 ;; Input:
+ 00285 ;; o first MIDI event byte in MIOS_PARAMETER1
+ 00286 ;; o second MIDI event byte in MIOS_PARAMETER2
+ 00287 ;; --------------------------------------------------------------------------
+4FFC 00288 TIA_MIDI_ProgramChange
+ 00289 SET_BSR TIA_BASE
+4FFC 0101 M movlb HIGH(reg)
+ 00290
+4FFE 5003 00291 movf MIOS_PARAMETER1, W ; leave routine if MIDI channel doesn't match
+5000 0B0F 00292 andlw 0x0f
+5002 6320 00293 cpfseq TIA_V1_BASE + TIA_Vx_MIDI_CHANNEL, BANKED
+5004 0012 00294 return
+ 00295
+ 00296 ;; Int.Patch if ==0
+5006 5004 00297 movf MIOS_PARAMETER2, W
+5008 E00A 00298 bz TIA_MIDI_ProgramChange_Ok
+ 00299
+ 00300 ;; Banstick Ready
+500A 5014 00301 movf TIA_PBANK, W
+500C EC8F F01C 00302 call TIA_BANK_GetBankStickReady
+5010 B4D8 00303 skpnz
+5012 6A04 00304 clrf MIOS_PARAMETER2
+ 00305
+ 00306 ;; Banstick Size
+5014 EC9C F01C 00307 call TIA_BANK_GetBankStickSize
+5018 E102 00308 bnz TIA_MIDI_ProgramChange_Ok
+ 00309 ;; 64/128 patches
+501A BC04 00310 btfsc MIOS_PARAMETER2, 6
+ 00311 rgoto TIA_MIDI_ProgramChange_End
+501C D004 M bra label
+ 00312
+501E 00313 TIA_MIDI_ProgramChange_Ok
+501E C004 F013 00314 movff MIOS_PARAMETER2, TIA_PATCH
+5022 ECCE F01B 00315 call TIA_PATCH_Init
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 161
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00316 ;;goto USER_DISPLAY_Init
+5026 00317 TIA_MIDI_ProgramChange_End
+5026 0012 00318 return
+ 00319
+ 00320 ;; --------------------------------------------------------------------------
+ 00321 ;; This function is rcalled to forward a Poly Aftertouch event to the synthesizer
+ 00322 ;; Input:
+ 00323 ;; o first MIDI event byte in MIOS_PARAMETER1
+ 00324 ;; o second MIDI event byte in MIOS_PARAMETER2
+ 00325 ;; --------------------------------------------------------------------------
+5028 00326 TIA_MIDI_PolyAfterTouch
+5028 C004 F005 00327 movff MIOS_PARAMETER2, MIOS_PARAMETER3
+ 00328 rgoto TIA_MIDI_AfterTouch
+502C D000 M bra label
+ 00329
+ 00330 ;; --------------------------------------------------------------------------
+ 00331 ;; This function is rcalled to forward a Aftertouch event to the synthesizer
+ 00332 ;; Input:
+ 00333 ;; o first MIDI event byte in MIOS_PARAMETER1
+ 00334 ;; o second MIDI event byte in MIOS_PARAMETER2
+ 00335 ;; o third MIDI event byte in MIOS_PARAMETER3
+ 00336 ;; --------------------------------------------------------------------------
+502E 00337 TIA_MIDI_AfterTouch
+ 00338 SET_BSR TIA_BASE
+502E 0101 M movlb HIGH(reg)
+ 00339
+5030 5003 00340 movf MIOS_PARAMETER1, W ; leave routine if MIDI channel doesn't match
+5032 0B0F 00341 andlw 0x0f
+5034 6320 00342 cpfseq TIA_V1_BASE + TIA_Vx_MIDI_CHANNEL, BANKED
+5036 0012 00343 return
+ 00344
+5038 5005 00345 movf MIOS_PARAMETER3, W
+503A 00346 _TIA_MIDI_AfterTouch
+503A 6E03 00347 movwf MIOS_PARAMETER1
+ 00348 SET_BSR TIA_BASE ; prepare BSR for TIA register access
+503C 0101 M movlb HIGH(reg)
+503E EE11 F0E8 00349 lfsr FSR1, TIA_CTRL_AFTERTOUCH_BASE; prepare FSR1
+5042 EFF4 F02D 00350 goto TIA_CCIN_Cmd_AFTERTOUCH ; set aftertouch value
+ 00351
+ 00352
+ 00353 ;; --------------------------------------------------------------------------
+ 00354 ;; help routines
+ 00355 ;; --------------------------------------------------------------------------
+ 00356
+ 00357 ;; ------------------------------------------------------------------
+ 00358 ;; Push a note into the stack
+ 00359 ;; ------------------------------------------------------------------
+5046 00360 TIA_MIDI_Hlp_PushNote
+5046 6A06 00361 clrf TMP1
+ 00362 ;; do nothing if note is already stored in note stack
+5048 00363 TIA_MIDI_Hlp_PushNote_CheckLoop
+5048 5006 00364 movf TMP1, W
+504A 50E3 00365 movf PLUSW1, W
+504C 1804 00366 xorwf MIOS_PARAMETER2, W
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 162
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+504E B4D8 00367 skpnz
+ 00368 rgoto TIA_MIDI_Hlp_PushNote_Failed ; leave note routine if note already stored
+5050 D012 M bra label
+5052 2A06 00369 incf TMP1, F
+5054 0E04 00370 movlw TIA_NOTE_STACK_LEN
+5056 6206 00371 cpfseq TMP1, ACCESS
+ 00372 rgoto TIA_MIDI_Hlp_PushNote_CheckLoop
+5058 D7F7 M bra label
+ 00373
+ 00374 ;; shift right note stack
+505A 0E02 00375 movlw (TIA_NOTE_STACK_LEN-2)
+505C 6E06 00376 movwf TMP1
+505E 00377 TIA_MIDI_Hlp_PushNote_ShiftLoop
+505E 5006 00378 movf TMP1, W
+5060 CFE3 F007 00379 movff PLUSW1, TMP2
+5064 2806 00380 incf TMP1, W
+5066 C007 FFE3 00381 movff TMP2, PLUSW1
+506A 0606 00382 decf TMP1, F
+506C 2806 00383 incf TMP1, W
+506E E1F7 00384 bnz TIA_MIDI_Hlp_PushNote_ShiftLoop
+ 00385
+ 00386 ;; store new note at offset 0
+5070 C004 FFE7 00387 movff MIOS_PARAMETER2, INDF1
+ 00388
+5074 0C00 00389 retlw 0x00 ; return 0x00 as error status
+ 00390
+5076 00391 TIA_MIDI_Hlp_PushNote_Failed
+5076 0C01 00392 retlw 0x01 ; return 0x01 as error status
+ 00393
+ 00394 ;; ------------------------------------------------------------------
+ 00395
+ 00396 ;; ------------------------------------------------------------------
+ 00397 ;; Pop a note from the stack
+ 00398 ;; ------------------------------------------------------------------
+5078 00399 TIA_MIDI_Hlp_PopNote
+ 00400 ; search for note entry with the same number, erase it and push the entries behind
+5078 6A06 00401 clrf TMP1
+507A 00402 TIA_MIDI_Hlp_PopNote_SearchLoop
+507A 5006 00403 movf TMP1, W
+507C 50E3 00404 movf PLUSW1, W
+507E 1804 00405 xorwf MIOS_PARAMETER2, W
+5080 E005 00406 bz TIA_MIDI_Hlp_PopNote_Found
+5082 2A06 00407 incf TMP1, F
+5084 0E04 00408 movlw TIA_NOTE_STACK_LEN
+5086 6206 00409 cpfseq TMP1, ACCESS
+ 00410 rgoto TIA_MIDI_Hlp_PopNote_SearchLoop
+5088 D7F8 M bra label
+ 00411 rgoto TIA_MIDI_Hlp_PopNote_Failed
+508A D00D M bra label
+508C 00412 TIA_MIDI_Hlp_PopNote_Found
+ 00413
+ 00414 ;; push the entries behind the found entry
+508C 00415 TIA_MIDI_Hlp_PopNote_ShiftLoop
+508C 2806 00416 incf TMP1, W
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 163
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+508E CFE3 F007 00417 movff PLUSW1, TMP2
+5092 5006 00418 movf TMP1, W
+5094 C007 FFE3 00419 movff TMP2, PLUSW1
+5098 2A06 00420 incf TMP1, F
+509A 0E04 00421 movlw TIA_NOTE_STACK_LEN
+509C 6206 00422 cpfseq TMP1, ACCESS
+ 00423 rgoto TIA_MIDI_Hlp_PopNote_ShiftLoop
+509E D7F6 M bra label
+ 00424 ;; clear the last entry
+50A0 0E03 00425 movlw TIA_NOTE_STACK_LEN-1
+50A2 6AE3 00426 clrf PLUSW1
+50A4 0C00 00427 retlw 0x00 ; return with 0x00: note deleted from stack
+ 00428
+50A6 00429 TIA_MIDI_Hlp_PopNote_Failed
+50A6 0C01 00430 retlw 0x01 ; return with 0x01: note not found in stack
+ 00431
+ 00432 ;; ------------------------------------------------------------------
+ 00433
+ 00434 ;; ------------------------------------------------------------------
+ 00435 ;; Note On help function
+ 00436 ;; ------------------------------------------------------------------
+50A8 00437 TIA_MIDI_Hlp_NoteOn
+ 00438 ; BRA_IFCLR TIA_PLAY_MODE, TIA_PLAY_MODE_ONLY_WT_OFF, BANKED, TIA_MIDI_Hlp_NoteOn_NoNewNote
+50A8 00439 TIA_MIDI_Hlp_NoteOn_NewNote
+50A8 0E10 00440 movlw TIA_Vx_NOTE
+50AA CFEB FFF5 00441 movff PLUSW0, TABLAT
+50AE CFE7 FFEB 00442 movff INDF1, PLUSW0
+50B2 00443 TIA_MIDI_Hlp_NoteOn_NoNewNote
+ 00444
+ 00445 ;; if sus-key enabled, skip enable portamento when only one key pressed
+ 00446 ; BRA_IFCLR TIA_PLAY_MODE, TIA_PLAY_MODE_SUS_KEY, BANKED, TIA_MIDI_Hlp_NoteOn_SusKeyPor
+ 00447
+ 00448 ;; special case: don't disable portamento on a note off event
+ 00449 ; movf MIOS_PARAMETER3, W
+ 00450 ; bz TIA_MIDI_Hlp_NoteOn_SusKeySkip
+ 00451
+ 00452 ; movlw TIA_Vx_STAT
+ 00453 ; bcf PLUSW0, Vx_STAT_PORTA_ENABLE
+ 00454
+ 00455 ; movlw 0x01
+ 00456 ; movf PLUSW1, W
+ 00457 ; bz TIA_MIDI_Hlp_NoteOn_SusKeyNoPor
+ 00458
+50B2 00459 TIA_MIDI_Hlp_NoteOn_SusKeyPor
+ 00460 ;BRA_IFSET TIA_SE_OPTION, SE_OPTION_ENV2PORTA, BANKED, TIA_MIDI_Hlp_NoteOn_SusKeyPor_NC
+ 00461 ;; enable portamento if rate is > 0
+ 00462
+50B2 0E0E 00463 movlw TIA_Vx_PORTA_RATE
+50B4 50EB 00464 movf PLUSW0, W
+50B6 E012 00465 bz TIA_MIDI_Hlp_NoteOn_SusKeyNoPor
+50B8 00466 TIA_MIDI_Hlp_NoteOn_SusKeyPor_NC
+50B8 0E03 00467 movlw TIA_Vx_STAT
+50BA 8CEB 00468 bsf PLUSW0, Vx_STAT_PORTA_ENABLE
+ 00469
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 164
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00470 ;; store current frequency in TIA_Vx_PORTA_FRQ_L
+ 00471
+50BC 0E09 00472 movlw TIA_Vx_FRQ_L
+50BE CFEB F006 00473 movff PLUSW0, TMP1
+50C2 0E0A 00474 movlw TIA_Vx_FRQ_H
+50C4 CFEB F007 00475 movff PLUSW0, TMP2
+ 00476
+50C8 0E1C 00477 movlw TIA_Vx_PORTA_FRQ_L
+50CA C006 FFEB 00478 movff TMP1, PLUSW0
+50CE 0E1D 00479 movlw TIA_Vx_PORTA_FRQ_H
+50D0 C007 FFEB 00480 movff TMP2, PLUSW0
+ 00481
+50D4 0E1A 00482 movlw TIA_Vx_PORTA_CTR_L
+50D6 6AEB 00483 clrf PLUSW0
+50D8 0E1B 00484 movlw TIA_Vx_PORTA_CTR_H
+50DA 6AEB 00485 clrf PLUSW0
+ 00486
+ 00487 ;; reset Porta counter if constant time flag enabled
+ 00488 ;movlw TIA_Vx_MODE
+ 00489 ;CALL_IFSET PLUSW0, Vx_MODE_PORTA_CONST, ACCESS, TIA_SW_Hlp_PortaCTR_Reset
+ 00490
+50DC 00491 TIA_MIDI_Hlp_NoteOn_SusKeyNoPor
+ 00492 ;TIA_MIDI_Hlp_NoteOn_SusKeySkip
+ 00493
+ 00494 ;; always re-init arpeggiator (in mono as well as in legato mode)
+50DC 0E15 00495 movlw TIA_Vx_ARP_CTR
+50DE 6AEB 00496 clrf PLUSW0
+50E0 0E14 00497 movlw TIA_Vx_ARP_NOTE_NUMBER
+50E2 6AEB 00498 clrf PLUSW0 ; (next increment will play the second note)
+ 00499
+ 00500 ;; skip the rest if legato mode and current note is first note
+ 00501 ; BRA_IFSET TIA_PLAY_MODE, TIA_PLAY_MODE_LEGATO_OFF, BANKED, TIA_MIDI_Hlp_NoteOn_TrgGateNL
+ 00502 ; movf MIOS_PARAMETER2, W
+ 00503 ; cpfseq INDF1, ACCESS
+ 00504 ; rgoto TIA_MIDI_Hlp_NoteOn_TrgGateLSkp
+ 00505 ; movlw 0x01
+ 00506 ; movf PLUSW1, W
+ 00507 ; bnz TIA_MIDI_Hlp_NoteOn_TrgGateLSkp
+ 00508 ;TIA_MIDI_Hlp_NoteOn_TrgGateNL
+ 00509
+ 00510 ;; request gate bit
+50E4 D81C 00511 rcall TIA_MIDI_Hlp_GateOn
+ 00512
+ 00513
+ 00514 ;; ---[ END handle velocity ]---
+ 00515
+ 00516 ;; ---[ BEGIN handle velocity ]---
+ 00517
+50E6 C003 F006 00518 movff MIOS_PARAMETER1, TMP1 ; store MIOS_PARAMETER1
+50EA C004 F007 00519 movff MIOS_PARAMETER2, TMP2 ; store MIOS_PARAMETER2
+50EE 5005 00520 movf MIOS_PARAMETER3, W ; copy velocity value to MIOS_PARAMETER1
+50F0 E00D 00521 bz TIA_MIDI_Hlp_NoteOn_NoVel; no velocity on note off!
+50F2 6E03 00522 movwf MIOS_PARAMETER1
+50F4 0E28 00523 movlw TIA_Vx_LAST_VEL
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 165
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+50F6 C005 FFEB 00524 movff MIOS_PARAMETER3, PLUSW0
+ 00525 SET_BSR TIA_BASE ; prepare BSR for TIA register access
+50FA 0101 M movlb HIGH(reg)
+50FC EE10 F000 00526 lfsr FSR1, FSR0
+5100 EC85 F02D 00527 call TIA_CCIN_Cmd_VELOCITY_SkpCopy ; set velocity value
+5104 C006 F003 00528 movff TMP1, MIOS_PARAMETER1 ; restore MIOS_PARAMETER1
+5108 C007 F004 00529 movff TMP2, MIOS_PARAMETER2 ; restore MIOS_PARAMETER2
+ 00530 ;; ---[ END handle velocity ]---
+ 00531
+ 00532
+ 00533
+510C 00534 TIA_MIDI_Hlp_NoteOn_NoVel
+ 00535
+510C 00536 TIA_MIDI_Hlp_NoteOn_TrgGateLSkp
+510C 0012 00537 return
+ 00538
+ 00539
+ 00540 ;; ------------------------------------------------------------------
+ 00541 ;; Note Off help function
+ 00542 ;; ------------------------------------------------------------------
+510E 00543 TIA_MIDI_Hlp_NoteOff
+ 00544 ;; last note number of #0 (before pop) in WREG!
+ 00545
+ 00546 ;; if not in legato mode and current note-off number equal to last entry #0: gate off
+ 00547 ; BRA_IFCLR TIA_PLAY_MODE, TIA_PLAY_MODE_LEGATO_OFF, BANKED, TIA_MIDI_Hlp_NoteOff_NoGOff
+510E 6204 00548 cpfseq MIOS_PARAMETER2, ACCESS
+ 00549 rgoto TIA_MIDI_Hlp_NoteOff_End
+5110 D005 M bra label
+5112 D812 00550 rcall TIA_MIDI_Hlp_GateOff
+5114 00551 TIA_MIDI_Hlp_NoteOff_NoGOff
+ 00552 ;; ------------------------------------------------------------------
+ 00553
+ 00554 ;; if still note available, play new note in NoteOn Section
+5114 50E7 00555 movf INDF1, W
+5116 A4D8 00556 skpz
+5118 0C01 00557 retlw 0x01 ; return, request Note On!
+ 00558
+ 00559 ;; else request gate clear bit
+511A D80E 00560 rcall TIA_MIDI_Hlp_GateOff
+511C 00561 TIA_MIDI_Hlp_NoteOff_End
+511C 0C00 00562 retlw 0x00 ; return, request NO Note On!
+ 00563
+ 00564 ;; ------------------------------------------------------------------
+ 00565
+ 00566 ;; ------------------------------------------------------------------
+ 00567 ;; Gate On help function
+ 00568 ;; ------------------------------------------------------------------
+511E 00569 TIA_MIDI_Hlp_GateOn
+511E 90D8 00570 clrc
+5120 0E11 00571 movlw TIA_Vx_NOTE_DELAY
+5122 34EB 00572 rlf PLUSW0, W
+5124 6EF5 00573 movwf TABLAT
+5126 0E12 00574 movlw TIA_Vx_NOTE_DELAY_CTR
+5128 CFF5 FFEB 00575 movff TABLAT, PLUSW0
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 166
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00576
+512C 0E03 00577 movlw TIA_Vx_STAT
+ 00578 ;btfsc TIA_PLAY_MODE, TIA_PLAY_MODE_ONLY_WT_OFF, BANKED
+512E 82EB 00579 bsf PLUSW0, Vx_STAT_GATE_SET_REQ
+5130 80EB 00580 bsf PLUSW0, Vx_STAT_VOICE_ACTIVE
+ 00581
+ 00582 ;; reset wavetable handler
+5132 0E2E 00583 movlw TIA_Vx_WT_STATE
+5134 82EB 00584 bsf PLUSW0, WT_STATE_RESET
+ 00585
+5136 0012 00586 return
+ 00587
+ 00588 ;; ------------------------------------------------------------------
+ 00589 ;; Gate Off help function
+ 00590 ;; ------------------------------------------------------------------
+5138 00591 TIA_MIDI_Hlp_GateOff
+5138 90D8 00592 clrc
+513A 0E11 00593 movlw TIA_Vx_NOTE_DELAY
+513C 34EB 00594 rlf PLUSW0, W
+513E 6EF5 00595 movwf TABLAT
+5140 0E12 00596 movlw TIA_Vx_NOTE_DELAY_CTR
+5142 CFF5 FFEB 00597 movff TABLAT, PLUSW0
+ 00598
+5146 0E03 00599 movlw TIA_Vx_STAT
+5148 92EB 00600 bcf PLUSW0, Vx_STAT_GATE_SET_REQ
+514A 84EB 00601 bsf PLUSW0, Vx_STAT_GATE_CLR_REQ
+514C 90EB 00602 bcf PLUSW0, Vx_STAT_VOICE_ACTIVE
+514E 0012 00603 return
+ 00604
+ 00605 ;; ------------------------------------------------------------------
+ 00606 ;; for Note On/Note Off in Mono mode
+ 00607 ;; MIDI channel in MIOS_PARAMETER1[0..3]
+ 00608 ;; result in TMP5
+5150 00609 TIA_MIDI_GetAssignedChannels
+5150 6A0A 00610 clrf TMP5 ; TMP5 contains the voices which should be played
+ 00611
+5152 5003 00612 movf MIOS_PARAMETER1, W
+5154 0B0F 00613 andlw 0x0f
+5156 1920 00614 xorwf TIA_V1_BASE + TIA_Vx_MIDI_CHANNEL, W, BANKED
+5158 B4D8 00615 skpnz
+515A 800A 00616 bsf TMP5, 0 ; play voice 1
+ 00617
+515C 5003 00618 movf MIOS_PARAMETER1, W
+515E 0B0F 00619 andlw 0x0f
+5160 1960 00620 xorwf TIA_V2_BASE + TIA_Vx_MIDI_CHANNEL, W, BANKED
+5162 B4D8 00621 skpnz
+5164 820A 00622 bsf TMP5, 1 ; play voice 2
+ 00623
+ 00624
+5166 500A 00625 movf TMP5, W
+5168 0012 00626 return
+ 00627
+ 00628 ;; ------------------------------------------------------------------
+ 00629 ;; for Note On/Off in Mono mode
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 167
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00630 ;; note number in MIOS_PARAMETER2
+ 00631 ;; result will be ANDed to TMP5 --- TIA_MIDI_GetAssignedChannels should be called before!
+ 00632 TIA_MIDI_GETASSIGNEDVOICEx MACRO FLAG_Vx, TIA_Vx_BASE
+ 00633 LOCAL TIA_MIDI_GETASSIGNEDVOICEx_LOk
+ 00634 LOCAL TIA_MIDI_GETASSIGNEDVOICEx_LOff
+ 00635 LOCAL TIA_MIDI_GETASSIGNEDVOICEx_End
+ 00636
+ 00637 ;; handle split points
+ 00638 movf TIA_Vx_BASE + TIA_Vx_SPLIT_LOWER, W, BANKED ; (don't split if 0)
+ 00639 iorwf TIA_Vx_BASE + TIA_Vx_SPLIT_UPPER, W, BANKED
+ 00640 bz TIA_MIDI_GETASSIGNEDVOICEx_End
+ 00641
+ 00642 movf TIA_Vx_BASE + TIA_Vx_SPLIT_LOWER, W, BANKED
+ 00643 cpfslt MIOS_PARAMETER2, ACCESS
+ 00644 rgoto TIA_MIDI_GETASSIGNEDVOICEx_LOk
+ 00645 rgoto TIA_MIDI_GETASSIGNEDVOICEx_LOff
+ 00646
+ 00647 TIA_MIDI_GETASSIGNEDVOICEx_LOk
+ 00648 movf TIA_Vx_BASE + TIA_Vx_SPLIT_UPPER, W, BANKED
+ 00649 cpfsgt MIOS_PARAMETER2, ACCESS
+ 00650 rgoto TIA_MIDI_GETASSIGNEDVOICEx_End
+ 00651 TIA_MIDI_GETASSIGNEDVOICEx_LOff
+ 00652 bcf TMP5, FLAG_Vx ; don't play voice
+ 00653 TIA_MIDI_GETASSIGNEDVOICEx_End
+ 00654 ENDM
+ 00655
+516A 00656 TIA_MIDI_GetAssignedVoices
+ 00657 TIA_MIDI_GETASSIGNEDVOICEx 0, TIA_V1_BASE
+ M LOCAL TIA_MIDI_GETASSIGNEDVOICEx_LOk
+ M LOCAL TIA_MIDI_GETASSIGNEDVOICEx_LOff
+ M LOCAL TIA_MIDI_GETASSIGNEDVOICEx_End
+ M
+ M ;; handle split points
+516A 5121 M movf TIA_Vx_BASE + TIA_Vx_SPLIT_LOWER, W, BANKED ; (don't split if 0)
+516C 1122 M iorwf TIA_Vx_BASE + TIA_Vx_SPLIT_UPPER, W, BANKED
+516E E008 M bz TIA_MIDI_GETASSIGNEDVOICEx_End
+ M
+5170 5121 M movf TIA_Vx_BASE + TIA_Vx_SPLIT_LOWER, W, BANKED
+5172 6004 M cpfslt MIOS_PARAMETER2, ACCESS
+ M rgoto TIA_MIDI_GETASSIGNEDVOICEx_LOk
+5174 D001 M bra label
+ M rgoto TIA_MIDI_GETASSIGNEDVOICEx_LOff
+5176 D003 M bra label
+ M
+5178 M TIA_MIDI_GETASSIGNEDVOICEx_LOk
+5178 5122 M movf TIA_Vx_BASE + TIA_Vx_SPLIT_UPPER, W, BANKED
+517A 6404 M cpfsgt MIOS_PARAMETER2, ACCESS
+ M rgoto TIA_MIDI_GETASSIGNEDVOICEx_End
+517C D001 M bra label
+517E M TIA_MIDI_GETASSIGNEDVOICEx_LOff
+517E 900A M bcf TMP5, FLAG_Vx ; don't play voice
+5180 M TIA_MIDI_GETASSIGNEDVOICEx_End
+ 00658 TIA_MIDI_GETASSIGNEDVOICEx 1, TIA_V2_BASE
+ M LOCAL TIA_MIDI_GETASSIGNEDVOICEx_LOk
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 168
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ M LOCAL TIA_MIDI_GETASSIGNEDVOICEx_LOff
+ M LOCAL TIA_MIDI_GETASSIGNEDVOICEx_End
+ M
+ M ;; handle split points
+5180 5161 M movf TIA_Vx_BASE + TIA_Vx_SPLIT_LOWER, W, BANKED ; (don't split if 0)
+5182 1162 M iorwf TIA_Vx_BASE + TIA_Vx_SPLIT_UPPER, W, BANKED
+5184 E008 M bz TIA_MIDI_GETASSIGNEDVOICEx_End
+ M
+5186 5161 M movf TIA_Vx_BASE + TIA_Vx_SPLIT_LOWER, W, BANKED
+5188 6004 M cpfslt MIOS_PARAMETER2, ACCESS
+ M rgoto TIA_MIDI_GETASSIGNEDVOICEx_LOk
+518A D001 M bra label
+ M rgoto TIA_MIDI_GETASSIGNEDVOICEx_LOff
+518C D003 M bra label
+ M
+518E M TIA_MIDI_GETASSIGNEDVOICEx_LOk
+518E 5162 M movf TIA_Vx_BASE + TIA_Vx_SPLIT_UPPER, W, BANKED
+5190 6404 M cpfsgt MIOS_PARAMETER2, ACCESS
+ M rgoto TIA_MIDI_GETASSIGNEDVOICEx_End
+5192 D001 M bra label
+5194 M TIA_MIDI_GETASSIGNEDVOICEx_LOff
+5194 920A M bcf TMP5, FLAG_Vx ; don't play voice
+5196 M TIA_MIDI_GETASSIGNEDVOICEx_End
+5196 500A 00659 movf TMP5, W
+5198 0012 00660 return
+ 00661
+ 00662 ;; ------------------------------------------------------------------
+ 00663 ;; for Note On/Off in Mono mode
+ 00664 ;; note number in MIOS_PARAMETER2
+ 00665 ;; result will be ANDed to TMP5 --- TIA_MIDI_GetAssignedChannels should be called before!
+ 00666 TIA_MIDI_GETASSIGNEDKEYx MACRO FLAG_Vx, TIA_Vx_BASE
+ 00667 LOCAL TIA_MIDI_GETASSIGNEDKEYx_LOk
+ 00668 LOCAL TIA_MIDI_GETASSIGNEDKEYx_LOff
+ 00669 LOCAL TIA_MIDI_GETASSIGNEDKEYx_End
+ 00670
+ 00671 btfsc TIA_Vx_BASE + TIA_Vx_MODE, Vx_MODE_KEY_EXTENDED, BANKED
+ 00672 rgoto TIA_MIDI_GETASSIGNEDKEYx_End
+ 00673
+ 00674 movf TIA_Vx_BASE + TIA_Vx_KEY_OFFSET, W, BANKED
+ 00675 cpfslt MIOS_PARAMETER2, ACCESS
+ 00676 rgoto TIA_MIDI_GETASSIGNEDKEYx_LOk
+ 00677 rgoto TIA_MIDI_GETASSIGNEDKEYx_LOff
+ 00678
+ 00679 TIA_MIDI_GETASSIGNEDKEYx_LOk
+ 00680 movlw 0x1f
+ 00681 cpfsgt TIA_Vx_BASE + TIA_Vx_KEY_LENGTH, BANKED
+ 00682 movf TIA_Vx_BASE + TIA_Vx_KEY_LENGTH, W, BANKED
+ 00683 addwf TIA_Vx_BASE + TIA_Vx_KEY_OFFSET, W, BANKED
+ 00684 cpfsgt MIOS_PARAMETER2, ACCESS
+ 00685 rgoto TIA_MIDI_GETASSIGNEDKEYx_End
+ 00686 TIA_MIDI_GETASSIGNEDKEYx_LOff
+ 00687 bcf TMP5, FLAG_Vx ; don't play voice
+ 00688 TIA_MIDI_GETASSIGNEDKEYx_End
+ 00689 ENDM
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 169
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00690
+519A 00691 TIA_MIDI_GetAssignedKeys
+ 00692 TIA_MIDI_GETASSIGNEDKEYx 0, TIA_V1_BASE
+ M LOCAL TIA_MIDI_GETASSIGNEDKEYx_LOk
+ M LOCAL TIA_MIDI_GETASSIGNEDKEYx_LOff
+ M LOCAL TIA_MIDI_GETASSIGNEDKEYx_End
+ M
+519A B724 M btfsc TIA_Vx_BASE + TIA_Vx_MODE, Vx_MODE_KEY_EXTENDED, BANKED
+ M rgoto TIA_MIDI_GETASSIGNEDKEYx_End
+519C D00B M bra label
+ M
+519E 5125 M movf TIA_Vx_BASE + TIA_Vx_KEY_OFFSET, W, BANKED
+51A0 6004 M cpfslt MIOS_PARAMETER2, ACCESS
+ M rgoto TIA_MIDI_GETASSIGNEDKEYx_LOk
+51A2 D001 M bra label
+ M rgoto TIA_MIDI_GETASSIGNEDKEYx_LOff
+51A4 D006 M bra label
+ M
+51A6 M TIA_MIDI_GETASSIGNEDKEYx_LOk
+51A6 0E1F M movlw 0x1f
+51A8 6526 M cpfsgt TIA_Vx_BASE + TIA_Vx_KEY_LENGTH, BANKED
+51AA 5126 M movf TIA_Vx_BASE + TIA_Vx_KEY_LENGTH, W, BANKED
+51AC 2525 M addwf TIA_Vx_BASE + TIA_Vx_KEY_OFFSET, W, BANKED
+51AE 6404 M cpfsgt MIOS_PARAMETER2, ACCESS
+ M rgoto TIA_MIDI_GETASSIGNEDKEYx_End
+51B0 D001 M bra label
+51B2 M TIA_MIDI_GETASSIGNEDKEYx_LOff
+51B2 900A M bcf TMP5, FLAG_Vx ; don't play voice
+51B4 M TIA_MIDI_GETASSIGNEDKEYx_End
+ 00693 TIA_MIDI_GETASSIGNEDKEYx 1, TIA_V2_BASE
+ M LOCAL TIA_MIDI_GETASSIGNEDKEYx_LOk
+ M LOCAL TIA_MIDI_GETASSIGNEDKEYx_LOff
+ M LOCAL TIA_MIDI_GETASSIGNEDKEYx_End
+ M
+51B4 B764 M btfsc TIA_Vx_BASE + TIA_Vx_MODE, Vx_MODE_KEY_EXTENDED, BANKED
+ M rgoto TIA_MIDI_GETASSIGNEDKEYx_End
+51B6 D00B M bra label
+ M
+51B8 5165 M movf TIA_Vx_BASE + TIA_Vx_KEY_OFFSET, W, BANKED
+51BA 6004 M cpfslt MIOS_PARAMETER2, ACCESS
+ M rgoto TIA_MIDI_GETASSIGNEDKEYx_LOk
+51BC D001 M bra label
+ M rgoto TIA_MIDI_GETASSIGNEDKEYx_LOff
+51BE D006 M bra label
+ M
+51C0 M TIA_MIDI_GETASSIGNEDKEYx_LOk
+51C0 0E1F M movlw 0x1f
+51C2 6566 M cpfsgt TIA_Vx_BASE + TIA_Vx_KEY_LENGTH, BANKED
+51C4 5166 M movf TIA_Vx_BASE + TIA_Vx_KEY_LENGTH, W, BANKED
+51C6 2565 M addwf TIA_Vx_BASE + TIA_Vx_KEY_OFFSET, W, BANKED
+51C8 6404 M cpfsgt MIOS_PARAMETER2, ACCESS
+ M rgoto TIA_MIDI_GETASSIGNEDKEYx_End
+51CA D001 M bra label
+51CC M TIA_MIDI_GETASSIGNEDKEYx_LOff
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 170
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+51CC 920A M bcf TMP5, FLAG_Vx ; don't play voice
+51CE M TIA_MIDI_GETASSIGNEDKEYx_End
+51CE 500A 00694 movf TMP5, W
+51D0 0012 00695 return
+ 00696
+ 00697
+ 00698 ;; ------------------------------------------------------------------
+ 00699 ;; arpeggiator sorter
+ 00700 ;; expecting base pointer to voice record in FSR2
+51D2 00701 TIA_MIDI_Arp_Sorter
+ 00702 ;; TIA_Vx_ARP_NOTE_0 -> FSR0
+51D2 CFDA FFEA 00703 movff FSR2H, FSR0H
+51D6 50D9 00704 movf FSR2L, W
+51D8 0F1E 00705 addlw TIA_Vx_ARP_NOTE_0
+51DA 6EE9 00706 movwf FSR0L
+ 00707
+ 00708 ;; TIA_Vx_NOTE_STACK_0 -> FSR1
+51DC CFDA FFE2 00709 movff FSR2H, FSR1H
+51E0 50D9 00710 movf FSR2L, W
+51E2 0F22 00711 addlw TIA_Vx_NOTE_STACK_0
+51E4 6EE1 00712 movwf FSR1L
+ 00713
+51E6 CFE9 F006 00714 movff FSR0L, TMP1 ; save pointer to ARP_NOTE_0 in TMP1
+ 00715 ;; clear all current entries
+51EA 6AEE 00716 clrf POSTINC0 ; (TIA_Vx_ARP_NOTE_0)
+51EC 6AEE 00717 clrf POSTINC0 ; (TIA_Vx_ARP_NOTE_1)
+51EE 6AEE 00718 clrf POSTINC0 ; (TIA_Vx_ARP_NOTE_2)
+51F0 6AEE 00719 clrf POSTINC0 ; (TIA_Vx_ARP_NOTE_3)
+51F2 C006 FFE9 00720 movff TMP1, FSR0L ; restore pointer to ARP_NOTE_0 from TMP1
+ 00721
+51F6 50E7 00722 movf INDF1, W ; (TIA_Vx_NOTE_STACK_0)
+51F8 E017 00723 bz TIA_MIDI_Arp_Sorter_End
+ 00724
+51FA 50E6 00725 movf POSTINC1, W ; (TIA_Vx_NOTE_STACK_0)
+51FC D816 00726 rcall TIA_MIDI_ARP_Sorter_Add
+51FE 50E6 00727 movf POSTINC1, W ; (TIA_Vx_NOTE_STACK_1)
+5200 D814 00728 rcall TIA_MIDI_ARP_Sorter_Add
+5202 50E6 00729 movf POSTINC1, W ; (TIA_Vx_NOTE_STACK_2)
+5204 D812 00730 rcall TIA_MIDI_ARP_Sorter_Add
+5206 50E6 00731 movf POSTINC1, W ; (TIA_Vx_NOTE_STACK_3)
+5208 D810 00732 rcall TIA_MIDI_ARP_Sorter_Add
+ 00733
+ 00734 ;; if rate is > 0, and arp has been reset: copy first arp note into TIA_Vx_NOTE
+520A 0E13 00735 movlw TIA_Vx_ARP_RATE
+520C 50DB 00736 movf PLUSW2, W
+520E E00C 00737 bz TIA_MIDI_Arp_Sorter_End
+5210 0E15 00738 movlw TIA_Vx_ARP_CTR
+5212 50DB 00739 movf PLUSW2, W
+5214 E109 00740 bnz TIA_MIDI_Arp_Sorter_End
+5216 0E14 00741 movlw TIA_Vx_ARP_NOTE_NUMBER
+5218 50DB 00742 movf PLUSW2, W
+521A E106 00743 bnz TIA_MIDI_Arp_Sorter_End
+ 00744
+521C 0E1E 00745 movlw TIA_Vx_ARP_NOTE_0
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 171
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+521E CFDB FFF5 00746 movff PLUSW2, TABLAT
+5222 0E10 00747 movlw TIA_Vx_NOTE
+5224 CFF5 FFDB 00748 movff TABLAT, PLUSW2
+ 00749
+5228 00750 TIA_MIDI_Arp_Sorter_End
+5228 0012 00751 return
+ 00752
+ 00753 ;; ---
+ 00754 ;; add to ARP note buffer, sort automatically from lowest to highest note
+522A 00755 TIA_MIDI_ARP_Sorter_Add
+522A B4D8 00756 skpnz ; only add notes > 0
+522C 0012 00757 return
+ 00758
+522E 6E06 00759 movwf TMP1 ; store new note number in TMP2
+5230 6A07 00760 clrf TMP2 ; TMP2 used as loop counter
+5232 00761 TIA_MIDI_ARP_Sorter_Loop
+5232 5007 00762 movf TMP2, W
+5234 50EB 00763 movf PLUSW0, W
+5236 E006 00764 bz TIA_MIDI_ARP_Sorter_Push; the fourth note will ever be pushed as the appr. byte is zero
+5238 5C06 00765 subwf TMP1, W
+523A E304 00766 bnc TIA_MIDI_ARP_Sorter_Push
+523C 2A07 00767 incf TMP2, F
+ 00768 BRA_IFCLR TMP2, 2, ACCESS, TIA_MIDI_ARP_Sorter_Loop
+523E A407 M btfss reg, bit, reg_a
+5240 D7F8 M bra label
+5242 0012 00769 return ; this case never happens
+ 00770
+5244 00771 TIA_MIDI_ARP_Sorter_Push
+5244 5007 00772 movf TMP2, W ; fourth note: no shift required
+5246 0A03 00773 xorlw 0x03
+5248 E00D 00774 bz TIA_MIDI_ARP_Sorter_PushN
+524A 0E02 00775 movlw 0x02
+524C 6E08 00776 movwf TMP3
+524E 00777 TIA_MIDI_ARP_Sorter_PushL
+524E 5008 00778 movf TMP3, W
+5250 CFEB F009 00779 movff PLUSW0, TMP4
+5254 0F01 00780 addlw 1
+5256 C009 FFEB 00781 movff TMP4, PLUSW0
+525A 5007 00782 movf TMP2, W
+525C 1808 00783 xorwf TMP3, W
+525E E002 00784 bz TIA_MIDI_ARP_Sorter_PushN
+5260 0608 00785 decf TMP3, F
+ 00786 rgoto TIA_MIDI_ARP_Sorter_PushL
+5262 D7F5 M bra label
+ 00787
+5264 00788 TIA_MIDI_ARP_Sorter_PushN
+5264 5007 00789 movf TMP2, W
+5266 C006 FFEB 00790 movff TMP1, PLUSW0
+526A 0012 00791 return
+ 00405 #include "tia_sysex.inc"
+ 00001 ; $Id: tia_sysex.inc bdupeyron.tech@gmail.com(Antichambre)
+ 00002 ;
+ 00003 ; MIDIbox TIA SysEx Parser
+ 00004 ;
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 172
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00005 ; ==========================================================================
+ 00006 ;
+ 00007 ; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
+ 00008 ; Licensed for personal non-commercial use only.
+ 00009 ; All other rights reserved.
+ 00010 ;
+ 00011 ; ==========================================================================
+ 00012
+ 00000007 00013 TIA_SYSEX_STATE_MYSYSEX EQU 7
+ 00000006 00014 TIA_SYSEX_STATE_ACTION EQU 6
+ 00015
+ 00000005 00016 TIA_SYSEX_STATE_PRESET_RECEIVED EQU 5 ; used by Action PATCH_[Read/Write]
+ 00000004 00017 TIA_SYSEX_STATE_BANK_RECEIVED EQU 4 ; used by Action PATCH_[Read/Write]
+ 00000003 00018 TIA_SYSEX_STATE_TYPE_RECEIVED EQU 3 ; used by Action PATCH_[Read/Write]
+ 00000002 00019 TIA_SYSEX_STATE_WAIT_CHECKSUM EQU 2 ; used by Action PATCH_Write
+ 00020
+ 00000005 00021 TIA_SYSEX_STATE_AH_RECEIVED EQU 5 ; used by Action PAR_[Read/Write]
+ 00000004 00022 TIA_SYSEX_STATE_AL_RECEIVED EQU 4 ; used by Action PAR_[Read/Write]
+ 00000003 00023 TIA_SYSEX_STATE_D_RECEIVED EQU 3 ; used by Action PAR_[Write]
+ 00024
+ 00000005 00025 TIA_SYSEX_STATE_A_RECEIVED EQU 5 ; used by Action CFG_[Read/Write]
+ 00000001 00026 TIA_SYSEX_STATE_DH_RECEIVED EQU 1 ; used by Action CFG_[Read/Write]
+ 00000000 00027 TIA_SYSEX_STATE_DL_RECEIVED EQU 0 ; used by Action CFG_[Read/Write]
+ 00028
+ 00029 ;; --------------------------------------------------------------------------
+ 00030 ;; This sysex parser waits for the TIA Header
+ 00031 ;; --------------------------------------------------------------------------
+526C 00032 TIA_SYSEX_SysExCheck
+ 00033 ;; store received byte in TIA_SYSEX_IN
+526C 6E23 00034 movwf TIA_SYSEX_IN
+ 00035
+ 00036 ;; ignore realtime messages
+526E 0EF8 00037 movlw 0xf8
+5270 6023 00038 cpfslt TIA_SYSEX_IN, ACCESS
+5272 0012 00039 return
+ 00040
+ 00041 ;; check sysex state
+ 00042 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_MYSYSEX, ACCESS, TIA_SYSEX_Handler
+5274 BE21 M btfsc reg, bit, reg_a
+5276 D020 M bra label
+ 00043
+5278 5021 00044 movf TIA_SYSEX_STATE, W
+527A D80E 00045 rcall TIA_SYSEX_SysExHeaderGet
+527C 6223 00046 cpfseq TIA_SYSEX_IN, ACCESS
+ 00047 rgoto TIA_SYSEX_SysExCheckFailed
+527E D00A M bra label
+5280 2A21 00048 incf TIA_SYSEX_STATE, F
+5282 5021 00049 movf TIA_SYSEX_STATE, W
+5284 0B07 00050 andlw 0x07
+5286 0A06 00051 xorlw 0x06 ; wait for 6 bytes (f0 00 00 7E 46 <device-id>)
+5288 E106 00052 bnz TIA_SYSEX_SysExCheckOk
+ 00053
+ 00054 ;; SysEx ID received, lets go
+528A 0E80 00055 movlw (1 << TIA_SYSEX_STATE_MYSYSEX)
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 173
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+528C 6E21 00056 movwf TIA_SYSEX_STATE
+528E EC28 F016 00057 call MIOS_MPROC_MergerDisable
+ 00058 rgoto TIA_SYSEX_SysExCheckOk
+5292 D001 M bra label
+ 00059
+5294 00060 TIA_SYSEX_SysExCheckFailed
+ 00061 ;; reset the sysex counter and action ID
+5294 D80B 00062 rcall TIA_SYSEX_ActionInvalid
+5296 00063 TIA_SYSEX_SysExCheckOk
+ 00064
+5296 00065 TIA_SYSEX_SysExCheck_End
+5296 0012 00066 return
+ 00067
+ 00068 ; ==========================================================================
+ 00069
+ 00070 ;; --------------------------------------------------------------------------
+ 00071 ;; Returns expected MIDI bytes from SysEx header
+ 00072 ;; --------------------------------------------------------------------------
+5298 00073 TIA_SYSEX_SysExHeaderGet
+5298 0B07 00074 andlw 0x07
+ 00075 JUMPTABLE_2BYTES_UNSECURE
+529A ECC8 F016 M call MIOS_HLP_GetIndex_2bytes
+529E 0CF0 00076 retlw 0xf0
+52A0 0C00 00077 retlw 0x00 ; Vendor ID
+52A2 0C00 00078 retlw 0x00
+52A4 0C7E 00079 retlw 0x7e
+52A6 0C51 00080 retlw 0x51 ; MIDIbox TIA ID (51 - the ultimative number + 4)
+52A8 5020 00081 movf TIA_MIDI_DEVICE, W
+52AA 0012 00082 return
+ 00083
+ 00084 ;; --------------------------------------------------------------------------
+ 00085 ;; Action Invalid will be invoked when receiving an invalid sequence
+ 00086 ;; --------------------------------------------------------------------------
+52AC 00087 TIA_SYSEX_ActionInvalid
+ 00088
+ 00089 ;; --------------------------------------------------------------------------
+ 00090 ;; Action finished will be invoked when midi action is done
+ 00091 ;; --------------------------------------------------------------------------
+52AC 00092 TIA_SYSEX_ActionFinished
+52AC 6A21 00093 clrf TIA_SYSEX_STATE
+52AE 6A22 00094 clrf TIA_SYSEX_ACTION
+ 00095 ;; reinit patch if engine has been disabled during upload
+52B0 9010 00096 bcf TIA_STAT, TIA_STAT_ENGINE_DISABLE
+ 00097
+52B2 EC2A F016 00098 call MIOS_MPROC_MergerEnable
+ 00099 rgoto TIA_SYSEX_SysExCheck_End
+52B6 D7EF M bra label
+ 00100
+ 00101
+ 00102 ;; --------------------------------------------------------------------------
+ 00103 ;; MIDI Check action: perform a sysex action
+ 00104 ;; --------------------------------------------------------------------------
+52B8 00105 TIA_SYSEX_Handler
+ 00106 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_ACTION, ACCESS, TIA_SYSEX_Handler_DoAction
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 174
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+52B8 BC21 M btfsc reg, bit, reg_a
+52BA D005 M bra label
+ 00107
+52BC 8C21 00108 bsf TIA_SYSEX_STATE, TIA_SYSEX_STATE_ACTION
+ 00109
+52BE C023 F022 00110 movff TIA_SYSEX_IN, TIA_SYSEX_ACTION ; store action ID
+52C2 D81A 00111 rcall TIA_SYSEX_Handler_InitAction ; initialize the action
+ 00112 rgoto TIA_SYSEX_SysExCheck_End ; branch to the end
+52C4 D7E8 M bra label
+ 00113
+ 00114 ;; ---
+ 00115
+52C6 00116 TIA_SYSEX_Handler_DoAction
+ 00117 ;; branch to end if status byte (i.e. F7)
+ 00118 BRA_IFSET TIA_SYSEX_IN, 7, ACCESS, TIA_SYSEX_Handler_EndAction
+52C6 BE23 M btfsc reg, bit, reg_a
+52C8 D02E M bra label
+ 00119
+ 00120 ;; branch depending on current action ID
+52CA 5022 00121 movf TIA_SYSEX_ACTION, W
+ 00122 JUMPTABLE_2BYTES 16 ; 16 entries
+52CC 0FF0 M addlw -(max_value) ; ensure that jump index is not greater than (max_value-1)
+52CE B0D8 M skpnc
+52D0 0EF0 M movlw -(max_value)
+52D2 0F10 M addlw max_value
+52D4 ECC8 F016 M call MIOS_HLP_GetIndex_2bytes
+ 00123 rgoto TIA_SYSEX_ActionInvalid
+52D8 D7E9 M bra label
+ 00124 rgoto TIA_SYSEX_Action_PRESET_Read
+52DA D040 M bra label
+ 00125 rgoto TIA_SYSEX_Action_PRESET_Write
+52DC D093 M bra label
+ 00126 rgoto TIA_SYSEX_Action_BANK_Read
+52DE D130 M bra label
+ 00127 rgoto TIA_SYSEX_Action_BANK_WriteName
+52E0 D194 M bra label
+ 00128 rgoto TIA_SYSEX_Action_PAR_Read
+52E2 D1E3 M bra label
+ 00129 rgoto TIA_SYSEX_Action_PAR_Write
+52E4 D213 M bra label
+ 00130 rgoto TIA_SYSEX_ActionInvalid
+52E6 D7E2 M bra label
+ 00131 rgoto TIA_SYSEX_ActionInvalid
+52E8 D7E1 M bra label
+ 00132 rgoto TIA_SYSEX_ActionInvalid
+52EA D7E0 M bra label
+ 00133 rgoto TIA_SYSEX_ActionInvalid
+52EC D7DF M bra label
+ 00134 rgoto TIA_SYSEX_Action_BANK_Sel
+52EE D244 M bra label
+ 00135 rgoto TIA_SYSEX_Action_CFG_Read
+52F0 D25C M bra label
+ 00136 rgoto TIA_SYSEX_Action_CFG_Write
+52F2 D2E9 M bra label
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 175
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00137 rgoto TIA_SYSEX_Action_RequestCC
+52F4 D319 M bra label
+ 00138 rgoto TIA_SYSEX_Action_Ping
+52F6 D31C M bra label
+ 00139
+ 00140
+ 00141 ;; --------------------------------------------------------------------------
+ 00142 ;; Initialize an action depending on TIA_SYSEX_ACTION
+ 00143 ;; --------------------------------------------------------------------------
+52F8 00144 TIA_SYSEX_Handler_InitAction
+52F8 5022 00145 movf TIA_SYSEX_ACTION, W
+ 00146 JUMPTABLE_2BYTES 16 ; 16 entries
+52FA 0FF0 M addlw -(max_value) ; ensure that jump index is not greater than (max_value-1)
+52FC B0D8 M skpnc
+52FE 0EF0 M movlw -(max_value)
+5300 0F10 M addlw max_value
+5302 ECC8 F016 M call MIOS_HLP_GetIndex_2bytes
+ 00147 rgoto TIA_SYSEX_ActionInvalid
+5306 D7D2 M bra label
+ 00148 rgoto TIA_SYSEX_Init_PRESET_Read
+5308 D028 M bra label
+ 00149 rgoto TIA_SYSEX_Init_PRESET_Write
+530A D078 M bra label
+ 00150 rgoto TIA_SYSEX_Init_BANK_Read
+530C D115 M bra label
+ 00151 rgoto TIA_SYSEX_Init_BANK_WriteName
+530E D17C M bra label
+ 00152 rgoto TIA_SYSEX_Init_PAR_Read
+5310 D1CB M bra label
+ 00153 rgoto TIA_SYSEX_Init_PAR_Write
+5312 D1FB M bra label
+ 00154 rgoto TIA_SYSEX_ActionInvalid
+5314 D7CB M bra label
+ 00155 rgoto TIA_SYSEX_ActionInvalid
+5316 D7CA M bra label
+ 00156 rgoto TIA_SYSEX_ActionInvalid
+5318 D7C9 M bra label
+ 00157 rgoto TIA_SYSEX_ActionInvalid
+531A D7C8 M bra label
+ 00158 rgoto TIA_SYSEX_Init_BANK_Sel
+531C D22B M bra label
+ 00159 rgoto TIA_SYSEX_Init_CFG_Read
+531E D244 M bra label
+ 00160 rgoto TIA_SYSEX_Init_CFG_Write
+5320 D2D0 M bra label
+ 00161 rgoto TIA_SYSEX_Init_RequestCC
+5322 D301 M bra label
+ 00162 rgoto TIA_SYSEX_Init_Ping
+5324 D304 M bra label
+ 00163
+ 00164
+ 00165 ;; --------------------------------------------------------------------------
+ 00166 ;; Finish an action depending on TIA_SYSEX_ACTION
+ 00167 ;; --------------------------------------------------------------------------
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 176
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+5326 00168 TIA_SYSEX_Handler_EndAction
+ 00169 ;; if sysex footer (F7) has not been received here, action is invalid!
+5326 0EF7 00170 movlw 0xf7
+5328 1823 00171 xorwf TIA_SYSEX_IN, W
+532A E1C0 00172 bnz TIA_SYSEX_ActionInvalid
+ 00173
+ 00174 ;; else finish action
+532C 5022 00175 movf TIA_SYSEX_ACTION, W
+ 00176 JUMPTABLE_2BYTES 16 ; 16 entries
+532E 0FF0 M addlw -(max_value) ; ensure that jump index is not greater than (max_value-1)
+5330 B0D8 M skpnc
+5332 0EF0 M movlw -(max_value)
+5334 0F10 M addlw max_value
+5336 ECC8 F016 M call MIOS_HLP_GetIndex_2bytes
+ 00177 rgoto TIA_SYSEX_ActionInvalid
+533A D7B8 M bra label
+ 00178 rgoto TIA_SYSEX_End_PRESET_Read
+533C D022 M bra label
+ 00179 rgoto TIA_SYSEX_End_PRESET_Write
+533E D09E M bra label
+ 00180 rgoto TIA_SYSEX_End_BANK_Read
+5340 D10C M bra label
+ 00181 rgoto TIA_SYSEX_End_BANK_WriteName
+5342 D17C M bra label
+ 00182 rgoto TIA_SYSEX_End_PAR_Read
+5344 D1C1 M bra label
+ 00183 rgoto TIA_SYSEX_End_PAR_Write
+5346 D1F7 M bra label
+ 00184 rgoto TIA_SYSEX_ActionInvalid
+5348 D7B1 M bra label
+ 00185 rgoto TIA_SYSEX_ActionInvalid
+534A D7B0 M bra label
+ 00186 rgoto TIA_SYSEX_ActionInvalid
+534C D7AF M bra label
+ 00187 rgoto TIA_SYSEX_ActionInvalid
+534E D7AE M bra label
+ 00188 rgoto TIA_SYSEX_End_BANK_Sel
+5350 D216 M bra label
+ 00189 rgoto TIA_SYSEX_End_CFG_Read
+5352 D232 M bra label
+ 00190 rgoto TIA_SYSEX_End_CFG_Write
+5354 D2CC M bra label
+ 00191 rgoto TIA_SYSEX_End_RequestCC
+5356 D2E9 M bra label
+ 00192 rgoto TIA_SYSEX_End_Ping
+5358 D2EC M bra label
+ 00193
+ 00194 ;; --------------------------------------------------------------------------
+ 00195 ;; MIDI Action: Patch Read
+ 00196 ;; --------------------------------------------------------------------------
+535A 00197 TIA_SYSEX_Init_PRESET_Read
+535A 0012 00198 return
+ 00199
+535C 00200 TIA_SYSEX_Action_PRESET_Read
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 177
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00201 ;; receive <type> <bank> <patch> F7
+535C 00202 TIA_SYSEX_Action_PRESET_Read_T
+ 00203 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_TYPE_RECEIVED, ACCESS, TIA_SYSEX_Action_PRESET_Read_B
+535C B621 M btfsc reg, bit, reg_a
+535E D004 M bra label
+5360 8621 00204 bsf TIA_SYSEX_STATE, TIA_SYSEX_STATE_TYPE_RECEIVED
+5362 C023 F025 00205 movff TIA_SYSEX_IN, TIA_SYSEX_ADDRESS ; load preset type
+ 00206 rgoto TIA_SYSEX_SysExCheck_End ; wait for next byte
+5366 D797 M bra label
+ 00207
+5368 00208 TIA_SYSEX_Action_PRESET_Read_B
+ 00209 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_BANK_RECEIVED, ACCESS, TIA_SYSEX_Action_PRESET_Read_P
+5368 B821 M btfsc reg, bit, reg_a
+536A D004 M bra label
+536C 8821 00210 bsf TIA_SYSEX_STATE, TIA_SYSEX_STATE_BANK_RECEIVED
+536E C023 F011 00211 movff TIA_SYSEX_IN, TIA_BANK ; load bank
+ 00212 rgoto TIA_SYSEX_SysExCheck_End ; wait for next byte
+5372 D791 M bra label
+ 00213
+5374 00214 TIA_SYSEX_Action_PRESET_Read_P
+ 00215 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_PRESET_RECEIVED, ACCESS, TIA_SYSEX_Action_PRESET_ReadStall
+5374 BA21 M btfsc reg, bit, reg_a
+5376 D004 M bra label
+5378 8A21 00216 bsf TIA_SYSEX_STATE, TIA_SYSEX_STATE_PRESET_RECEIVED
+537A C023 F012 00217 movff TIA_SYSEX_IN, TIA_PRESET ; load preset
+ 00218 rgoto TIA_SYSEX_SysExCheck_End ; wait for next byte
+537E D78B M bra label
+ 00219
+5380 00220 TIA_SYSEX_Action_PRESET_ReadStall
+ 00221 ;; do nothing until sysex footer (F7) has been received
+ 00222 rgoto TIA_SYSEX_SysExCheck_End
+5380 D78A M bra label
+ 00223
+5382 00224 TIA_SYSEX_End_PRESET_Read
+ 00225 ;; action invalid if patch number has not been received
+ 00226 BRA_IFCLR TIA_SYSEX_STATE, TIA_SYSEX_STATE_PRESET_RECEIVED, ACCESS, TIA_SYSEX_ActionInvalid
+5382 AA21 M btfss reg, bit, reg_a
+5384 D793 M bra label
+ 00227
+5386 C011 F007 00228 movff TIA_BANK, TMP2 ;; store relative bank
+538A 5025 00229 movf TIA_SYSEX_ADDRESS, W
+538C DB29 00230 rcall TIA_SYSEX_Hlp_GetAbsoluteBank ; set bank to absolute
+538E 6E26 00231 movwf TIA_SYSEX_ERROR
+5390 E10F 00232 bnz TIA_SYSEX_End_PRESET_Read_Cont
+ 00233
+5392 5012 00234 movf TIA_PRESET, W
+5394 E00D 00235 bz TIA_SYSEX_End_PRESET_Read_Cont
+5396 5011 00236 movf TIA_BANK, W
+5398 EC8F F01C 00237 call TIA_BANK_GetBankStickReady
+539C A4D8 00238 skpz
+ 00239 rgoto TIA_SYSEX_End_PRESET_Read_Size
+539E D003 M bra label
+ 00240 ;; BS not ready Error #3
+53A0 0E03 00241 movlw 0x03
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 178
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+53A2 6E26 00242 movwf TIA_SYSEX_ERROR
+ 00243 rgoto TIA_SYSEX_End_PRESET_Read_Cont
+53A4 D005 M bra label
+53A6 00244 TIA_SYSEX_End_PRESET_Read_Size
+53A6 EC9C F01C 00245 call TIA_BANK_GetBankStickSize
+53AA E102 00246 bnz TIA_SYSEX_End_PRESET_Read_Cont
+ 00247
+53AC BC12 00248 btfsc TIA_PRESET, 6
+53AE 6A12 00249 clrf TIA_PRESET
+ 00250
+53B0 00251 TIA_SYSEX_End_PRESET_Read_Cont
+ 00252
+ 00253 ;; send SysEx header
+53B0 DAC8 00254 rcall TIA_SYSEX_Send_SysExHeader
+ 00255
+ 00256 ;; Send PRESET_Read ID
+53B2 0E01 00257 movlw 0x01
+53B4 EC24 F016 00258 call MIOS_MIDI_TxBufferPut
+ 00259
+ 00260 ;; send requested preset type number
+53B8 5025 00261 movf TIA_SYSEX_ADDRESS, W
+53BA 0B7F 00262 andlw 0x7f
+53BC EC24 F016 00263 call MIOS_MIDI_TxBufferPut
+ 00264
+ 00265 ;; send requested relative bank number
+53C0 5007 00266 movf TMP2, W
+53C2 0B1F 00267 andlw 0x1f
+53C4 EC24 F016 00268 call MIOS_MIDI_TxBufferPut
+ 00269
+ 00270 ;; send requested preset number
+53C8 5012 00271 movf TIA_PRESET, W
+53CA 0B7F 00272 andlw 0x7f
+53CC EC24 F016 00273 call MIOS_MIDI_TxBufferPut
+ 00274
+53D0 5026 00275 movf TIA_SYSEX_ERROR, W
+53D2 E004 00276 bz TIA_SYSEX_End_PRESET_Read_Cont_Ok
+53D4 0B7F 00277 andlw 0x7f
+53D6 EC24 F016 00278 call MIOS_MIDI_TxBufferPut
+ 00279 rgoto TIA_SYSEX_End_PRESET_Read_Footer
+53DA D00D M bra label
+ 00280
+53DC 00281 TIA_SYSEX_End_PRESET_Read_Cont_Ok
+ 00282 ;; clear checksum
+53DC 6A24 00283 clrf TIA_SYSEX_CHECKSUM
+ 00284
+53DE 5025 00285 movf TIA_SYSEX_ADDRESS, W
+53E0 DAFF 00286 rcall TIA_SYSEX_Hlp_GetAbsoluteBank ; set bank to absolute
+ 00287
+53E2 5025 00288 movf TIA_SYSEX_ADDRESS, W
+53E4 E102 00289 bnz TIA_SYSEX_End_PRESET_Read_Cont_WTKit
+ 00290 ;; send patch (128 bytes)
+53E6 00291 TIA_SYSEX_End_PRESET_Read_Cont_Patch
+53E6 DACB 00292 rcall TIA_SYSEX_Hlp_SendPreset
+ 00293 rgoto TIA_SYSEX_End_PRESET_Read_Cont_ChkSum
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 179
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+53E8 D001 M bra label
+ 00294
+53EA 00295 TIA_SYSEX_End_PRESET_Read_Cont_WTKit
+53EA DADE 00296 rcall TIA_SYSEX_Hlp_SendWTKit
+ 00297
+53EC 00298 TIA_SYSEX_End_PRESET_Read_Cont_ChkSum
+ 00299 ;; send checksum
+53EC 5024 00300 movf TIA_SYSEX_CHECKSUM, W
+53EE 0880 00301 sublw 0x80
+53F0 0B7F 00302 andlw 0x7f
+53F2 EC24 F016 00303 call MIOS_MIDI_TxBufferPut
+ 00304
+53F6 00305 TIA_SYSEX_End_PRESET_Read_Footer
+ 00306 ;; send of SysEx footer
+53F6 0E01 00307 movlw 0x01 ; (independend from merger state)
+53F8 DAB7 00308 rcall TIA_SYSEX_Send_SysExFooter
+ 00309
+ 00310 ;; finish Action
+ 00311 rgoto TIA_SYSEX_ActionFinished
+53FA D758 M bra label
+ 00312
+ 00313 ;; --------------------------------------------------------------------------
+ 00314 ;; MIDI Action: Patch Write
+ 00315 ;; --------------------------------------------------------------------------
+53FC 00316 TIA_SYSEX_Init_PRESET_Write
+ 00317 ;; disable TIA engine until end of transfer (will be requested by ActionFinished)
+53FC 8010 00318 bsf TIA_STAT, TIA_STAT_ENGINE_DISABLE
+53FE EC61 F01F 00319 call TIA_TUNE_Note_Off
+5402 0012 00320 return
+ 00321
+5404 00322 TIA_SYSEX_Action_PRESET_Write
+ 00323 ;; receive <type> <bank> <patch> <128 bytes> F7 //Patch type
+ 00324 ;; or
+ 00325 ;; receive <type> <bank> <patch> <256 bytes> F7 //WT or Kit preset type
+5404 00326 TIA_SYSEX_Action_PRESET_WriteT
+ 00327 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_TYPE_RECEIVED, ACCESS, TIA_SYSEX_Action_PRESET_WriteB
+5404 B621 M btfsc reg, bit, reg_a
+5406 D004 M bra label
+5408 8621 00328 bsf TIA_SYSEX_STATE, TIA_SYSEX_STATE_TYPE_RECEIVED
+540A C023 F025 00329 movff TIA_SYSEX_IN, TIA_SYSEX_ADDRESS ; load preset type
+ 00330 rgoto TIA_SYSEX_SysExCheck_End ; wait for next byte
+540E D743 M bra label
+ 00331
+5410 00332 TIA_SYSEX_Action_PRESET_WriteB
+ 00333 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_BANK_RECEIVED, ACCESS, TIA_SYSEX_Action_PRESET_WriteP
+5410 B821 M btfsc reg, bit, reg_a
+5412 D004 M bra label
+5414 8821 00334 bsf TIA_SYSEX_STATE, TIA_SYSEX_STATE_BANK_RECEIVED
+5416 C023 F011 00335 movff TIA_SYSEX_IN, TIA_BANK ; load bank
+ 00336 rgoto TIA_SYSEX_SysExCheck_End ; wait for next byte
+541A D73D M bra label
+ 00337
+541C 00338 TIA_SYSEX_Action_PRESET_WriteP
+ 00339 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_PRESET_RECEIVED, ACCESS, TIA_SYSEX_Action_PRESET_WriteDH
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 180
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+541C BA21 M btfsc reg, bit, reg_a
+541E D007 M bra label
+5420 8A21 00340 bsf TIA_SYSEX_STATE, TIA_SYSEX_STATE_PRESET_RECEIVED
+5422 C023 F012 00341 movff TIA_SYSEX_IN, TIA_PRESET ; load preset
+ 00342
+5426 6A24 00343 clrf TIA_SYSEX_CHECKSUM ; clear checksum
+5428 6AA9 00344 clrf EEADR ; clear address
+542A 6A26 00345 clrf TIA_SYSEX_ERROR ; clear reply error
+ 00346 rgoto TIA_SYSEX_SysExCheck_End ; wait for next byte
+542C D734 M bra label
+ 00347
+542E 00348 TIA_SYSEX_Action_PRESET_WriteDH
+ 00349 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_WAIT_CHECKSUM, ACCESS, TIA_SYSEX_Action_PRESET_WriteChk
+542E B421 M btfsc reg, bit, reg_a
+5430 D022 M bra label
+ 00350 BRA_IFCLR TIA_SYSEX_ADDRESS, 0, ACCESS, TIA_SYSEX_Action_PRESET_WriteDL
+5432 A025 M btfss reg, bit, reg_a
+5434 D00E M bra label
+ 00351 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_DH_RECEIVED, ACCESS, TIA_SYSEX_Action_PRESET_WriteDL
+5436 B221 M btfsc reg, bit, reg_a
+5438 D00C M bra label
+543A 8221 00352 bsf TIA_SYSEX_STATE, TIA_SYSEX_STATE_DH_RECEIVED
+ 00353
+543C EE02 F000 00354 lfsr FSR0, BANKSTICK_FORMAT_BEGIN ; init pointer to upload buffer
+5440 CFA9 FFE9 00355 movff EEADR, FSR0L
+ 00356 ;; store received byte in upload buffer
+5444 6AEF 00357 clrf INDF0
+5446 5023 00358 movf TIA_SYSEX_IN, W
+5448 A4D8 00359 skpz
+544A 8EEF 00360 bsf INDF0, 7
+544C 0B7F 00361 andlw 0x7f
+544E 2624 00362 addwf TIA_SYSEX_CHECKSUM, F
+ 00363 ;; add to checksum
+ 00364 rgoto TIA_SYSEX_SysExCheck_End ; wait for next byte
+5450 D722 M bra label
+ 00365
+5452 00366 TIA_SYSEX_Action_PRESET_WriteDL
+ 00367 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_WAIT_CHECKSUM, ACCESS, TIA_SYSEX_Action_PRESET_WriteChk
+5452 B421 M btfsc reg, bit, reg_a
+5454 D010 M bra label
+ 00368
+5456 9221 00369 bcf TIA_SYSEX_STATE, TIA_SYSEX_STATE_DH_RECEIVED
+ 00370
+5458 EE02 F000 00371 lfsr FSR0, BANKSTICK_FORMAT_BEGIN ; init pointer to upload buffer
+545C CFA9 FFE9 00372 movff EEADR, FSR0L
+ 00373
+5460 A025 00374 btfss TIA_SYSEX_ADDRESS, 0, ACCESS
+5462 6AEF 00375 clrf INDF0
+ 00376 ;; store received byte in upload buffer
+5464 5023 00377 movf TIA_SYSEX_IN, W
+5466 0B7F 00378 andlw 0x7f
+5468 26EF 00379 addwf INDF0, F
+ 00380
+ 00381 ;; add to checksum
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 181
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+546A 2624 00382 addwf TIA_SYSEX_CHECKSUM, F
+ 00383
+ 00384 ;; increment address
+546C 2AA9 00385 incf EEADR, F
+ 00386
+ 00387 ;; if FSR0L is zero, go into WAIT_CHECKSUM state
+546E 0E80 00388 movlw 0x80
+5470 60A9 00389 cpfslt EEADR, ACCESS
+5472 8421 00390 bsf TIA_SYSEX_STATE, TIA_SYSEX_STATE_WAIT_CHECKSUM
+ 00391
+ 00392 ;; wait for next byte
+ 00393 rgoto TIA_SYSEX_SysExCheck_End
+5474 D710 M bra label
+ 00394
+5476 00395 TIA_SYSEX_Action_PRESET_WriteChk
+ 00396 ;; store received byte in checksum (using TIA_SYSEX_ADDRESS as store register)
+5476 C023 FFA9 00397 movff TIA_SYSEX_IN, EEADR
+ 00398
+ 00399 ;; wait for next byte
+ 00400 rgoto TIA_SYSEX_SysExCheck_End
+547A D70D M bra label
+ 00401
+547C 00402 TIA_SYSEX_End_PRESET_Write
+ 00403 ;; action invalid if checksum has not been received
+ 00404 BRA_IFCLR TIA_SYSEX_STATE, TIA_SYSEX_STATE_WAIT_CHECKSUM, ACCESS, TIA_SYSEX_ActionInvalid
+547C A421 M btfss reg, bit, reg_a
+547E D716 M bra label
+ 00405
+ 00406 ;; calc final checksum
+5480 5024 00407 movf TIA_SYSEX_CHECKSUM, W
+5482 0880 00408 sublw 0x80
+5484 0B7F 00409 andlw 0x7f
+ 00410
+ 00411 ;; compare with received checksum
+5486 18A9 00412 xorwf EEADR, W
+ 00413
+ 00414 ;; if not equal jump to ActionInvalid
+5488 A4D8 00415 skpz
+ 00416 rgoto TIA_SYSEX_End_PRESET_Write_Reply_ChksumErr
+548A D02C M bra label
+ 00417
+548C 5025 00418 movf TIA_SYSEX_ADDRESS, W
+548E DAA8 00419 rcall TIA_SYSEX_Hlp_GetAbsoluteBank
+5490 6E26 00420 movwf TIA_SYSEX_ERROR
+5492 5026 00421 movf TIA_SYSEX_ERROR, W
+5494 A4D8 00422 skpz
+ 00423 rgoto TIA_SYSEX_End_PRESET_Write_Reply
+5496 D02E M bra label
+ 00424
+5498 5012 00425 movf TIA_PRESET, W
+549A E00A 00426 bz TIA_SYSEX_End_PRESET_Write_Cont
+549C 5011 00427 movf TIA_BANK, W
+549E EC8F F01C 00428 call TIA_BANK_GetBankStickReady
+54A2 B4D8 00429 skpnz
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 182
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00430 rgoto TIA_SYSEX_End_PRESET_Write_Reply_NotReady
+54A4 D022 M bra label
+ 00431
+54A6 EC9C F01C 00432 call TIA_BANK_GetBankStickSize
+54AA E102 00433 bnz TIA_SYSEX_End_PRESET_Write_Cont
+ 00434
+54AC BC12 00435 btfsc TIA_PRESET, 6
+ 00436 rgoto TIA_SYSEX_End_PRESET_Write_Reply_32k
+54AE D020 M bra label
+ 00437
+54B0 00438 TIA_SYSEX_End_PRESET_Write_Cont
+ 00439
+ 00440 BRA_IFSET TIA_SYSEX_ADDRESS, 0, ACCESS, TIA_SYSEX_End_PRESET_Write_Cont_Kit
+54B0 B025 M btfsc reg, bit, reg_a
+54B2 D004 M bra label
+54B4 00441 TIA_SYSEX_End_PRESET_Write_Cont_Patch
+54B4 6AA9 00442 clrf EEADR
+54B6 0E00 00443 movlw (EEPROM_PATCH >> 8) & 0xff
+54B8 6EAA 00444 movwf EEADRH
+ 00445 rgoto TIA_SYSEX_End_PRESET_WritePages
+54BA D009 M bra label
+ 00446
+54BC 00447 TIA_SYSEX_End_PRESET_Write_Cont_Kit
+ 00448 BRA_IFSET TIA_SYSEX_ADDRESS, 1, ACCESS, TIA_SYSEX_End_PRESET_Write_Cont_WT
+54BC B225 M btfsc reg, bit, reg_a
+54BE D004 M bra label
+54C0 6AA9 00449 clrf EEADR
+54C2 0E02 00450 movlw (EEPROM_KIT >> 8) & 0xff
+54C4 6EAA 00451 movwf EEADRH
+ 00452 rgoto TIA_SYSEX_End_PRESET_WritePages
+54C6 D003 M bra label
+ 00453
+54C8 00454 TIA_SYSEX_End_PRESET_Write_Cont_WT
+54C8 6AA9 00455 clrf EEADR
+54CA 0E01 00456 movlw (EEPROM_WAVETABLE >> 8) & 0xff
+54CC 6EAA 00457 movwf EEADRH
+ 00458 ;;rgoto TIA_SYSEX_End_PRESET_WritePages
+ 00459
+54CE 00460 TIA_SYSEX_End_PRESET_WritePages
+ 00461 ;; write buffer to EEPROM
+54CE EE12 F000 00462 lfsr FSR1, BANKSTICK_FORMAT_BEGIN ; init pointer to upload buffer
+54D2 0004 00463 clrwdt ; feed watchdog
+54D4 EC35 F01C 00464 call TIA_BANK_WritePage ; write a 64 bytes page to EEPROM
+ 00465 ;; increment FSR1 by 0x40
+54D8 0E40 00466 movlw 0x40
+54DA 26E1 00467 addwf FSR1L, F
+54DC 0004 00468 clrwdt ; feed watchdog
+54DE EC35 F01C 00469 call TIA_BANK_WritePage ; write a 64 bytes page to EEPROM
+ 00470 rgoto TIA_SYSEX_End_PRESET_Write_Reply
+54E2 D008 M bra label
+ 00471 ;; to do... bank num in command and set patch/kit/WT +init if BANK==xBANK/ PRESET==xPRESET
+ 00472
+54E4 00473 TIA_SYSEX_End_PRESET_Write_Reply_ChksumErr
+ 00474 ;; CheckSum Error #5
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 183
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+54E4 0E05 00475 movlw 0x05
+54E6 6E26 00476 movwf TIA_SYSEX_ERROR
+ 00477 rgoto TIA_SYSEX_End_PRESET_Write_Reply
+54E8 D005 M bra label
+ 00478
+54EA 00479 TIA_SYSEX_End_PRESET_Write_Reply_NotReady
+ 00480 ;; BS not ready Error #3
+54EA 0E03 00481 movlw 0x03
+54EC 6E26 00482 movwf TIA_SYSEX_ERROR
+ 00483 rgoto TIA_SYSEX_End_PRESET_Write_Reply
+54EE D002 M bra label
+ 00484
+54F0 00485 TIA_SYSEX_End_PRESET_Write_Reply_32k
+ 00486 ;; BS 32k 64 presets max Error #4
+54F0 0E04 00487 movlw 0x04
+54F2 6E26 00488 movwf TIA_SYSEX_ERROR
+ 00489 ;;rgoto TIA_SYSEX_End_PRESET_Write_Reply
+ 00490
+54F4 00491 TIA_SYSEX_End_PRESET_Write_Reply
+ 00492 ;; send SysEx header
+54F4 DA26 00493 rcall TIA_SYSEX_Send_SysExHeader
+ 00494
+ 00495 ;; Send PRESET_Write ID
+54F6 0E02 00496 movlw 0x02
+54F8 EC24 F016 00497 call MIOS_MIDI_TxBufferPut
+ 00498
+ 00499 ;; send requested preset type number
+ 00500 ;;movf TIA_SYSEX_ADDRESS, W
+54FC DA8D 00501 rcall TIA_SYSEX_Hlp_GetRelativeBank
+54FE 0B7F 00502 andlw 0x7f
+5500 EC24 F016 00503 call MIOS_MIDI_TxBufferPut
+ 00504
+ 00505 ;; send requested bank number
+5504 5011 00506 movf TIA_BANK, W
+5506 0B1F 00507 andlw 0x1f
+5508 EC24 F016 00508 call MIOS_MIDI_TxBufferPut
+ 00509
+ 00510 ;; send requested preset number
+550C 5012 00511 movf TIA_PRESET, W
+550E 0B7F 00512 andlw 0x7f
+5510 EC24 F016 00513 call MIOS_MIDI_TxBufferPut
+ 00514
+ 00515 ;; send error status
+5514 5026 00516 movf TIA_SYSEX_ERROR, W
+5516 0B7F 00517 andlw 0x7f
+5518 EC24 F016 00518 call MIOS_MIDI_TxBufferPut
+ 00519
+ 00520 ;; send of SysEx footer
+551C 0E01 00521 movlw 0x01 ; (independend from merger state)
+551E DA24 00522 rcall TIA_SYSEX_Send_SysExFooter
+ 00523
+ 00524 ;; finish Action
+ 00525 rgoto TIA_SYSEX_ActionFinished
+5520 D6C5 M bra label
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 184
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00526
+5522 00527 TIA_SYSEX_End_PRESET_Write_STR
+ 00528 STRING 20, 0x00, "Patch A 1 uploaded "
+5522 1400 6150 M da ((length) << 8) | (pos), str
+ 6374 2068
+ 2041 3120
+ 7520 6C70
+ 616F 6564
+ 2064
+ 00529
+ 00530 ;; --------------------------------------------------------------------------
+ 00531 ;; MIDI Action: All Patch Read
+ 00532 ;; --------------------------------------------------------------------------
+5538 00533 TIA_SYSEX_Init_BANK_Read
+ 00534 ;; disable TIA engine until end of transfer (will be requested by ActionFinished)
+5538 8010 00535 bsf TIA_STAT, TIA_STAT_ENGINE_DISABLE
+553A EC61 F01F 00536 call TIA_TUNE_Note_Off
+553E 0012 00537 return
+ 00538
+5540 00539 TIA_SYSEX_Action_BANK_Read
+ 00540 ;; receive <type> <bank> F7
+5540 00541 TIA_SYSEX_Action_BANK_Read_T
+ 00542 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_TYPE_RECEIVED, ACCESS, TIA_SYSEX_Action_BANK_Read_B
+5540 B621 M btfsc reg, bit, reg_a
+5542 D004 M bra label
+5544 8621 00543 bsf TIA_SYSEX_STATE, TIA_SYSEX_STATE_TYPE_RECEIVED
+5546 C023 F025 00544 movff TIA_SYSEX_IN, TIA_SYSEX_ADDRESS ; load preset type
+ 00545 rgoto TIA_SYSEX_SysExCheck_End ; wait for next byte
+554A D6A5 M bra label
+ 00546
+554C 00547 TIA_SYSEX_Action_BANK_Read_B
+ 00548 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_BANK_RECEIVED, ACCESS, TIA_SYSEX_Action_BANK_ReadStall
+554C B821 M btfsc reg, bit, reg_a
+554E D004 M bra label
+5550 8821 00549 bsf TIA_SYSEX_STATE, TIA_SYSEX_STATE_BANK_RECEIVED
+5552 C023 F011 00550 movff TIA_SYSEX_IN, TIA_BANK ; load bank
+ 00551 rgoto TIA_SYSEX_SysExCheck_End ; wait for next byte
+5556 D69F M bra label
+ 00552
+5558 00553 TIA_SYSEX_Action_BANK_ReadStall
+ 00554 ;; do nothing until sysex footer (F7) has been received
+ 00555 rgoto TIA_SYSEX_SysExCheck_End
+5558 D69E M bra label
+ 00556
+555A 00557 TIA_SYSEX_End_BANK_Read
+ 00558 ;; action invalid if patch number has not been received
+ 00559 BRA_IFCLR TIA_SYSEX_STATE, TIA_SYSEX_STATE_BANK_RECEIVED, ACCESS, TIA_SYSEX_ActionInvalid
+555A A821 M btfss reg, bit, reg_a
+555C D6A7 M bra label
+ 00560
+555E C011 F007 00561 movff TIA_BANK, TMP2 ;; store relative bank
+5562 5025 00562 movf TIA_SYSEX_ADDRESS, W
+5564 DA3D 00563 rcall TIA_SYSEX_Hlp_GetAbsoluteBank ; set bank to absolute
+5566 6E26 00564 movwf TIA_SYSEX_ERROR
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 185
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+5568 E10A 00565 bnz TIA_SYSEX_End_BANK_Read_Cont
+ 00566
+556A 5012 00567 movf TIA_PRESET, W
+556C E008 00568 bz TIA_SYSEX_End_BANK_Read_Cont
+556E 5011 00569 movf TIA_BANK, W
+5570 EC8F F01C 00570 call TIA_BANK_GetBankStickReady
+5574 A4D8 00571 skpz
+ 00572 rgoto TIA_SYSEX_End_BANK_Read_Cont
+5576 D003 M bra label
+ 00573 ;; BS not ready Error #3
+5578 0E03 00574 movlw 0x03
+557A 6E26 00575 movwf TIA_SYSEX_ERROR
+ 00576 rgoto TIA_SYSEX_End_BANK_Read_Cont
+557C D000 M bra label
+ 00577
+557E 00578 TIA_SYSEX_End_BANK_Read_Cont
+ 00579
+ 00580 ;; send SysEx header
+557E D9E1 00581 rcall TIA_SYSEX_Send_SysExHeader
+ 00582
+ 00583 ;; send PTCHES_Write ID
+5580 0E03 00584 movlw 0x03
+5582 EC24 F016 00585 call MIOS_MIDI_TxBufferPut
+ 00586
+ 00587 ;; send requested preset type number
+5586 5025 00588 movf TIA_SYSEX_ADDRESS, W
+5588 0B7F 00589 andlw 0x7f
+558A EC24 F016 00590 call MIOS_MIDI_TxBufferPut
+ 00591
+ 00592 ;; send requested bank number
+558E 5007 00593 movf TMP2, W
+5590 0B1F 00594 andlw 0x1f
+5592 EC24 F016 00595 call MIOS_MIDI_TxBufferPut
+ 00596
+ 00597 ;movf TIA_SYSEX_ADDRESS, W
+ 00598 ;rcall TIA_SYSEX_Hlp_GetAbsoluteBank ; set bank to absolute
+5596 5011 00599 movf TIA_BANK, W
+5598 EC8F F01C 00600 call TIA_BANK_GetBankStickReady
+ 00601 ;; send requested bank size
+559C EC9C F01C 00602 call TIA_BANK_GetBankStickSize
+55A0 EC24 F016 00603 call MIOS_MIDI_TxBufferPut
+ 00604
+55A4 5026 00605 movf TIA_SYSEX_ERROR, W
+55A6 E004 00606 bz TIA_SYSEX_End_BANK_Read_Cont_Ok
+55A8 0B7F 00607 andlw 0x7f
+55AA EC24 F016 00608 call MIOS_MIDI_TxBufferPut
+ 00609 rgoto TIA_SYSEX_End_BANK_Read_Footer
+55AE D029 M bra label
+ 00610
+55B0 00611 TIA_SYSEX_End_BANK_Read_Cont_Ok
+ 00612
+ 00613 ;; clear checksum
+55B0 6A24 00614 clrf TIA_SYSEX_CHECKSUM
+ 00615
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 186
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00616 #if 1
+ 00617 ;; send bank informations
+55B2 EC75 F01C 00618 call TIA_BANK_SetBankStickAddressMagic
+55B6 00619 TIA_SYSEX_End_BANK_Read_Cont_Name_Loop
+55B6 ECB8 F016 00620 call MIOS_BANKSTICK_Read ; read content, inc MIOS_PARAMETER12
+55BA 6EF5 00621 movwf TABLAT ; store data in TABLAT
+ 00622
+55BC 5003 00623 movf MIOS_PARAMETER1, W
+55BE 0BF0 00624 andlw 0xf0
+55C0 0A10 00625 xorlw 0x10
+55C2 E104 00626 bnz TIA_SYSEX_End_BANK_Read_Cont_Name_Jump
+55C4 0E20 00627 movlw 0x20
+55C6 60F5 00628 cpfslt TABLAT, ACCESS ; ensure that patch name doesn't contain characters < 0x20
+ 00629 rgoto TIA_SYSEX_End_BANK_Read_Cont_Name_Jump
+55C8 D001 M bra label
+55CA 6EF5 00630 movwf TABLAT
+55CC 00631 TIA_SYSEX_End_BANK_Read_Cont_Name_Jump
+55CC 50F5 00632 movf TABLAT, W
+55CE 0B7F 00633 andlw 0x7f
+55D0 2624 00634 addwf TIA_SYSEX_CHECKSUM, F
+55D2 EC24 F016 00635 call MIOS_MIDI_TxBufferPut
+55D6 AE03 00636 btfss MIOS_PARAMETER1, 7 ; until == 0x20 send 16 bytes
+ 00637 rgoto TIA_SYSEX_End_BANK_Read_Cont_Name_Loop
+55D8 D7EE M bra label
+ 00638
+ 00639 ;; 127 patches to send(1-127), TIA_PRESET used as counter
+55DA 0E01 00640 movlw 0x01
+55DC 6E12 00641 movwf TIA_PRESET
+ 00642 #else
+ 00643
+ 00644 ;; 128 patches to send, TIA_PRESET used as counter
+ 00645 clrf TIA_PRESET
+ 00646 #endif
+ 00647
+55DE 00648 TIA_SYSEX_End_BANK_Read_OL ; outer loop
+55DE 0004 00649 clrwdt ; feed the watchdog
+55E0 A025 00650 btfss TIA_SYSEX_ADDRESS, 0
+55E2 D9CD 00651 rcall TIA_SYSEX_Hlp_SendPreset
+55E4 B025 00652 btfsc TIA_SYSEX_ADDRESS, 0
+55E6 D9E0 00653 rcall TIA_SYSEX_Hlp_SendWTKit
+ 00654
+55E8 00655 TIA_SYSEX_End_BANK_Read_OL_Cont
+55E8 2A12 00656 incf TIA_PRESET, F ; loop 64/128 times depends on BS Size
+55EA EC9C F01C 00657 call TIA_BANK_GetBankStickSize
+55EE 0E7F 00658 movlw 128-1
+55F0 B4D8 00659 skpnz
+55F2 0E3F 00660 movlw 64-1
+55F4 6412 00661 cpfsgt TIA_PRESET, ACCESS
+ 00662 rgoto TIA_SYSEX_End_BANK_Read_OL
+55F6 D7F3 M bra label
+ 00663
+ 00664 ;; send checksum
+55F8 5024 00665 movf TIA_SYSEX_CHECKSUM, W
+55FA 0880 00666 sublw 0x80
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 187
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+55FC 0B7F 00667 andlw 0x7f
+55FE EC24 F016 00668 call MIOS_MIDI_TxBufferPut
+ 00669
+5602 00670 TIA_SYSEX_End_BANK_Read_Footer
+ 00671 ;; send of SysEx footer
+5602 0E01 00672 movlw 0x01 ; (independend from merger state)
+5604 D9B1 00673 rcall TIA_SYSEX_Send_SysExFooter
+ 00674
+ 00675 ;; finish Action
+ 00676 rgoto TIA_SYSEX_ActionFinished
+5606 D652 M bra label
+ 00677
+ 00678
+ 00679 ;; --------------------------------------------------------------------------
+ 00680 ;; MIDI Action: Bank Write Name
+ 00681 ;; --------------------------------------------------------------------------
+5608 00682 TIA_SYSEX_Init_BANK_WriteName
+ 00683 ;; disable TIA engine until end of transfer (will be requested by ActionFinished)
+ 00684 ;;bsf TIA_STAT, TIA_STAT_ENGINE_DISABLE
+5608 0012 00685 return
+ 00686
+560A 00687 TIA_SYSEX_Action_BANK_WriteName
+ 00688 ;; receive <type> <bank> <16 bytes> F7
+560A 00689 TIA_SYSEX_Action_BANK_WriteNameT
+ 00690 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_TYPE_RECEIVED, ACCESS, TIA_SYSEX_Action_BANK_WriteNameB
+560A B621 M btfsc reg, bit, reg_a
+560C D004 M bra label
+560E 8621 00691 bsf TIA_SYSEX_STATE, TIA_SYSEX_STATE_TYPE_RECEIVED
+5610 C023 F025 00692 movff TIA_SYSEX_IN, TIA_SYSEX_ADDRESS ; load preset type
+ 00693 rgoto TIA_SYSEX_SysExCheck_End ; wait for next byte
+5614 D640 M bra label
+ 00694
+5616 00695 TIA_SYSEX_Action_BANK_WriteNameB
+ 00696 BRA_IFSET TIA_SYSEX_STATE, TIA_SYSEX_STATE_BANK_RECEIVED, ACCESS, TIA_SYSEX_Action_BANK_WriteNameC
+5616 B821 M btfsc reg, bit, reg_a
+5618 D006 M bra label
+561A 8821 00697 bsf TIA_SYSEX_STATE, TIA_SYSEX_STATE_BANK_RECEIVED
+561C C023 F011 00698 movff TIA_SYSEX_IN, TIA_BANK ; load bank
+ 00699
+5620 6AA9 00700 clrf EEADR ; clear address
+5622 6A26 00701 clrf TIA_SYSEX_ERROR ; clear reply error
+ 00702 rgoto TIA_SYSEX_SysExCheck_End ; wait for next byt
+5624 D638 M bra label
+ 00703
+5626 00704 TIA_SYSEX_Action_BANK_WriteNameC
+5626 EE02 F000 00705 lfsr FSR0, BANKSTICK_FORMAT_BEGIN ; init pointer to upload buffer
+562A CFA9 FFE9 00706 movff EEADR, FSR0L
+ 00707
+ 00708 ;; store received byte in upload buffer
+562E 5023 00709 movf TIA_SYSEX_IN, W
+5630 6EEF 00710 movwf INDF0
+ 00711
+ 00712 ;; increment address
+5632 2AA9 00713 incf EEADR, F
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 188
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+ 00714
+ 00715 ;; if FSR0L is zero, go into WAIT_CHECKSUM state
+5634 0E10 00716 movlw 0x10
+5636 60A9 00717 cpfslt EEADR, ACCESS
+5638 8A21 00718 bsf TIA_SYSEX_STATE, TIA_SYSEX_STATE_PRESET_RECEIVED
+ 00719
+ 00720 ;; wait for next byte
+ 00721 rgoto TIA_SYSEX_SysExCheck_End
+563A D62D M bra label
+ 00722
+563C 00723 TIA_SYSEX_End_BANK_WriteName
+ 00724 ;; action invalid if checksum has not been received
+ 00725 BRA_IFCLR TIA_SYSEX_STATE, TIA_SYSEX_STATE_PRESET_RECEIVED, ACCESS, TIA_SYSEX_ActionInvalid
+563C AA21 M btfss reg, bit, reg_a
+563E D636 M bra label
+ 00726
+5640 5025 00727 movf TIA_SYSEX_ADDRESS, W
+5642 D9CE 00728 rcall TIA_SYSEX_Hlp_GetAbsoluteBank
+5644 6E26 00729 movwf TIA_SYSEX_ERROR
+5646 E11D 00730 bnz TIA_SYSEX_End_BANK_WriteName_Reply
+ 00731
+5648 5011 00732 movf TIA_BANK, W
+564A EC8F F01C 00733 call TIA_BANK_GetBankStickReady
+564E B4D8 00734 skpnz
+ 00735 rgoto TIA_SYSEX_End_BANK_WriteName_Reply_NotReady
+5650 D015 M bra label
+ 00736
+5652 00737 TIA_SYSEX_End_BANK_WriteName_Cont
+5652 EE12 F000 00738 lfsr FSR1, BANKSTICK_FORMAT_BEGIN ; init pointer to upload buffer
+ 00739 ;; add name offset to MP1 start @0x10
+5656 EC75 F01C 00740 call TIA_BANK_SetBankStickAddressMagic
+565A 0E10 00741 movlw 0x10
+565C 2603 00742 addwf MIOS_PARAMETER1, F
+ 00743
+565E 00744 TIA_SYSEX_End_BANK_WriteName_Loop
+565E 0004 00745 clrwdt ; feed watchdog
+5660 0E20 00746 movlw 0x20
+5662 61E7 00747 cpfslt INDF1, BANKED ; ensure that patch name doesn't contain characters < 0x20
+5664 6EE7 00748 movwf INDF1
+5666 00749 TIA_SYSEX_End_BANK_WriteName_Loop_Jump
+5666 50E6 00750 movf POSTINC1, W
+5668 ECBA F016 00751 call MIOS_BANKSTICK_Write ; write byte to EEPROM
+566C E104 00752 bnz TIA_SYSEX_End_BANK_WriteName_Reply_WError
+ 00753
+ 00754 ;; if FSR0L is zero, go into WAIT_CHECKSUM state
+566E 0E20 00755 movlw 0x20
+5670 6003 00756 cpfslt MIOS_PARAMETER1, ACCESS
+ 00757 rgoto TIA_SYSEX_End_BANK_WriteName_Reply
+5672 D007 M bra label
+ 00758 rgoto TIA_SYSEX_End_BANK_WriteName_Loop
+5674 D7F4 M bra label
+ 00759
+5676 00760 TIA_SYSEX_End_BANK_WriteName_Reply_WError
+ 00761 ;; BS write byte Error #8
+ gpasm-0.13.7 beta setup_tia_cartridge.asm9-22-2013 23:38:17 PAGE 189
+
+
+LOC OBJECT CODE LINE SOURCE TEXT
+ VALUE
+
+5676 0E08 00762 movlw 0x08
+5678 6E26 00763 movwf TIA_SYSEX_ERROR
+ 00764 rgoto TIA_SYSEX_End_BANK_WriteName_Reply
+567A D003 M bra label
+ 00765
+567C 00766 TIA_SYSEX_End_BANK_WriteN