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// $Id: mios32_config.h 2425 2016-11-03 00:44:22Z tk $
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/*
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 * Local MIOS32 configuration file
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 *
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 * this file allows to disable (or re-configure) default functions of MIOS32
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 * available switches are listed in $MIOS32_PATH/modules/mios32/MIOS32_CONFIG.txt
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 *
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 */
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#ifndef _MIOS32_CONFIG_H
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#define _MIOS32_CONFIG_H
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// The boot message which is print during startup and returned on a SysEx query
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#define MIOS32_LCD_BOOT_MSG_DELAY 0 // we delay the boot and print a message inside the app
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#define MIOS32_LCD_BOOT_MSG_LINE1 "MIDIbox NG V1.036"
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#define MIOS32_LCD_BOOT_MSG_LINE2 "(C) 2016 T.Klose"
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// define a unique VID/PID for this application
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#define MIOS32_USB_PRODUCT_STR  "MIDIbox NG"
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// enable 4 USB ports
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#define MIOS32_USB_MIDI_NUM_PORTS 4
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// increased number of SRs
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#define MIOS32_SRIO_NUM_SR 32
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// use 32 DOUT pages
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#define MIOS32_SRIO_NUM_DOUT_PAGES 32
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// disables the default SRIO scan routine in programming_models/traditional/main.c
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// allows to implement an own handler
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// -> see app.c, APP_SRIO_*
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#define MIOS32_DONT_SERVICE_SRIO_SCAN 1
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// special callback which will be called for DIN pin emulation
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#define MIOS32_SRIO_CALLBACK_BEFORE_DIN_COMPARE APP_SRIO_ServiceFinishBeforeDINCompare
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// enable 4 MIDI ports (note: MIDI3 only used if AIN ports disabled)
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#if defined(MIOS32_FAMILY_STM32F10x)
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// enable third UART
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# define MIOS32_UART_NUM 3
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#else
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// enable third and fourth UART
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# define MIOS32_UART_NUM 4
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#endif
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// enable 128 encoders (because SCS allocates one encoder as well)
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#define MIOS32_ENC_NUM_MAX 129
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// the SCS is entered by pressing the EXIT button
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#define SCS_MENU_ENTERED_VIA_EXIT_BUTTON 1
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// max. number of menu items (configurable with SCS num_items=...)
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#define SCS_NUM_MENU_ITEMS 8
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// AIN configuration:
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// bit mask to enable channels
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//
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// Pin mapping on MBHP_CORE_STM32 module:
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//   15       14      13     12     11     10      9      8   
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// J16.SO  J16.SI  J16.SC J16.RC J5C.A11 J5C.A10 J5C.A9 J5C.A8
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//   7        6       5      4      3      2      1       0
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// J5B.A7  J5B.A6  J5B.A5 J5B.A4 J5A.A3 J5A.A2 J5A.A1  J5A.A0
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//
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// Examples:
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//   mask 0x000f will enable all J5A channels
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//   mask 0x00f0 will enable all J5B channels
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//   mask 0x0f00 will enable all J5C channels
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//   mask 0x0fff will enable all J5A/B/C channels
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// (all channels are disabled by default)
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#if defined(MIOS32_FAMILY_STM32F10x) || defined(MIOS32_FAMILY_LPC17xx)
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// reduced to 6 pins due to conflict with MIDI OUT3/IN3
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#define MIOS32_AIN_CHANNEL_MASK 0x003f
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#else
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#define MIOS32_AIN_CHANNEL_MASK 0x00ff
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#endif
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// define the deadband (min. difference to report a change to the application hook)
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// typically set to (2^(12-desired_resolution)-1)
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// e.g. for a resolution of 7 bit, it's set to (2^(12-7)-1) = (2^5 - 1) = 31
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#define MIOS32_AIN_DEADBAND 31
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#define DEBUG_MSG MIOS32_MIDI_SendDebugMessage
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// enable two AINSER modules
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#define AINSER_NUM_MODULES 2
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// enable 32 AOUT channels
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#define AOUT_NUM_CHANNELS 32
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// configurable chip select pin
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extern char mbng_patch_aout_spi_rc_pin;
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#define AOUT_SPI_RC_PIN mbng_patch_aout_spi_rc_pin
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// enable 1 MAX72xx chain with up to 16 devices
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#define MAX72XX_NUM_CHAINS 1
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#define MAX72XX_NUM_DEVICES_PER_CHAIN 16
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// configurable chip select pin
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extern char mbng_patch_max72xx_spi_rc_pin;
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#define MAX72XX_SPI_RC_PIN_CHAIN1 mbng_patch_max72xx_spi_rc_pin
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// reserved memory for FreeRTOS pvPortMalloc function
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#define MIOS32_HEAP_SIZE 11*1024
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// UMM heap located in default section (means for LPC17: not in AHB memory, because we are using it for the event pool)
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#define UMM_HEAP_SECTION
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// stack sizes which are used by various tasks (see APP_Init() in app.c)
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#define APP_BIG_STACK_SIZE     (2048)
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#define APP_REDUCED_STACK_SIZE (1024)
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// for the MIOS32 hooks in main.c
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#define MIOS32_MINIMAL_STACK_SIZE APP_BIG_STACK_SIZE
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// for the UIP task
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#define UIP_TASK_STACK_SIZE       APP_BIG_STACK_SIZE
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// optionally for task analysis - if enabled, the stats can be displayed with the "system" command in MIOS Terminal
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#if 0
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#define configUSE_TRACE_FACILITY                1
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#define configGENERATE_RUN_TIME_STATS           0
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#if configGENERATE_RUN_TIME_STATS
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#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS  FREERTOS_UTILS_PerfCounterInit
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#define portGET_RUN_TIME_COUNTER_VALUE          FREERTOS_UTILS_PerfCounterGet
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#endif
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#endif
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// for LPC17: simplify allocation of large arrays
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#if defined(MIOS32_FAMILY_LPC17xx)
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# define AHB_SECTION __attribute__ ((section (".bss_ahb")))
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#else
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# define AHB_SECTION
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#endif
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// LPC17 Ethernet driver: locate buffers to lower (default) section
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// (no attribute passed to this variable)
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#define LPC17XX_EMAC_MEM_SECTION
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// reduce number of buffers to save memory
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#define LPC17XX_EMAC_NUM_RX_FRAG 2
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#define LPC17XX_EMAC_NUM_TX_FRAG 2
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#define LPC17XX_EMAC_FRAG_SIZE   1024
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// size of SysEx buffers
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// if longer SysEx strings are received, they will be forwarded directly
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// in this case, multiple strings concurrently sent to the same port won't be merged correctly anymore.
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#define MIDI_ROUTER_SYSEX_BUFFER_SIZE 16
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// sequencer
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#define SEQ_MIDI_OUT_MAX_EVENTS    32
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// Keyboard Handler
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#define KEYBOARD_NOTIFY_TOGGLE_HOOK MBNG_KB_NotifyToggle
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#define KEYBOARD_DONT_USE_MIDI_CFG 1
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#define KEYBOARD_DONT_USE_AIN 1
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// disable calibration for LPC17 (not enough memory...)
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#if defined(MIOS32_FAMILY_LPC17xx)
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#define KEYBOARD_USE_SINGLE_KEY_CALIBRATION 0
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#endif
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// enable 4 SPI MIDI ports
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// Note: SPI MIDI port has to be explicitely enabled by the user
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// He has to enter "set spi_midi 1" in the bootloader update application
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// Without this measure, the ENC28J60 based Ethernet Extension will be accessed via J16:RC2
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// With "spi_midi" enable, the ENC28J60 driver will be disabled and OSC won't be available on board != LPC17 (which has an inbuilt ETH port)
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#define MIOS32_SPI_MIDI_NUM_PORTS 4
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// map MIDI mutex to UIP task
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// located in app.c to access MIDI IN/OUT mutex from external
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extern void APP_MUTEX_MIDIOUT_Take(void);
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extern void APP_MUTEX_MIDIOUT_Give(void);
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extern void APP_MUTEX_MIDIIN_Take(void);
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extern void APP_MUTEX_MIDIIN_Give(void);
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#define UIP_TASK_MUTEX_MIDIOUT_TAKE { APP_MUTEX_MIDIOUT_Take(); }
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#define UIP_TASK_MUTEX_MIDIOUT_GIVE { APP_MUTEX_MIDIOUT_Give(); }
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#define UIP_TASK_MUTEX_MIDIIN_TAKE  { APP_MUTEX_MIDIIN_Take(); }
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#define UIP_TASK_MUTEX_MIDIIN_GIVE  { APP_MUTEX_MIDIIN_Give(); }
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// Mutex for J16 access
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extern void APP_J16SemaphoreTake(void);
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extern void APP_J16SemaphoreGive(void);
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#define MIOS32_SDCARD_MUTEX_TAKE   { APP_J16SemaphoreTake(); }
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#define MIOS32_SDCARD_MUTEX_GIVE   { APP_J16SemaphoreGive(); }
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#define MIOS32_ENC28J60_MUTEX_TAKE { APP_J16SemaphoreTake(); }
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#define MIOS32_ENC28J60_MUTEX_GIVE { APP_J16SemaphoreGive(); }
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#define MIOS32_SPI_MIDI_MUTEX_TAKE { APP_J16SemaphoreTake(); }
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#define MIOS32_SPI_MIDI_MUTEX_GIVE { APP_J16SemaphoreGive(); }
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#endif /* _MIOS32_CONFIG_H */