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53 tk 1
; $Id: mios_srio.inc 53 2008-01-30 22:52:41Z tk $
1 tk 2
;
3
; MIOS Shift Register IO Handler
4
;
5
; ==========================================================================
6
;
7
;  Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
8
;  Licensed for personal non-commercial use only.
9
;  All other rights reserved.
10
;
11
; ==========================================================================
12
 
13
;; pins of SRIO shift registers
14
MIOS_SRIO_LAT_SCLK	EQU	LATD	; Pin D.3
15
MIOS_SRIO_PIN_SCLK	EQU	3
16
MIOS_SRIO_LAT_RCLK	EQU	LATD	; Pin D.2
17
MIOS_SRIO_PIN_RCLK	EQU	2
18
MIOS_SRIO_PORT_DIN	EQU	PORTD	; Pin D.1
19
MIOS_SRIO_PIN_DIN	EQU	1
20
MIOS_SRIO_LAT_DOUT	EQU	LATD	; Pin D.0
21
MIOS_SRIO_PIN_DOUT	EQU	0
22
 
23
;; Touch Sensor Pin D.4
24
MIOS_SRIO_LAT_TS	EQU	LATD
25
MIOS_SRIO_PIN_TS	EQU	4
26
 
27
 
28
;; --------------------------------------------------------------------------
29
;;  MIOS SRIO Tick
30
;; --------------------------------------------------------------------------
31
MIOS_SRIO_Tick
32
	movff	FSR0L, IRQ_TMP1			; store FSR0 in temp. register
33
	movff	FSR0H, IRQ_TMP2
34
 
35
	SET_BSR	MIOS_IRQ_TMP_CTR
36
 
37
	;; send a short pulse over port J14 of the core module for capacitive touch sensors
38
	movf	MIOS_SRIO_TS_SENSITIVITY, W, BANKED
39
	bnz	MIOS_SRIO_TS_Enabled
40
MIOS_SRIO_TS_Disabled
41
        bcf	MIOS_SRIO_LAT_RCLK, MIOS_SRIO_PIN_RCLK	; register button values
42
	clrf	MIOS_IRQ_TMP_CTR, BANKED		; init loop counter for register upload
43
	nop
44
	nop
45
	nop
46
        bsf     MIOS_SRIO_LAT_RCLK, MIOS_SRIO_PIN_RCLK	; release register clock
47
	rgoto	MIOS_SRIO_TS_Cont			; continue behind TS handler
48
 
49
MIOS_SRIO_TS_Enabled
50
	movwf	MIOS_IRQ_TMP_CTR, BANKED		; use sensitivity as loop counter
51
 
52
  	bsf	MIOS_SRIO_LAT_TS, MIOS_SRIO_PIN_TS	; touch sensor pin = 1
53
MIOS_SRIO_TS_Loop
54
	decfsz	MIOS_IRQ_TMP_CTR, F, BANKED
55
	rgoto	MIOS_SRIO_TS_Loop
56
        bcf	MIOS_SRIO_LAT_RCLK, MIOS_SRIO_PIN_RCLK	; register button values
57
	clrf	MIOS_IRQ_TMP_CTR, BANKED		; init loop counter for register upload
58
	nop
59
	nop
60
	nop
61
        bsf     MIOS_SRIO_LAT_RCLK, MIOS_SRIO_PIN_RCLK	; release register clock
62
	bcf	MIOS_SRIO_LAT_TS, MIOS_SRIO_PIN_TS	; touch sensor pin = 0
63
MIOS_SRIO_TS_Cont
64
 
65
	lfsr	FSR0, MIOS_SR_DIN_CHANGED_0
66
	lfsr	FSR1, MIOS_SR_DIN_0
67
	lfsr	FSR2, MIOS_SR_DOUT_0
68
	decf	MIOS_SRIO_NUMBER, W, BANKED
69
	addwf	FSR2L, F
70
 
71
	movf	MIOS_SRIO_NUMBER, W, BANKED
72
	movwf	MIOS_IRQ_TMP_CTR, BANKED
73
 
74
	;; feed the SRs
75
MIOS_SRIO_Loop
76
        btfsc   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
77
	bsf	IRQ_TMP5, 7
78
	bsf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
79
	btfss	INDF2, 0
80
	bcf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
81
        btfss   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
82
	bcf	IRQ_TMP5, 7
83
        bsf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
84
	nop
85
 
86
        btfsc   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
87
	bsf	IRQ_TMP5, 6
88
        bcf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
89
	bsf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
90
	btfss	INDF2, 1
91
	bcf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
92
        btfss   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
93
	bcf	IRQ_TMP5, 6
94
        bsf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
95
	nop
96
 
97
        btfsc   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
98
	bsf	IRQ_TMP5, 5
99
        bcf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
100
	bsf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
101
	btfss	INDF2, 2
102
	bcf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
103
        btfss   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
104
	bcf	IRQ_TMP5, 5
105
        bsf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
106
	nop
107
 
108
        btfsc   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
109
	bsf	IRQ_TMP5, 4
110
        bcf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
111
	bsf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
112
	btfss	INDF2, 3
113
	bcf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
114
        btfss   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
115
	bcf	IRQ_TMP5, 4
116
        bsf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
117
	nop
118
 
119
        btfsc   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
120
	bsf	IRQ_TMP5, 3
121
        bcf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
122
	bsf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
123
	btfss	INDF2, 4
124
	bcf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
125
        btfss   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
126
	bcf	IRQ_TMP5, 3
127
        bsf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
128
	nop
129
 
130
        btfsc   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
131
	bsf	IRQ_TMP5, 2
132
        bcf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
133
	bsf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
134
	btfss	INDF2, 5
135
	bcf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
136
        btfss   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
137
	bcf	IRQ_TMP5, 2
138
        bsf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
139
	nop
140
 
141
        btfsc   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
142
	bsf	IRQ_TMP5, 1
143
        bcf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
144
	bsf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
145
	btfss	INDF2, 6
146
	bcf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
147
        btfss   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
148
	bcf	IRQ_TMP5, 1
149
        bsf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
150
	nop
151
 
152
        btfsc   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
153
	bsf	IRQ_TMP5, 0
154
        bcf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
155
	bsf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
156
	btfss	INDF2, 7
157
	bcf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT
158
        btfss   MIOS_SRIO_PORT_DIN, MIOS_SRIO_PIN_DIN
159
	bcf	IRQ_TMP5, 0
160
        bsf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
161
	nop
162
 
163
	movf	IRQ_TMP5, W
164
	xorwf	INDF1, W
165
	iorwf	POSTINC0, F
166
 
167
        bcf     MIOS_SRIO_LAT_SCLK, MIOS_SRIO_PIN_SCLK
168
 
169
	movf	IRQ_TMP5, W
170
	movwf	POSTINC1
171
 
172
	movf	POSTDEC2, W
173
MIOS_SRIO_Loop_Next
174
	decfsz	MIOS_IRQ_TMP_CTR, F, BANKED
175
	rgoto	MIOS_SRIO_Loop
176
 
177
        bcf     MIOS_SRIO_LAT_RCLK, MIOS_SRIO_PIN_RCLK	; latch LED values
178
 
179
	movff	IRQ_TMP1, FSR0L				; restore FSR0 from temp. register
180
	movff	IRQ_TMP2, FSR0H				; (should be executed here to stretch the RCLK pulse)
181
 
182
        bsf     MIOS_SRIO_LAT_RCLK, MIOS_SRIO_PIN_RCLK	; latch LED values
183
 
184
	bsf	MIOS_SRIO_LAT_DOUT, MIOS_SRIO_PIN_DOUT	; set SR OUT pin to defined value
185
 
186
	return
187
 
188
;; --------------------------------------------------------------------------
189
;;  FUNCTION: MIOS_SRIO_NumberSet
190
;;  C_DECLARATION: void MIOS_SRIO_NumberSet(unsigned char number_sr)
191
;;  DESCRIPTION: sets number of available SR registers
192
;;  If number > 16, value will be forced to 16
193
;;  IN:	  number of SRs in WREG
194
;;  C_IN:  number of SRs in <number_sr>
195
;;  OUT:  -
196
;;  C_OUT:  -
197
;;  USES: BSR
198
;; --------------------------------------------------------------------------
199
MIOS_SRIO_NumberSet
200
	SET_BSR	MIOS_SRIO_NUMBER
201
	movwf	MIOS_SRIO_NUMBER, BANKED
202
	andlw	0xf0
203
	skpnz
204
	return
205
	movlw	0x10
206
	movwf	MIOS_SRIO_NUMBER, BANKED
207
	return
208
 
209
;; --------------------------------------------------------------------------
210
;;  FUNCTION: MIOS_SRIO_NumberGet
211
;;  C_DECLARATION: unsigned char MIOS_SRIO_NumberGet(void)
212
;;  DESCRIPTION: returns number of available SR registers
213
;;  IN:	  -
214
;;  C_IN:  -
215
;;  OUT:  number of SRs in MIOS_PARAMETER1 and WREG
216
;;  C_OUT: number of SRs
217
;;  USES: BSR
218
;; --------------------------------------------------------------------------
219
MIOS_SRIO_NumberGet
220
	SET_BSR	MIOS_SRIO_NUMBER
221
	movf	MIOS_SRIO_NUMBER, W, BANKED
222
	movwf	MIOS_PARAMETER1
223
	return
224
 
225
 
226
;; --------------------------------------------------------------------------
227
;;  FUNCTION: MIOS_SRIO_UpdateFrqSet
228
;;  C_DECLARATION: void MIOS_SRIO_UpdateFrqSet(unsigned char update_frq)
229
;;  DESCRIPTION: sets the update frequency of SR registers
230
;;  IN:	  update frequency (unit: milliseconds) in WREG
231
;;  C_IN: update frequency (unit: milliseconds) in <update_frq>
232
;;  OUT:  -
233
;;  C_OUT:  -
234
;;  USES: BSR
235
;; --------------------------------------------------------------------------
236
MIOS_SRIO_UpdateFrqSet
237
	SET_BSR	MIOS_SRIO_UPDATE_FRQ
238
	movwf	MIOS_SRIO_UPDATE_FRQ, BANKED
239
	movf	MIOS_SRIO_UPDATE_FRQ, W, BANKED
240
	skpnz
241
	incf	MIOS_SRIO_UPDATE_FRQ, F, BANKED
242
	return
243
 
244
;; --------------------------------------------------------------------------
245
;;  FUNCTION: MIOS_SRIO_UpdateFrqGet
246
;;  C_DECLARATION: unsigned char MIOS_SRIO_UpdateFrqGet(void)
247
;;  DESCRIPTION: returns the update frequency of SR registers
248
;;  IN:	  -
249
;;  C_IN:  -
250
;;  OUT:  update frequency (unit: milliseconds) in MIOS_PARAMETER1 and WREG
251
;;  C_OUT: update frequency (unit: milliseconds)
252
;;  USES: BSR
253
;; --------------------------------------------------------------------------
254
MIOS_SRIO_UpdateFrqGet
255
	SET_BSR	MIOS_SRIO_UPDATE_FRQ
256
	movf	MIOS_SRIO_UPDATE_FRQ, W, BANKED
257
	movwf	MIOS_PARAMETER1
258
	return
259
 
260
 
261
;; --------------------------------------------------------------------------
262
;;  FUNCTION: MIOS_SRIO_TS_SensitivitySet
263
;;  C_DECLARATION: void MIOS_SRIO_TS_SensitivitySet(unsigned char sensitivity)
264
;;  DESCRIPTION: sets the touch sensor sensitivity.<BR>
265
;;  sensitivity == 0x00 disables the TS so that Pin RD.4 (J14 of the core module)
266
;;  won't be driven by MIOS anymore and therefore is free for other purposes
267
;;  IN:	  sensitivity value in WREG
268
;;  C_IN: sensitivity value in <sensitivity>
269
;;  OUT:  -
270
;;  C_OUT:  -
271
;;  USES: BSR
272
;; --------------------------------------------------------------------------
273
MIOS_SRIO_TS_SensitivitySet
274
	SET_BSR	MIOS_SRIO_TS_SENSITIVITY
275
	movwf	MIOS_SRIO_TS_SENSITIVITY, BANKED
276
	return
277
 
278
;; --------------------------------------------------------------------------
279
;;  FUNCTION: MIOS_SRIO_TS_SensitivityGet
280
;;  C_DECLARATION: unsigned char MIOS_SRIO_TS_SensitivityGet(void)
281
;;  DESCRIPTION: returns the touchsensor sensitivity
282
;;  IN:	  -
283
;;  C_IN:  -
284
;;  OUT:  sensitivity value in MIOS_PARAMETER1 and WREG
285
;;  C_OUT:  sensitivity value
286
;;  USES: BSR
287
;; --------------------------------------------------------------------------
288
MIOS_SRIO_TS_SensitivityGet
289
	SET_BSR	MIOS_SRIO_TS_SENSITIVITY
290
	movf	MIOS_SRIO_TS_SENSITIVITY, W, BANKED
291
	movwf	MIOS_PARAMETER1
292
	return
293
 
294
;; --------------------------------------------------------------------------
295
;;  FUNCTION: MIOS_SRIO_DebounceSet
296
;;  C_DECLARATION: void MIOS_SRIO_DebounceSet(unsigned char debounce_value)
297
;;  DESCRIPTION: sets the debounce counter reload value for the DIN SR registers
298
;;  which are not assigned to rotary encoders to debounce low-quality buttons.<BR><BR>
299
;;
300
;;  Debouncing is realized in the following way: on every button movement the
301
;;  debounce preload value will be loaded into the debounce counter register.
302
;;  The counter will be decremented on every SRIO update cycle. So long as this
303
;;  counter isn't zero, button changes will still be recorded, but they won't trigger
304
;;  the USER_DIN_NotifyToggle function.<BR><BR>
305
;;
306
;;  No (intended) button movement will get lost, but the latency will be
307
;;  increased. Example: if the update frequency is set to 1 mS, and the
308
;;  debounce value to 32, the first button movement will be regognized with
309
;;  a worst-case latency of 1 mS. Every additional button movement which happens
310
;;  within 32 mS will be regognized within a worst-case latency of 32 mS.
311
;;  After the debounce time has passed, the worst-case latency is 1 mS again.<BR><BR>
312
;;
313
;;  Note that in MIOS versions below v1.9c, the debounce counter also affected
314
;;  the rotary encoders and DOUT registers (they where not serviced).<BR>
315
;;  With MIOS V1.9c and higher, this problem doesn't exist anymore and the
316
;;  debouncing feature can be used in nearly all applications.<BR>
317
;;  Only exception: if the application should record pin changes from digital
318
;;  sensors which are switching very fast, then debouncing should be ommited.
319
;;
320
;;  IN:	  debounce counter reload value in WREG
321
;;  C_IN: debounce counter reload value in <debounce_value>
322
;;  OUT:  -
323
;;  C_OUT:  -
324
;;  USES: BSR
325
;; --------------------------------------------------------------------------
326
MIOS_SRIO_DebounceSet
327
	SET_BSR	MIOS_SRIO_DEBOUNCE
328
	movwf	MIOS_SRIO_DEBOUNCE, BANKED
329
	return
330
 
331
;; --------------------------------------------------------------------------
332
;;  FUNCTION: MIOS_SRIO_DebounceGet
333
;;  C_DECLARATION: unsigned char MIOS_SRIO_DebounceGet(void)
334
;;  DESCRIPTION: returns the debounce counter reload value of the DIN SR registers
335
;;  IN:	  -
336
;;  C_IN:  -
337
;;  OUT:  debounce counter reload value in WREG and MIOS_PARAMETER1
338
;;  C_OUT:  debounce counter reload value
339
;;  USES: BSR
340
;; --------------------------------------------------------------------------
341
MIOS_SRIO_DebounceGet
342
	SET_BSR	MIOS_SRIO_DEBOUNCE
343
	movf	MIOS_SRIO_DEBOUNCE, W, BANKED
344
	movwf	MIOS_PARAMETER1
345
	return
346
 
347
 
348
 
349
;; --------------------------------------------------------------------------
350
;;  INTERNAL
351
;;  MIOS SRIO Get: returns value from a DIN/DOUT register
352
;;  IN:	  Pin number in WREG, register address in FSR0
353
;;  OUT:  1 if pin is +5V, 0 if pin is 0V in MIOS_PARAMETER1 and WREG
354
;;  USES: FSR1 and BSR
355
;; --------------------------------------------------------------------------
356
MIOS_SRIO_Get
357
	movwf	MIOS_PARAMETER1
358
 
359
	rlf	WREG, F
360
	swapf	WREG, W
361
	andlw	0x0f
362
	addwf	FSR1L, F
363
 
364
	movf	MIOS_PARAMETER1, W
365
	andlw	0x07
366
	call	MIOS_HLP_GetBitORMask
367
	andwf	INDF1, W
368
	movlw	0x00
369
	skpz
370
	movlw	0x01
371
	andlw	0x01					; for correct status (Z flag set/not set...)
372
	movwf	MIOS_PARAMETER1
373
	return
374
 
375
;; --------------------------------------------------------------------------
376
;;  INTERNAL
377
;;  MIOS SRIO Get2: returns value from two DIN/DOUT Neighbour Pins
378
;;  IN:	  number of first Pin in WREG, register address in FSR
379
;;  OUT:  0, 1, 2, 3 in MIOS_PARAMETER1 and WREG
380
;;  USES: FSR1 and BSR
381
;; --------------------------------------------------------------------------
382
MIOS_SRIO_Get2
383
	movwf	MIOS_PARAMETER1
384
 
385
	rlf	WREG, F
386
	swapf	WREG, W
387
	andlw	0x0f
388
	addwf	FSR1L, F
389
 
390
	BRA_IFSET MIOS_PARAMETER1, 2, ACCESS, MIOS_SRIO_Get2_Cont_Pin4567
391
MIOS_SRIO_Get2_Cont_Pin0123
392
	BRA_IFSET MIOS_PARAMETER1, 1, ACCESS, MIOS_SRIO_Get2_Cont_Pin23
393
MIOS_SRIO_Get2_Cont_Pin01
394
	movlw	0x00
395
	btfsc	INDF1, 0
396
	iorlw	0x01
397
	btfsc	INDF1, 1
398
	iorlw	0x02
399
	rgoto	MIOS_SRIO_Get2_End
400
 
401
MIOS_SRIO_Get2_Cont_Pin23
402
	movlw	0x00
403
	btfsc	INDF1, 2
404
	iorlw	0x01
405
	btfsc	INDF1, 3
406
	iorlw	0x02
407
	rgoto	MIOS_SRIO_Get2_End
408
 
409
MIOS_SRIO_Get2_Cont_Pin4567
410
	BRA_IFSET MIOS_PARAMETER1, 1, ACCESS, MIOS_SRIO_Get2_Cont_Pin67
411
MIOS_SRIO_Get2_Cont_Pin45
412
	movlw	0x00
413
	btfsc	INDF1, 4
414
	iorlw	0x01
415
	btfsc	INDF1, 5
416
	iorlw	0x02
417
	rgoto	MIOS_SRIO_Get2_End
418
 
419
MIOS_SRIO_Get2_Cont_Pin67
420
	movlw	0x00
421
	btfsc	INDF1, 6
422
	iorlw	0x01
423
	btfsc	INDF1, 7
424
	iorlw	0x02
425
	;; 	rgoto	MIOS_SRIO_Get2_End
426
 
427
MIOS_SRIO_Get2_End
428
	andlw	0x03					; for correct status (Z flag set/not set...)
429
	movwf	MIOS_PARAMETER1
430
	return
431
 
432
;; --------------------------------------------------------------------------
433
;;  INTERNAL
434
;;  MIOS SRIO Set0: sets DIN/DOUT/CHANGED register flag to 0
435
;;  IN:	  Pin number in WREG, register address in FSR0
436
;;  OUT:  -
437
;;  USES: FSR1 and BSR
438
;; --------------------------------------------------------------------------
439
MIOS_SRIO_Set0
440
	movwf	MIOS_PARAMETER1
441
 
442
	rlf	WREG, F
443
	swapf	WREG, W
444
	andlw	0x0f
445
	addwf	FSR1L, F
446
 
447
	movf	MIOS_PARAMETER1, W
448
	andlw	0x07
449
	call	MIOS_HLP_GetBitANDMask
450
	andwf	INDF1, F
451
	return
452
 
453
;; --------------------------------------------------------------------------
454
;;  INTERNAL
455
;;  MIOS SRIO Set0: sets DIN/DOUT register flag to 0
456
;;  IN:	  Pin number in WREG, register address in FSR0
457
;;  OUT:  -
458
;;  USES: FSR1 and BSR
459
;; --------------------------------------------------------------------------
460
MIOS_SRIO_Set1
461
	movwf	MIOS_PARAMETER1
462
 
463
	rlf	WREG, F
464
	swapf	WREG, W
465
	andlw	0x0f
466
	addwf	FSR1L, F
467
 
468
	movf	MIOS_PARAMETER1, W
469
	andlw	0x07
470
	call	MIOS_HLP_GetBitORMask
471
	iorwf	INDF1, F
472
	return
473
 
474
;; --------------------------------------------------------------------------
475
;;  INTERNAL
476
;;  MIOS SRIO Set00: clears two neighboured DIN/DOUT/CHANGED register flags
477
;;  IN:	  Number of first pin in WREG, register address in FSR0
478
;;  OUT:  -
479
;;  USES: FSR1 and BSR
480
;; --------------------------------------------------------------------------
481
MIOS_SRIO_Set00
482
	movwf	MIOS_PARAMETER1
483
 
484
	rlf	WREG, F
485
	swapf	WREG, W
486
	andlw	0x0f
487
	addwf	FSR1L, F
488
 
489
	BRA_IFSET MIOS_PARAMETER1, 2, ACCESS, MIOS_SRIO_Set00_Cont_Pin4567
490
MIOS_SRIO_Set00_Cont_Pin0123
491
	BRA_IFSET MIOS_PARAMETER1, 1, ACCESS, MIOS_SRIO_Set00_Cont_Pin23
492
MIOS_SRIO_Set00_Cont_Pin01
493
	movlw	0xfc
494
	rgoto	MIOS_SRIO_Set00_End
495
 
496
MIOS_SRIO_Set00_Cont_Pin23
497
	movlw	0xf3
498
	rgoto	MIOS_SRIO_Set00_End
499
 
500
MIOS_SRIO_Set00_Cont_Pin4567
501
	BRA_IFSET MIOS_PARAMETER1, 1, ACCESS, MIOS_SRIO_Set00_Cont_Pin67
502
MIOS_SRIO_Set00_Cont_Pin45
503
	movlw	0xcf
504
	rgoto	MIOS_SRIO_Set00_End
505
 
506
MIOS_SRIO_Set00_Cont_Pin67
507
	movlw	0x3f
508
	;; 	rgoto	MIOS_SRIO_Set00_End
509
 
510
MIOS_SRIO_Set00_End
511
	andwf	INDF1, F
512
	return