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53 tk 1
; $Id: mios_glcd0.inc 53 2008-01-30 22:52:41Z tk $
1 tk 2
;
3
; MIOS Dotmatrix graphical LCD Driver (1st layer routines)
4
; for KS0108 and HD61202 compatible displays
5
;
6
; ==========================================================================
7
;
8
;  Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
9
;  Licensed for personal non-commercial use only.
10
;  All other rights reserved.
11
;
12
; ==========================================================================
13
 
14
;; Pins of LC-Display
15
MIOS_GLCD0_LAT_D	EQU	LATB	; Pin B.7-0
16
MIOS_GLCD0_PORT_D	EQU	PORTB
17
MIOS_GLCD0_TRIS_D	EQU	TRISB
18
 
19
MIOS_GLCD0_LAT_E	EQU	LATD	; Pin D.7
20
MIOS_GLCD0_PIN_E	EQU	7
21
MIOS_GLCD0_LAT_RW	EQU	LATD	; Pin D.6
22
MIOS_GLCD0_PIN_RW	EQU	6
23
MIOS_GLCD0_LAT_RS	EQU	LATD	; Pin D.5
24
MIOS_GLCD0_PIN_RS	EQU	5
25
 
26
MIOS_GLCD0_LAT_CS1	EQU	LATC		; Pin C.5
27
MIOS_GLCD0_PIN_CS1	EQU	5
28
MIOS_GLCD0_LAT_CS2	EQU	LATC		; Pin C.4
29
MIOS_GLCD0_PIN_CS2	EQU	4
30
MIOS_GLCD0_LAT_CS3	EQU	LATD		; Pin D.0
31
MIOS_GLCD0_PIN_CS3	EQU	0
32
MIOS_GLCD0_LAT_CS4	EQU	LATC		; Pin C.2
33
MIOS_GLCD0_PIN_CS4	EQU	2
34
 
35
;; ; CS inversion flag
36
MIOS_GLCD0_CS_INV	EQU	MIOS_LCD_OPTION1
37
 
38
;; TIMEOUT1 is used to enable/disable the four display segments
39
MIOS_GLCD0_SEG_DISABLED EQU	MIOS_LCD_TIMEOUT1
40
 
41
;; --------------------------------------------------------------------------
42
;;  Init Routine for graphic LC Display
43
;; --------------------------------------------------------------------------
44
MIOS_GLCD0_Init
45
	;; notify that a graphical LCD has been connected
46
	bsf	MIOS_BOX_CFG0, MIOS_BOX_CFG0_USE_GLCD
47
 
48
	; (Initialization of Ports: done in Init_Ports)
49
	SET_BSR	MIOS_GLCD0_SEG_DISABLED
50
	clrf	MIOS_GLCD0_SEG_DISABLED, BANKED	; see MIOS_GLCD0_WaitUnbusy for the purpose
51
 
52
	movlw	50			; 50 ms delay
53
	call	MIOS_Delay
54
 
55
	movlw	0x3e + 1		; Display On command
56
	rcall	MIOS_GLCD0_Cmd
57
 
58
	rgoto	MIOS_GLCD0_Clear
59
 
60
;; ==========================================================================
61
 
62
;; --------------------------------------------------------------------------
63
;;  Send data word to display and increment cursor
64
;; --------------------------------------------------------------------------
65
MIOS_GLCD0_Data
66
	;; store byte in data latch
67
	movwf	MIOS_GLCD0_LAT_D
68
 
69
	;; wait until LCD unbusy - zero flag set when segment enabled
70
	rcall	MIOS_GLCD0_WaitUnbusy
71
	bnz	MIOS_GLCD0_Data_End
72
 
73
	;; select data register
74
        bsf     MIOS_GLCD0_LAT_RS, MIOS_GLCD0_PIN_RS
75
 
76
	;; set write
77
        bcf     MIOS_GLCD0_LAT_RW, MIOS_GLCD0_PIN_RW	; LCD_WRITE
78
 
79
	IRQ_DISABLE
80
	;; determine chip select line(s)
81
	rcall	MIOS_GLCD0_DetermineCS
82
 
83
	;; strobe bus
84
        bsf     MIOS_GLCD0_LAT_E, MIOS_GLCD0_PIN_E
85
	nop
86
	nop
87
	nop
88
	nop
89
        bcf     MIOS_GLCD0_LAT_E, MIOS_GLCD0_PIN_E
90
	IRQ_ENABLE
91
 
92
MIOS_GLCD0_Data_End
93
	;; increment graphical cursor
94
	incf	MIOS_GLCD_GCURSOR_X, F, BANKED
95
 
96
	movf	MIOS_GLCD_GCURSOR_X, W, BANKED
97
	andlw	0x3f
98
	skpz
99
	return
100
 
101
	movlw	0x40
102
	;; 	rgoto	MIOS_GLCD0_Cmd
103
 
104
;; ==========================================================================
105
 
106
;; --------------------------------------------------------------------------
107
;;  Send display command
108
;; --------------------------------------------------------------------------
109
MIOS_GLCD0_Cmd
110
	;; store byte in data latch
111
	movwf	MIOS_GLCD0_LAT_D
112
 
113
	;; wait until LCD unbusy - zero flag set when segment enabled
114
	rcall	MIOS_GLCD0_WaitUnbusy
115
	bnz	MIOS_GLCD0_Cmd_End
116
 
117
	;; select command register
118
        bcf     MIOS_GLCD0_LAT_RS, MIOS_GLCD0_PIN_RS
119
 
120
	;; set write
121
        bcf     MIOS_GLCD0_LAT_RW, MIOS_GLCD0_PIN_RW	; LCD_WRITE
122
 
123
	IRQ_DISABLE
124
	;; determine chip select line(s)
125
	rcall	MIOS_GLCD0_DetermineCS
126
 
127
	;; strobe bus
128
        bsf     MIOS_GLCD0_LAT_E, MIOS_GLCD0_PIN_E
129
	nop
130
	nop
131
	nop
132
	nop
133
        bcf     MIOS_GLCD0_LAT_E, MIOS_GLCD0_PIN_E
134
	IRQ_ENABLE
135
 
136
MIOS_GLCD0_Cmd_End
137
	return
138
 
139
;; --------------------------------------------------------------------------
140
;;  INTERNAL: wait until LCD unbusy
141
;;  In:  -
142
;;  Out: sets the zero flag when display enabled
143
;; --------------------------------------------------------------------------
144
MIOS_GLCD0_WaitUnbusy
145
	;; exit if LCD not available due to timeout
146
	rcall	MIOS_GLCD0_GetCSMask
147
	andwf	MIOS_GLCD0_SEG_DISABLED, W, BANKED
148
	bnz	MIOS_GLCD0_WaitUnbusy_End
149
 
150
	;; turn off output drivers
151
	setf	MIOS_GLCD0_TRIS_D
152
 
153
	;; select command register
154
        bcf     MIOS_GLCD0_LAT_RS, MIOS_GLCD0_PIN_RS
155
 
156
	;; set read
157
        bsf     MIOS_GLCD0_LAT_RW, MIOS_GLCD0_PIN_RW	; LCD_READ
158
 
159
	;; poll busy bit
160
	clrf	MIOS_LCD_TIMEOUT0, BANKED
161
MIOS_GLCD0_WaitUnbusy_Loop
162
        bcf     MIOS_GLCD0_LAT_E, MIOS_GLCD0_PIN_E
163
	IRQ_ENABLE
164
 
165
	;; increment timeout counter
166
	incf	MIOS_LCD_TIMEOUT0, F, BANKED
167
	; leave loop on overrun and disable segment
168
	bz	MIOS_GLCD0_WaitUnbusy_Disable
169
 
170
	IRQ_DISABLE
171
	;; determine chip select lines
172
	rcall	MIOS_GLCD0_DetermineCS
173
 
174
	;; strobe bus
175
        bsf     MIOS_GLCD0_LAT_E, MIOS_GLCD0_PIN_E
176
	nop
177
	nop
178
	nop
179
	;; check bit 7 of command register
180
	BRA_IFSET MIOS_GLCD0_PORT_D, 7, ACCESS, MIOS_GLCD0_WaitUnbusy_Loop
181
        bcf     MIOS_GLCD0_LAT_E, MIOS_GLCD0_PIN_E
182
 
183
	;; set zero flag
184
	bsf	STATUS, Z
185
 
186
MIOS_GLCD0_WaitUnbusy_End
187
	;; enable interrupts again
188
	IRQ_ENABLE
189
	;; enable output driver again
190
        clrf    MIOS_GLCD0_TRIS_D
191
	return
192
 
193
MIOS_GLCD0_WaitUnbusy_Disable
194
	;; LCD timeout: set disable bit, busy routine will never be called again for this segment
195
	rcall	MIOS_GLCD0_GetCSMask
196
	iorwf	MIOS_GLCD0_SEG_DISABLED, F, BANKED
197
 
198
	;; clear zero flag (just to ensure, the last operation already cleared it)
199
	bcf	STATUS, Z
200
 
201
	rgoto	MIOS_GLCD0_WaitUnbusy_End
202
 
203
 
204
;; --------------------------------------------------------------------------
205
;;  Determine Chip Select Line
206
;; --------------------------------------------------------------------------
207
MIOS_GLCD0_DetermineCS
208
	SET_BSR	MIOS_LCD_OPTION1
209
	BRA_IFSET MIOS_LCD_OPTION1, 0, ACCESS, MIOS_GLCD0_DetermineCSInv
210
 
211
MIOS_GLCD0_DetermineCSNonInv
212
	BRA_IFSET MIOS_GLCD0_LAT_RS, MIOS_GLCD0_PIN_RS, ACCESS, MIOS_GLCD0_DetermineCS_Data
213
	BRA_IFSET MIOS_GLCD0_LAT_RW, MIOS_GLCD0_PIN_RW, ACCESS, MIOS_GLCD0_DetermineCS_Data
214
 
215
	;; set all chip select lines on commands
216
        bsf     MIOS_GLCD0_LAT_CS1, MIOS_GLCD0_PIN_CS1
217
        bsf     MIOS_GLCD0_LAT_CS2, MIOS_GLCD0_PIN_CS2
218
        bsf     MIOS_GLCD0_LAT_CS3, MIOS_GLCD0_PIN_CS3
219
        bsf     MIOS_GLCD0_LAT_CS4, MIOS_GLCD0_PIN_CS4
220
	return
221
 
222
MIOS_GLCD0_DetermineCS_Data
223
	;; set only one chip select line on data transfers
224
	BRA_IFSET MIOS_GLCD_GCURSOR_X, 7, BANKED, MIOS_GLCD0_DetermineCS_34
225
MIOS_GLCD0_DetermineCS_12
226
	BRA_IFSET MIOS_GLCD_GCURSOR_X, 6, BANKED, MIOS_GLCD0_DetermineCS_2
227
MIOS_GLCD0_DetermineCS_1
228
        bsf     MIOS_GLCD0_LAT_CS1, MIOS_GLCD0_PIN_CS1
229
        bcf     MIOS_GLCD0_LAT_CS2, MIOS_GLCD0_PIN_CS2
230
        bcf     MIOS_GLCD0_LAT_CS3, MIOS_GLCD0_PIN_CS3
231
        bcf     MIOS_GLCD0_LAT_CS4, MIOS_GLCD0_PIN_CS4
232
	return
233
MIOS_GLCD0_DetermineCS_2
234
        bcf     MIOS_GLCD0_LAT_CS1, MIOS_GLCD0_PIN_CS1
235
        bsf     MIOS_GLCD0_LAT_CS2, MIOS_GLCD0_PIN_CS2
236
        bcf     MIOS_GLCD0_LAT_CS3, MIOS_GLCD0_PIN_CS3
237
        bcf     MIOS_GLCD0_LAT_CS4, MIOS_GLCD0_PIN_CS4
238
	return
239
 
240
MIOS_GLCD0_DetermineCS_34
241
	BRA_IFSET MIOS_GLCD_GCURSOR_X, 6, BANKED, MIOS_GLCD0_DetermineCS_4
242
MIOS_GLCD0_DetermineCS_3
243
        bcf     MIOS_GLCD0_LAT_CS1, MIOS_GLCD0_PIN_CS1
244
        bcf     MIOS_GLCD0_LAT_CS2, MIOS_GLCD0_PIN_CS2
245
        bsf     MIOS_GLCD0_LAT_CS3, MIOS_GLCD0_PIN_CS3
246
        bcf     MIOS_GLCD0_LAT_CS4, MIOS_GLCD0_PIN_CS4
247
	return
248
MIOS_GLCD0_DetermineCS_4
249
        bcf     MIOS_GLCD0_LAT_CS1, MIOS_GLCD0_PIN_CS1
250
        bcf     MIOS_GLCD0_LAT_CS2, MIOS_GLCD0_PIN_CS2
251
        bcf     MIOS_GLCD0_LAT_CS3, MIOS_GLCD0_PIN_CS3
252
        bsf     MIOS_GLCD0_LAT_CS4, MIOS_GLCD0_PIN_CS4
253
	return
254
 
255
 
256
;; ----
257
 
258
MIOS_GLCD0_DetermineCSInv
259
	BRA_IFSET MIOS_GLCD0_LAT_RS, MIOS_GLCD0_PIN_RS, ACCESS, MIOS_GLCD0_DetermineCSInv_Data
260
	BRA_IFSET MIOS_GLCD0_LAT_RW, MIOS_GLCD0_PIN_RW, ACCESS, MIOS_GLCD0_DetermineCSInv_Data
261
 
262
	;; set all chip select lines on commands
263
        bcf     MIOS_GLCD0_LAT_CS1, MIOS_GLCD0_PIN_CS1
264
        bcf     MIOS_GLCD0_LAT_CS2, MIOS_GLCD0_PIN_CS2
265
        bcf     MIOS_GLCD0_LAT_CS3, MIOS_GLCD0_PIN_CS3
266
        bcf     MIOS_GLCD0_LAT_CS4, MIOS_GLCD0_PIN_CS4
267
	return
268
 
269
MIOS_GLCD0_DetermineCSInv_Data
270
	;; set only one chip select line on data transfers
271
	BRA_IFSET MIOS_GLCD_GCURSOR_X, 7, BANKED, MIOS_GLCD0_DetermineCSInv_34
272
MIOS_GLCD0_DetermineCSInv_12
273
	BRA_IFSET MIOS_GLCD_GCURSOR_X, 6, BANKED, MIOS_GLCD0_DetermineCSInv_2
274
MIOS_GLCD0_DetermineCSInv_1
275
        bcf     MIOS_GLCD0_LAT_CS1, MIOS_GLCD0_PIN_CS1
276
        bsf     MIOS_GLCD0_LAT_CS2, MIOS_GLCD0_PIN_CS2
277
        bsf     MIOS_GLCD0_LAT_CS3, MIOS_GLCD0_PIN_CS3
278
        bsf     MIOS_GLCD0_LAT_CS4, MIOS_GLCD0_PIN_CS4
279
	return
280
MIOS_GLCD0_DetermineCSInv_2
281
        bsf     MIOS_GLCD0_LAT_CS1, MIOS_GLCD0_PIN_CS1
282
        bcf     MIOS_GLCD0_LAT_CS2, MIOS_GLCD0_PIN_CS2
283
        bsf     MIOS_GLCD0_LAT_CS3, MIOS_GLCD0_PIN_CS3
284
        bsf     MIOS_GLCD0_LAT_CS4, MIOS_GLCD0_PIN_CS4
285
	return
286
 
287
MIOS_GLCD0_DetermineCSInv_34
288
	BRA_IFSET MIOS_GLCD_GCURSOR_X, 6, BANKED, MIOS_GLCD0_DetermineCSInv_4
289
MIOS_GLCD0_DetermineCSInv_3
290
        bsf     MIOS_GLCD0_LAT_CS1, MIOS_GLCD0_PIN_CS1
291
        bsf     MIOS_GLCD0_LAT_CS2, MIOS_GLCD0_PIN_CS2
292
        bcf     MIOS_GLCD0_LAT_CS3, MIOS_GLCD0_PIN_CS3
293
        bsf     MIOS_GLCD0_LAT_CS4, MIOS_GLCD0_PIN_CS4
294
	return
295
MIOS_GLCD0_DetermineCSInv_4
296
        bsf     MIOS_GLCD0_LAT_CS1, MIOS_GLCD0_PIN_CS1
297
        bsf     MIOS_GLCD0_LAT_CS2, MIOS_GLCD0_PIN_CS2
298
        bsf     MIOS_GLCD0_LAT_CS3, MIOS_GLCD0_PIN_CS3
299
        bcf     MIOS_GLCD0_LAT_CS4, MIOS_GLCD0_PIN_CS4
300
	return
301
 
302
;; ==========================================================================
303
 
304
;; --------------------------------------------------------------------------
305
;;  returns the CS mask [3..0]
306
;; --------------------------------------------------------------------------
307
MIOS_GLCD0_GetCSMask
308
	SET_BSR	MIOS_GLCD_GCURSOR_X
309
	BRA_IFSET MIOS_GLCD_GCURSOR_X, 7, BANKED, MIOS_GLCD0_GetCSMask_48
310
MIOS_GLCD0_GetCSMask_12
311
	btfss	MIOS_GLCD_GCURSOR_X, 6, BANKED
312
	retlw (1 << 0)
313
	retlw	(1 << 1)
314
MIOS_GLCD0_GetCSMask_48
315
	btfss	MIOS_GLCD_GCURSOR_X, 6, BANKED
316
	retlw (1 << 2)
317
	retlw	(1 << 3)
318
 
319
;; ==========================================================================
320
 
321
;; --------------------------------------------------------------------------
322
;;  Write a 5x8 character on display
323
;;  (compatible to MIOS_CLCD_PrintChar)
324
;; --------------------------------------------------------------------------
325
MIOS_GLCD0_PrintChar
326
	;; calc offset address to character
327
	SET_BSR	MIOS_GLCD_TMP1
328
	movwf	MIOS_GLCD_TMP1, BANKED
329
 
330
	;; how much bytes per character?
331
	movf	MIOS_GLCD_FONT_OFFSET, W, BANKED
332
	mulwf	MIOS_GLCD_FONT_HEIGHT, BANKED
333
 
334
	;; multiply with character value
335
	movf	MIOS_GLCD_TMP1, W, BANKED
336
	mulwf	PRODL
337
 
338
	movff	TBLPTRL, MIOS_GLCD_TMP1		; store current TBLPTR in temp. register
339
	movff	TBLPTRH, MIOS_GLCD_TMP2
340
#if PIC_DERIVATIVE_CODE_SIZE > 0x10000
341
	movff	TBLPTRU, MIOS_GLCD_TMP3
342
#endif
343
 
344
	movf	MIOS_GLCD_FONT_PTRL, W, BANKED
345
	addwf	MIOS_GLCD_FONT_X0, W, BANKED
346
	addwf	PRODL, W
347
	movwf	TBLPTRL
348
	movf	MIOS_GLCD_FONT_PTRH, W, BANKED
349
	addwfc	PRODH, W
350
	movwf	TBLPTRH
351
#if PIC_DERIVATIVE_CODE_SIZE > 0x10000
352
	movlw	0
353
	addwfc	MIOS_GLCD_FONT_PTRU, W, BANKED
354
	movwf	TBLPTRU
355
#endif
356
 
357
	movf	MIOS_GLCD_FONT_HEIGHT, W, BANKED
358
	movwf	FSR1H
359
MIOS_GLCD0_PrintCharOuterLoop
360
	movf	MIOS_GLCD_FONT_WIDTH, W, BANKED
361
	movwf	FSR1L
362
MIOS_GLCD0_PrintCharLoop
363
	tblrd*+				; read from flash and increment table pointer
364
	movf	TABLAT, W		; get result
365
	rcall	MIOS_GLCD0_Data		; write out
366
	decfsz	FSR1L, F		; loop until zero
367
	rgoto	MIOS_GLCD0_PrintCharLoop
368
 
369
	dcfsnz	FSR1H, F
370
	rgoto	MIOS_GLCD0_PrintCharLoop_End
371
 
372
	movf	MIOS_GLCD_FONT_WIDTH, W, BANKED
373
	subwf	MIOS_GLCD_FONT_OFFSET, W, BANKED
374
	bz	MIOS_GLCD0_PrintCharFixLoopEnd
375
	movwf	FSR1L
376
MIOS_GLCD0_PrintCharFixLoop
377
	tblrd*+
378
	decfsz	FSR1L, F
379
	rgoto	MIOS_GLCD0_PrintCharFixLoop
380
 
381
MIOS_GLCD0_PrintCharFixLoopEnd
382
 
383
	incf	MIOS_GLCD_GCURSOR_Y, F, BANKED
384
	movf	MIOS_GLCD_FONT_WIDTH, W, BANKED
385
	subwf	MIOS_GLCD_GCURSOR_X, F, BANKED
386
	rcall	MIOS_GLCD0_GCursorSet
387
 
388
	rgoto	MIOS_GLCD0_PrintCharOuterLoop
389
 
390
MIOS_GLCD0_PrintCharLoop_End
391
	decf	MIOS_GLCD_FONT_HEIGHT, W, BANKED
392
	bz	MIOS_GLCD0_PrintChar_NoYFix
393
	comf	MIOS_GLCD_FONT_HEIGHT, W, BANKED
394
	addlw	2
395
	addwf	MIOS_GLCD_GCURSOR_Y, F, BANKED
396
	rcall	MIOS_GLCD0_GCursorSet
397
MIOS_GLCD0_PrintChar_NoYFix
398
	movff	MIOS_GLCD_TMP1, TBLPTRL		; restore TBLPTR from temp. register
399
	movff	MIOS_GLCD_TMP2, TBLPTRH
400
#if PIC_DERIVATIVE_CODE_SIZE > 0x10000
401
	movff	MIOS_GLCD_TMP3, TBLPTRU
402
#endif
403
	return
404
 
405
 
406
;; ==========================================================================
407
 
408
;; --------------------------------------------------------------------------
409
;;  F-UNCTION: MIOS_GLCD_GCursorSet
410
;;  DESCRIPTION: sets the graphical cursor on a LCD screen
411
;;  Note that this function works with graphical LCDs only!
412
;;  IN:	  X position in WREG (0-239)
413
;;        Y position in MIOS_PARAMETER1 (0-7)
414
;;  OUT:  -
415
;;  USES: BRS, TBLPTR
416
;;  EXAMPLES:
417
;;	;; set graphical cursor to 160/7:
418
;;	movlw	7
419
;;	movwf	MIOS_PARAMETER1
420
;;	movlw	160
421
;;	call	MIOS_GLCD_GCursorSet
422
;; --------------------------------------------------------------------------
423
MIOS_GLCD0_GCursorSet
424
	;; Set X position
425
	SET_BSR	MIOS_GLCD_GCURSOR_X
426
	movf	MIOS_GLCD_GCURSOR_X, W, BANKED
427
	andlw	0x3f
428
	iorlw	0x40
429
	rcall	MIOS_GLCD0_Cmd
430
 
431
	;; set Y position
432
	movf	MIOS_GLCD_GCURSOR_Y, W, BANKED
433
	andlw	0x07
434
	iorlw	0xb8
435
	rgoto	MIOS_GLCD0_Cmd
436
 
437
;; ==========================================================================
438
 
439
;; --------------------------------------------------------------------------
440
;;  Clear the display and set cursor to 0
441
;;  (compatible to MIOS_CLCD_Clear)
442
;; --------------------------------------------------------------------------
443
MIOS_GLCD0_Clear
444
	SET_BSR MIOS_GLCD_GCURSOR_Y	; 8 lines to clear
445
	clrf	MIOS_GLCD_GCURSOR_Y, BANKED
446
MIOS_GLCD0_ClearOuterLoop
447
	SET_BSR MIOS_GLCD_GCURSOR_X	; 256 columns to clear
448
	clrf	MIOS_GLCD_GCURSOR_X, BANKED
449
	rcall	MIOS_GLCD0_GCursorSet
450
 
451
MIOS_GLCD0_ClearInnerLoop
452
	movlw	0x00
453
	rcall	MIOS_GLCD0_Data
454
	movf	MIOS_GLCD_GCURSOR_X, W, BANKED
455
	bnz	MIOS_GLCD0_ClearInnerLoop
456
 
457
	incf	MIOS_GLCD_GCURSOR_Y, F, BANKED
458
	BRA_IFCLR MIOS_GLCD_GCURSOR_Y, 3, BANKED, MIOS_GLCD0_ClearOuterLoop
459
 
460
	movlw	0xc0 + 0		; Set Y0=0
461
	rcall	MIOS_GLCD0_Cmd
462
 
463
	movlw	0x00			; Set Y=0, X=0
464
	rgoto	MIOS_GLCD_CursorSet
465
 
466
;; ==========================================================================
467
 
468
 
469
;; ==========================================================================
470