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53 tk 1
; $Id: mios_clcd.inc 53 2008-01-30 22:52:41Z tk $
1 tk 2
;
3
; MIOS Dotmatrix LCD Driver (1st layer routines)
4
;
5
; ==========================================================================
6
;
7
;  Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
8
;  Licensed for personal non-commercial use only.
9
;  All other rights reserved.
10
;
11
; ==========================================================================
12
 
13
;; Pins of LC-Display
14
MIOS_CLCD_LAT_D		EQU	LATB	; Pin B.7-0
15
MIOS_CLCD_PORT_D	EQU     PORTB
16
MIOS_CLCD_TRIS_D	EQU     TRISB
17
 
18
MIOS_CLCD_LAT_RW	EQU     LATD
19
MIOS_CLCD_PIN_RW	EQU     6               ; Pin D.6
20
MIOS_CLCD_LAT_RS	EQU     LATD
21
MIOS_CLCD_PIN_RS	EQU     5               ; Pin D.5
22
 
23
;; E pins now defined as MIOS_LCD_OPTION1 and MIOS_LCD_OPTION2
24
;;MIOS_CLCD_LAT_E	EQU     LATD		; Pin D.7
25
;;MIOS_CLCD_PIN_E	EQU     7
26
;;MIOS_CLCD_LAT_E2	EQU	LATC		; Pin C.4
27
;;MIOS_CLCD_PIN_E2	EQU	4
28
 
29
;; new names for CLCD registers
30
MIOS_CLCD_PIN_E0	EQU	MIOS_LCD_OPTION1; (CLCD, enable pin for display #1)
31
MIOS_CLCD_PIN_E1	EQU	MIOS_LCD_OPTION2; (CLCD, enable pin for display #2)
32
MIOS_CLCD_SC_CTR	EQU	MIOS_GLCD_TMP1
33
MIOS_CLCD_PIN_E		EQU	MIOS_GLCD_TMP2
34
MIOS_CLCD_STATUS	EQU	MIOS_GLCD_TMP3
35
 
36
#define MIOS_CLCD_STATUS_LCD0_DISABLED	0	; bit0:	if set, first LCD disabled
37
#define MIOS_CLCD_STATUS_LCD1_DISABLED	1	; bit1:	if set, second LCD disabled
38
#define MIOS_CLCD_STATUS_CUR_DISABLED	2	; bit2:	if set, currently selected LCD disabled
39
#define MIOS_CLCD_STATUS_CUR_LCD	3	; bit3: if cleared: current LCD is first LCD, else second LCD
40
 
41
;; --------------------------------------------------------------------------
42
;;  Init Routine for LC Display
43
;; --------------------------------------------------------------------------
44
MIOS_CLCD_Init
45
	;; notify that no graphical LCD is connected
46
	bcf	MIOS_BOX_CFG0, MIOS_BOX_CFG0_USE_GLCD
47
 
48
	; (Initialization of Ports: done in Init_Ports)
49
	SET_BSR	MIOS_LCD_TIMEOUT1
50
	clrf	MIOS_CLCD_STATUS, BANKED
51
 
52
	movlw	100			; 100 ms delay
53
	call	MIOS_Delay
54
 
55
        bcf     MIOS_CLCD_LAT_RW, MIOS_CLCD_PIN_RW	; LCD_WRITE
56
        bcf     MIOS_CLCD_LAT_RS, MIOS_CLCD_PIN_RS	; MIOS_CLCD_PIN_RS_0
57
 
58
	;; initialize first LCD
59
	rcall	MIOS_CLCD_Strobe_Prepare; prepare pointer to strobe pin
60
	rcall	MIOS_CLCD_Init_Cmds	; call init commands
61
 
62
	;; initialize second LCD if MIOS_LCD_Y2_OFFSET[7] or MIOS_LCD_Y3_OFFSET[7] set
63
	BRA_IFSET MIOS_LCD_Y2_OFFSET, 7, BANKED, MIOS_CLCD_Init_2nd
64
	BRA_IFSET MIOS_LCD_Y3_OFFSET, 7, BANKED, MIOS_CLCD_Init_2nd
65
	;; else disable second LCD and return
66
	bsf	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_LCD1_DISABLED, BANKED
67
	return
68
 
69
MIOS_CLCD_Init_2nd
70
	bsf	MIOS_LCD_CURSOR_POS, 7, BANKED	; select second display
71
	rcall	MIOS_CLCD_Strobe_Prepare; prepare pointer to strobe pin
72
	rcall	MIOS_CLCD_Init_Cmds	; call init commands
73
	bcf	MIOS_LCD_CURSOR_POS, 7, BANKED	; reset to first display
74
 
75
	return
76
 
77
 
78
MIOS_CLCD_Init_Cmds
79
	movlw	0x30
80
	movwf	MIOS_CLCD_LAT_D
81
	rcall	MIOS_CLCD_Strobe_Toggle
82
	movlw	50			; 50 ms delayed toggle
83
	rcall	MIOS_CLCD_Strobe_DelayToggle
84
	movlw	50			; 50 ms delayed toggle
85
	rcall	MIOS_CLCD_Strobe_DelayToggle
86
 
87
	BRA_IFCLR MIOS_CLCD_PIN_E, 7, BANKED, MIOS_CLCD_Init_Cmds_No4Bit
88
MIOS_CLCD_Init_Cmds_4Bit
89
	;; switch to 4bit mode
90
	movlw	0x20
91
	movwf	MIOS_CLCD_LAT_D
92
	movlw	1			; 1 mS delayed toggle
93
	rcall	MIOS_CLCD_Strobe_DelayToggle			; DB7-DB4: 0010
94
 
95
	movlw	1			; 1 mS delayed toggle
96
	rcall	MIOS_CLCD_Strobe_DelayToggle			; DB7-DB4: 0010
97
 
98
	clrf	MIOS_CLCD_LAT_D
99
	movlw	1			; 1 mS delayed toggle
100
	rcall	MIOS_CLCD_Strobe_DelayToggle			; DB7-DB4: 0000 (N/F)
101
 
102
	movlw	1			; 1 mS delayed toggle
103
	rcall	MIOS_CLCD_Strobe_DelayToggle			; DB7-DB4: 0000
104
 
105
	movlw	0x10
106
	movwf	MIOS_CLCD_LAT_D
107
	movlw	1			; 1 mS delayed toggle
108
	rcall	MIOS_CLCD_Strobe_DelayToggle			; DB7-DB4: 0001
109
 
110
	clrf	MIOS_CLCD_LAT_D
111
	movlw	1			; 1 mS delayed toggle
112
	rcall	MIOS_CLCD_Strobe_DelayToggle			; DB7-DB4: 0000
113
MIOS_CLCD_Init_Cmds_No4Bit
114
 
115
	movlw	0x08			; Display Off
116
	rcall	MIOS_CLCD_Cmd
117
	movlw	0x0c			; Display On
118
	rcall	MIOS_CLCD_Cmd
119
	movlw	0x06			; Entry Mode
120
	rcall	MIOS_CLCD_Cmd
121
	movlw	0x01			; Clear Display
122
	call	MIOS_CLCD_Cmd
123
	bcf	MIOS_LCD_TIMEOUT1, 7, BANKED	; everything ok, make sure that LCD_TIMEOUT, bit 7 is cleared
124
 
125
	movlw	0x38					; select 8-bit interface again
126
	btfsc	MIOS_CLCD_PIN_E, 7, BANKED; select 4-bit interface again
127
	movlw 0x28
128
	rcall	MIOS_CLCD_Cmd
129
	movlw	0x0c
130
	rcall	MIOS_CLCD_Cmd
131
	movlw	0x00			; set cursor to zero pos
132
	rgoto	MIOS_CLCD_CursorSet
133
 
134
 
135
;; ==========================================================================
136
 
137
MIOS_CLCD_Data
138
MIOS_CLCD_PrintChar
139
	;; store byte in data latch
140
	movwf	MIOS_CLCD_LAT_D
141
 
142
	;; wait until display unbusy
143
	rcall	MIOS_CLCD_WaitUnbusy
144
 
145
	;; exit if current LCD not available due to timeout
146
	btfsc	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_CUR_DISABLED, BANKED
147
	return
148
 
149
	;; select data register
150
        bsf     MIOS_CLCD_LAT_RS, MIOS_CLCD_PIN_RS
151
 
152
	;; activate write
153
        bcf     MIOS_CLCD_LAT_RW, MIOS_CLCD_PIN_RW
154
 
155
	BRA_IFCLR MIOS_CLCD_PIN_E, 7, BANKED, MIOS_CLCD_Data_No4bit
156
MIOS_CLCD_Data_4bit
157
	;; transfer upper 4 bit
158
	rcall	MIOS_CLCD_Strobe_Toggle
159
	;; transfer lower 4 bit
160
	swapf	MIOS_CLCD_LAT_D, F
161
MIOS_CLCD_Data_No4bit
162
 
163
	;; strobe and exit
164
	rgoto	MIOS_CLCD_Strobe_Toggle
165
 
166
;; ==========================================================================
167
 
168
MIOS_CLCD_Cmd
169
	;; store byte in data latch
170
	movwf	MIOS_CLCD_LAT_D
171
 
172
	;; wait until display unbusy
173
	rcall	MIOS_CLCD_WaitUnbusy
174
 
175
	;; exit if current LCD not available due to timeout
176
	btfsc	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_CUR_DISABLED, BANKED
177
	return
178
 
179
	;; select command register
180
        bcf     MIOS_CLCD_LAT_RS, MIOS_CLCD_PIN_RS
181
 
182
	;; activate write
183
        bcf     MIOS_CLCD_LAT_RW, MIOS_CLCD_PIN_RW
184
 
185
	BRA_IFCLR MIOS_CLCD_PIN_E, 7, BANKED, MIOS_CLCD_Cmd_No4bit
186
MIOS_CLCD_Cmd_4bit
187
	;; transfer upper 4 bit
188
	rcall	MIOS_CLCD_Strobe_Toggle
189
	;; transfer lower 4 bit
190
	swapf	MIOS_CLCD_LAT_D, F
191
MIOS_CLCD_Cmd_No4bit
192
 
193
	;; strobe and exit
194
	rgoto	MIOS_CLCD_Strobe_Toggle
195
 
196
;; --------------------------------------------------------------------------
197
;;  INTERNAL: wait until LCD unbusy
198
;; --------------------------------------------------------------------------
199
MIOS_CLCD_WaitUnbusy
200
	;; prepare strobe address
201
	rcall	MIOS_CLCD_Strobe_Prepare
202
 
203
	;; exit if current LCD not available due to timeout
204
	btfsc	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_CUR_DISABLED, BANKED
205
	return
206
 
207
	;; turn off output drivers
208
	movlw	0xff
209
	btfsc	MIOS_CLCD_PIN_E, 7, BANKED
210
	movlw	0xf0		; (for 4bit mode: don't touch TRISB[3:0]
211
	iorwf	MIOS_CLCD_TRIS_D, F
212
 
213
	;; select command register
214
        bcf     MIOS_CLCD_LAT_RS, MIOS_CLCD_PIN_RS
215
 
216
	;; poll busy bit
217
	clrf	MIOS_LCD_TIMEOUT0, BANKED
218
	clrf	MIOS_LCD_TIMEOUT1, BANKED
219
 
220
        bsf     MIOS_CLCD_LAT_RW, MIOS_CLCD_PIN_RW	; LCD_READ
221
MIOS_CLCD_WaitUnbusy_Loop
222
	rcall	MIOS_CLCD_Strobe_Clr
223
	incf	MIOS_LCD_TIMEOUT0, F, BANKED
224
	skpnz
225
	incf	MIOS_LCD_TIMEOUT1, F, BANKED
226
	bz	MIOS_CLCD_WaitUnbusy_Disable	; leave loop when LCD_TIMEOUT = 0xff. Up to now bit 7 is set and the LCD
227
						; busy routine will never be called again
228
	rcall	MIOS_CLCD_Strobe_Set
229
	BRA_IFCLR MIOS_CLCD_PORT_D, 7, ACCESS, MIOS_CLCD_WaitUnbusy_UnBusy
230
MIOS_CLCD_WaitUnbusy_Busy
231
	;; 8 bit: next iteration
232
	BRA_IFCLR MIOS_CLCD_PIN_E, 7, BANKED, MIOS_CLCD_WaitUnbusy_Loop
233
	;; 4 bit: strobe, thereafter next iteration
234
	rcall	MIOS_CLCD_Strobe_Clr
235
	rcall	MIOS_CLCD_Strobe_Set
236
	rgoto	MIOS_CLCD_WaitUnbusy_Loop
237
 
238
MIOS_CLCD_WaitUnbusy_UnBusy
239
	BRA_IFCLR MIOS_CLCD_PIN_E, 7, BANKED, MIOS_CLCD_WaitUnbusy_No4bit
240
MIOS_CLCD_WaitUnbusy_4bit
241
	rcall	MIOS_CLCD_Strobe_Clr
242
	rcall	MIOS_CLCD_Strobe_Set
243
MIOS_CLCD_WaitUnbusy_No4bit
244
	rcall	MIOS_CLCD_Strobe_Clr
245
 
246
MIOS_CLCD_WaitUnbusy_End
247
	;; turn on output drivers again
248
	movlw	0x00
249
	btfsc	MIOS_CLCD_PIN_E, 7, BANKED
250
	movlw	0x0f		; (for 4bit mode: don't touch TRISB[3:0]
251
	andwf	MIOS_CLCD_TRIS_D, F
252
	return
253
 
254
MIOS_CLCD_WaitUnbusy_Disable
255
	;; disable currently selected LCD
256
	btfss	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_CUR_LCD, BANKED
257
	bsf	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_LCD0_DISABLED, BANKED
258
	btfsc	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_CUR_LCD, BANKED
259
	bsf	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_LCD1_DISABLED, BANKED
260
	rgoto	MIOS_CLCD_WaitUnbusy_End
261
 
262
;; ==========================================================================
263
 
264
MIOS_CLCD_Strobe_Prepare
265
	;; set status flag depending on currently selected LCD
266
	SET_BSR	MIOS_CLCD_STATUS
267
	bcf	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_CUR_DISABLED, BANKED
268
	bcf	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_CUR_LCD, BANKED
269
 
270
	;; determine if first or second E pin should be addressed depending on cursor pos
271
	SET_BSR	MIOS_CLCD_PIN_E
272
	movf	MIOS_CLCD_PIN_E0, W, BANKED
273
	BRA_IFSET MIOS_LCD_Y2_OFFSET, 7, BANKED, MIOS_CLCD_Strobe_Prepare_Chk2nd
274
	BRA_IFSET MIOS_LCD_Y3_OFFSET, 7, BANKED, MIOS_CLCD_Strobe_Prepare_Chk2nd
275
MIOS_CLCD_Strobe_Prepare_Chk2nd
276
	BRA_IFSET MIOS_LCD_CURSOR_POS, 7, BANKED, MIOS_CLCD_Strobe_Prepare_2nd
277
MIOS_CLCD_Strobe_Prepare_1st
278
	;; select current LCD
279
	bcf	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_CUR_LCD, BANKED
280
	;; transfer pin number to MIOS_CLCD_PIN_E
281
	movff	MIOS_CLCD_PIN_E0, MIOS_CLCD_PIN_E
282
	;; set disable flag if required
283
	btfsc	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_LCD0_DISABLED, BANKED
284
	bsf	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_CUR_DISABLED, BANKED
285
	rgoto	MIOS_CLCD_Strobe_Prepare_Cont
286
 
287
MIOS_CLCD_Strobe_Prepare_2nd
288
	;; select current LCD
289
	bsf	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_CUR_LCD, BANKED
290
	;; transfer pin number to MIOS_CLCD_PIN_E
291
	movff	MIOS_CLCD_PIN_E1, MIOS_CLCD_PIN_E
292
	;; set disable flag if required
293
	btfsc	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_LCD1_DISABLED, BANKED
294
	bsf	MIOS_CLCD_STATUS, MIOS_CLCD_STATUS_CUR_DISABLED, BANKED
295
	;; 	rgoto	MIOS_CLCD_Strobe_Prepare_Cont
296
 
297
MIOS_CLCD_Strobe_Prepare_Cont
298
	;; calc address to LATx -> FSR1
299
	lfsr	FSR1, LATA
300
	swapf	MIOS_CLCD_PIN_E, W, BANKED
301
	andlw	0x07
302
	addwf	FSR1L, F
303
	return
304
 
305
;; ----
306
MIOS_CLCD_Strobe_Set
307
	BRA_IFSET MIOS_CLCD_PIN_E, 2, BANKED, MIOS_CLCD_Strobe_Set_4567
308
MIOS_CLCD_Strobe_Set_0123
309
	BRA_IFSET MIOS_CLCD_PIN_E, 1, BANKED, MIOS_CLCD_Strobe_Set_23
310
MIOS_CLCD_Strobe_Set_12
311
	BRA_IFSET MIOS_CLCD_PIN_E, 0, BANKED, MIOS_CLCD_Strobe_Set_1
312
MIOS_CLCD_Strobe_Set_0
313
        bsf     INDF1, 0
314
	return
315
MIOS_CLCD_Strobe_Set_1
316
        bsf     INDF1, 1
317
	return
318
 
319
MIOS_CLCD_Strobe_Set_23
320
	BRA_IFSET MIOS_CLCD_PIN_E, 0, BANKED, MIOS_CLCD_Strobe_Set_3
321
MIOS_CLCD_Strobe_Set_2
322
        bsf     INDF1, 2
323
	return
324
MIOS_CLCD_Strobe_Set_3
325
        bsf     INDF1, 3
326
	return
327
 
328
MIOS_CLCD_Strobe_Set_4567
329
	BRA_IFSET MIOS_CLCD_PIN_E, 1, BANKED, MIOS_CLCD_Strobe_Set_67
330
MIOS_CLCD_Strobe_Set_45
331
	BRA_IFSET MIOS_CLCD_PIN_E, 0, BANKED, MIOS_CLCD_Strobe_Set_5
332
MIOS_CLCD_Strobe_Set_4
333
        bsf     INDF1, 4
334
	return
335
MIOS_CLCD_Strobe_Set_5
336
        bsf     INDF1, 5
337
	return
338
 
339
MIOS_CLCD_Strobe_Set_67
340
	BRA_IFSET MIOS_CLCD_PIN_E, 0, BANKED, MIOS_CLCD_Strobe_Set_7
341
MIOS_CLCD_Strobe_Set_6
342
        bsf     INDF1, 6
343
	return
344
MIOS_CLCD_Strobe_Set_7
345
        bsf     INDF1, 7
346
	return
347
 
348
;; ----
349
 
350
;; ----
351
MIOS_CLCD_Strobe_Clr
352
	;; use enable pin of first display
353
	lfsr	FSR1, LATA
354
	swapf	MIOS_CLCD_PIN_E, W, BANKED
355
	andlw	0x07
356
	addwf	FSR1L, F
357
	movf	MIOS_CLCD_PIN_E, W, BANKED
358
 
359
	BRA_IFSET MIOS_CLCD_PIN_E, 2, BANKED, MIOS_CLCD_Strobe_Clr_4567
360
MIOS_CLCD_Strobe_Clr_0123
361
	BRA_IFSET MIOS_CLCD_PIN_E, 1, BANKED, MIOS_CLCD_Strobe_Clr_23
362
MIOS_CLCD_Strobe_Clr_12
363
	BRA_IFSET MIOS_CLCD_PIN_E, 0, BANKED, MIOS_CLCD_Strobe_Clr_1
364
MIOS_CLCD_Strobe_Clr_0
365
        bcf     INDF1, 0
366
	return
367
MIOS_CLCD_Strobe_Clr_1
368
        bcf     INDF1, 1
369
	return
370
 
371
MIOS_CLCD_Strobe_Clr_23
372
	BRA_IFSET MIOS_CLCD_PIN_E, 0, BANKED, MIOS_CLCD_Strobe_Clr_3
373
MIOS_CLCD_Strobe_Clr_2
374
        bcf     INDF1, 2
375
	return
376
MIOS_CLCD_Strobe_Clr_3
377
        bcf     INDF1, 3
378
	return
379
 
380
MIOS_CLCD_Strobe_Clr_4567
381
	BRA_IFSET MIOS_CLCD_PIN_E, 1, BANKED, MIOS_CLCD_Strobe_Clr_67
382
MIOS_CLCD_Strobe_Clr_45
383
	BRA_IFSET MIOS_CLCD_PIN_E, 0, BANKED, MIOS_CLCD_Strobe_Clr_5
384
MIOS_CLCD_Strobe_Clr_4
385
        bcf     INDF1, 4
386
	return
387
MIOS_CLCD_Strobe_Clr_5
388
        bcf     INDF1, 5
389
	return
390
 
391
MIOS_CLCD_Strobe_Clr_67
392
	BRA_IFSET MIOS_CLCD_PIN_E, 0, BANKED, MIOS_CLCD_Strobe_Clr_7
393
MIOS_CLCD_Strobe_Clr_6
394
        bcf     INDF1, 6
395
	return
396
MIOS_CLCD_Strobe_Clr_7
397
        bcf     INDF1, 7
398
	return
399
 
400
;; ==========================================================================
401
;; help function which adds delay before toggling - mS in WREG
402
MIOS_CLCD_Strobe_DelayToggle
403
	call	MIOS_Delay
404
	;; 	rgoto	MIOS_CLCD_Strobe_Toggle
405
 
406
;; help function which toggles the strobe line
407
MIOS_CLCD_Strobe_Toggle
408
	rcall	MIOS_CLCD_Strobe_Set
409
	rgoto	MIOS_CLCD_Strobe_Clr
410
 
411
;; ==========================================================================
412
 
413
MIOS_CLCD_Clear
414
	movlw	0x01
415
	call	MIOS_CLCD_Cmd
416
	BRA_IFSET MIOS_LCD_Y2_OFFSET, 7, BANKED, MIOS_CLCD_Clear2
417
	BRA_IFSET MIOS_LCD_Y3_OFFSET, 7, BANKED, MIOS_CLCD_Clear2
418
	return
419
MIOS_CLCD_Clear2
420
	bsf	MIOS_LCD_CURSOR_POS, 7, BANKED
421
	movlw	0x01
422
	call	MIOS_CLCD_Cmd
423
	bcf	MIOS_LCD_CURSOR_POS, 7, BANKED
424
	return
425
 
426
;; ==========================================================================
427
 
428
MIOS_CLCD_CursorSet
429
	iorlw	0x80
430
	rgoto	MIOS_CLCD_Cmd
431
 
432
;; ==========================================================================
433
 
434
;; --------------------------------------------------------------------------
435
;;  FUNCTION: MIOS_CLCD_SpecialCharInit
436
;;  C_DECLARATION: void MIOS_CLCD_SpecialCharInit(unsigned char num, code char *c_table)
437
;;  DESCRIPTION: initializes one of 8 special characters
438
;;  provided by a HD44780 compatible character LCD
439
;;  IN:	  number of special character (0-7) in WREG
440
;;        pointer to special char pattern in TBLPTR (must consist of 8
441
;;           entries for every character-line)
442
;;  C_IN: number of special character (0-7) in <num>
443
;;        pointer to special char pattern in <c_table> (must consist of 8
444
;;           entries for every character-line)
445
;;  OUT:  TBLPTR will be set to next table entry (TBLPTR+=8)
446
;;  C_OUT:  -
447
;;  USES: BRS, TBLPTR
448
;;  EXAMPLE:
449
;;	;; use a left-arrow as special char #2
450
;;	TABLE_ADDR SPECIAL_CHAR_LEFT_ARROW
451
;;      movlw   0x02
452
;;	call	MIOS_CLCD_SpecialCharInit
453
;;	;; set cursor to 0
454
;;	movlw	0x00
455
;;	call	MIOS_LCD_CursorSet
456
;;	;; print the special char
457
;;	movlw	0x02
458
;;	call	MIOS_LCD_PrintChar
459
;;	return
460
;;
461
;; SPECIAL_CHAR_LEFT_ARROW
462
;;      ;; due to an imperfection in the MPASM we have
463
;;      ;; to write two bytes in every line :-(
464
;;	db b'00000011', b'00000111' ; 1st and 2nd line of special char
465
;;	db b'00001111', b'00011111' ; 3rd and 4th line of special char
466
;;	db b'00011111', b'00001111' ; 5th and 6th line of special char
467
;;	db b'00000111', b'00000011' ; 7th and 8th line of special char
468
;;
469
;;  C_EXAMPLE:
470
;;    see http://www.ucapps.de/mios_c_lcd_schars.html
471
;; --------------------------------------------------------------------------
472
MIOS_CLCD_SpecialCharInit
473
	;; branch depending on LCD type
474
	BRA_IFSET MIOS_BOX_CFG0, MIOS_BOX_CFG0_LCD_TYPE2, ACCESS, MIOS_CLCD_SpecialChar_4567
475
MIOS_CLCD_SpecialChar_1234
476
	BRA_IFSET MIOS_BOX_CFG0, MIOS_BOX_CFG0_LCD_TYPE1, ACCESS, MIOS_CLCD_SpecialChar_34
477
MIOS_CLCD_SpecialChar_12
478
	BRA_IFCLR MIOS_BOX_CFG0, MIOS_BOX_CFG0_LCD_TYPE0, ACCESS, MIOS_CLCD_SpecialCharInit_C
479
	return
480
 
481
MIOS_CLCD_SpecialChar_34
482
	btfss	MIOS_BOX_CFG0, MIOS_BOX_CFG0_LCD_TYPE0
483
	return
484
	return
485
 
486
MIOS_CLCD_SpecialChar_4567
487
	BRA_IFSET MIOS_BOX_CFG0, MIOS_BOX_CFG0_LCD_TYPE1, ACCESS, MIOS_CLCD_SpecialChar_67
488
MIOS_CLCD_SpecialChar_45
489
	btfss	MIOS_BOX_CFG0, MIOS_BOX_CFG0_LCD_TYPE0
490
	return
491
	return
492
MIOS_CLCD_SpecialChar_67
493
	btfss	MIOS_BOX_CFG0, MIOS_BOX_CFG0_LCD_TYPE0
494
	return
495
	goto	USER_LCD_SpecialCharInit
496
 
497
 
498
 
499
	;; continue if common CLCD
500
MIOS_CLCD_SpecialCharInit_C
501
	swapf	WREG, F
502
	rrf	WREG, W
503
	andlw	0x38
504
	iorlw	0x40
505
	rcall	MIOS_CLCD_Cmd
506
 
507
	SET_BSR	MIOS_CLCD_SC_CTR
508
	clrf	MIOS_CLCD_SC_CTR, BANKED
509
MIOS_CLCD_SpecialCharInitLoop
510
	tblrd*+
511
	movf	TABLAT, W
512
	rcall	MIOS_CLCD_Data
513
	incf	MIOS_CLCD_SC_CTR, F, BANKED
514
	BRA_IFCLR MIOS_CLCD_SC_CTR, 3, BANKED, MIOS_CLCD_SpecialCharInitLoop
515
 
516
	movf	MIOS_LCD_CURSOR_POS, W, BANKED
517
	rgoto	MIOS_CLCD_CursorSet
518
 
519
;; --------------------------------------------------------------------------
520
;;  FUNCTION: MIOS_CLCD_SpecialCharsInit
521
;;  C_DECLARATION: void MIOS_CLCD_SpecialCharsInit(const char *c_table)
522
;;  DESCRIPTION: initializes all 8 special characters
523
;;  provided by a HD44780 compatible character LCD<BR>
524
;;  See also: MIOS_CLCD_SpecialCharInit
525
;;  IN:	  pointer to special char patterns in TBLPTR (must consist of 8*8
526
;;           entries for every character and line)
527
;;  C_IN: pointer to special char patterns in <c_table> (must consist of 8*8
528
;;           entries for every character and line)
529
;;  OUT:  TBLPTR will be set to next table entry (TBLPTR+=64)
530
;;  C_OUT:  -
531
;;  USES: BRS, TBLPTR
532
;;  EXAMPLE:
533
;;     for a single character: see MIOS_CLCD_SpecialCharInit
534
;;     this function does the same, but it initializes
535
;;     all 8 characters at once
536
;;
537
;;  C_EXAMPLE:
538
;;    see http://www.ucapps.de/mios_c_lcd_schars.html
539
;; --------------------------------------------------------------------------
540
MIOS_CLCD_SpecialCharsInit
541
	SET_BSR	MIOS_TMP1
542
	clrf	MIOS_TMP1, BANKED
543
MIOS_CLCD_SpecialCharsInitLoop
544
	movf	MIOS_TMP1, W, BANKED
545
	rcall	MIOS_CLCD_SpecialCharInit
546
	incf	MIOS_TMP1, F, BANKED
547
	BRA_IFCLR MIOS_TMP1, 3, BANKED, MIOS_CLCD_SpecialCharsInitLoop
548
	return