Subversion Repositories svn.mios

Rev

Rev 598 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
656 this 1
FRAM Module Test application
598 this 2
===============================================================================
656 this 3
Copyright (C) 2009 Matthias M├Ąchler (maechler@mm-computing.ch / thismaechler@gmx.ch)
598 this 4
Licensed for personal non-commercial use only.
5
All other rights reserved.
6
===============================================================================
7
 
8
A precompiled binary is already part of this package:
9
   o project.hex (can be loaded into MIOS Studio)
10
 
11
Following tools are required to recompile the code:
12
   o SDCC
13
   o gputils
14
 
15
The details are described under
16
   http://www.midibox.org/dokuwiki/application_development
17
 
18
===============================================================================
19
 
20
Required hardware:
21
   o one MBHP_CORE module
656 this 22
   o one FRAM module
23
   o one LCD display
598 this 24
 
25
Optional hardware:
656 this 26
   o one DIN module with six buttons (pins 0 - 5)
598 this 27
 
28
===============================================================================
29
 
656 this 30
The application uses the FRAM-module driver to test 1 - 32 connected
31
FRAM-devices (Ramtron FM24C64 / FM24C256 / FM24C512). One FM24C512 acts like
32
two FM24C256, therefor only max. 16 of these chips can be connected.
33
To connect more than 8(4) devices, you need to enable multiplexing for the FRAM
34
driver, and the device's SDA/SCL lines must connected to a analog multiplexer.
598 this 35
 
656 this 36
Configuration
37
--------------
38
Be sure the correct address range and device count is given accoring to your
39
device. See defines and comments at the top of main.c
40
 
41
If you don't change anything, the default for FRAM-moudule will be selected
42
(J10 RC4: SCL, RC5: SDA, multiplexing disabled), in main.c 8 devices with
43
and address range of 0x7FFF are configured. This equals 4 x FM24C512 or
44
8 x FM24C256.
45
 
46
If you use multiplexed devices, enable the define in the Makefile. All possible
47
FRAM_DEFINES that you can change are prepared but commented out.
48
 
49
If you use multiplexing:
50
	FRAM_DEFINES += -DFRAM_MULTIPLEX_ENABLE=1
51
 
52
If you want to connect your FRAM devices to the standard MIOS IIC port J4:
53
	FRAM_DEFINES += -DFRAM_MIOS_IIC=1
54
 
55
If you notice unstable communication to the device (very long connection cable,
56
bad slew rates etc.), increase this value step by step and check if the problem
57
disappears:
58
	FRAM_DEFINES += -DFRAM_IIC_SLOWDOWN=1
59
 
60
For further information about the pin assignments, default values and defines,
61
refer the README.txt of the FRAM-module.
62
 
63
 
64
 
65
Test phases
66
--------------
67
The application runs 8 test-phases in series. Each run tests the whole address
68
range of each device. Test byte values will be generated in the following way:
69
LSB(address+device_addr+test_phase_offset). This ensures that each device and
70
each test phase has it's own test value offsets, to ensure that device and
71
address will be selected correctly, and no values will be "inherit" from one
72
phase to another. These are the phases:
73
 
74
1. Test buffer write/read/compare:
75
----
76
	Buffers of 256 bytes will be written and immediately read after writing. This
77
	test run uses FRAM high level functions. The read data will be compared to
78
	the test values written before.
79
 
80
2. Test single byte write/read/compare:
81
----
82
	Single bytes will be written and immediately read after writing. The read
83
	byte will be compared to the one that was written before. FRAM high level
84
	functions will be used for this test run.
85
 
86
3. Test subsequent buffer write:
87
----
88
	Performs subsequent buffer write using FRAM low-level functions. In each
89
	session, 32 x 256byte buffers will be written, the whole device- and
90
	address range will be covered.
91
 
92
4. Test subsequent buffer read/compare:
93
----
94
	Performs subsequent buffer read using FRAM low-level functions. In each
95
	session, 32 x 256byte buffers will be read, the whole device- and
96
	address range will be covered. The values read should be the ones that were written
97
	in the last phase. They will be compared to the originally written values.
98
	In this test run, problems with the multiplexer or the device addressing
99
	show up. This will *not* happen in test-run 2, because the data is read
100
	immediately after writing. The compare will not fail because the same wrong
101
	device is selected as with the write. In subsequent write, the whole device-
102
	and address range will be written in one run, and each 256bytes sector has
103
	its own test value start offset. Wrong device selection will cause overwriting
104
	of data that will show up as error in this test run.
105
	If you want to analyze the problem in deep, set the test_value_deviceaddr_only
106
	define to 1. This will cause the program to write the device address to each
107
	byte of the given device. On error abort, you see the value that was read
108
	and the value it should equal to, this allows to analyze on which stage
109
	the chip selection fails (chip address selectors / multiplexer).
110
 
111
5. Test subsequent single byte write:
112
----
113
	Performs subsequent byte write using FRAM low-level functions. In each
114
	session, 32 x 256bytes will be written, the whole device- and address range
115
	will be covered.
116
 
117
6. Test subsequent byte read/compare:
118
----
119
	Performs subsequent byte read using FRAM low-level functions. In each
120
	session, 32 x 256bytes will be read, the whole device- and address range
121
	will be covered. The values read should be the ones that were written
122
	in the last phase. They will be compared to the originally written values.
123
 
124
7. Speed test subsequent buffer write:
125
----
126
	Performs subsequent buffer write using FRAM low-level functions. In each
127
	session, 32 x 256byte buffers will be written, the whole device- and
128
	address range will be covered. The buffer will not be initialized with
129
	values, it doesn't matter what data will be written, instead the time needed
130
	for the whole run will be measured and shows up at the end in case of
131
	success.
132
 
133
8. Speed test subsequent buffer read:
134
----
135
	Performs subsequent buffer read using FRAM low-level functions. In each
136
	session, 32 x 256byte buffers will be read, the whole device- and
137
	address range will be covered. No data compare will take place, instead
138
	the time needed for the whole run will be measured and shows up at the
139
	test summary screen after finishing.
140
 
141
 
142
If all the test runs finished successfully, you will see a (alternating) summary
143
screen that shows you following information
144
* Success message
145
* Device count / address range
146
* Speed test results (in mS, time needed for the whole device/address range)
147
 
148
In case of a error-abort, you also see alternating screens which show you
149
* In which phase and at which operation the error occured. Possible operations
150
  are: Begin Read, Begin Write, Write, Read/Compare.
151
* Device- and memory-address at which the error occured
152
* [FRAM_ERROR code and FRAM_REG value] or [Read byte value / Should-be value]
153
 
154
 
155
 
156
Test phase triggering with buttons
157
------------------------------------
158
If you have a DIN module connected, you can trigger test phases with pin 0 (e.g.
159
button push, pin to ground).
160
 
161
pin 0: phase 1(buffer wr/rd/cp)
162
pin 1: phase 2(byte wr/rd/cp)
163
pin 2: phase 3(subseq. buffer wr)
164
pin 3: phase 5(subseq. byte wr)
165
pin 4: phase 7(speed test buffer wr)
166
pin 5: phase 8(speed test buffer rd)
167
 
168
The following phases will be performed continous.
169
Note that it would make no sense to trigger the phases 4 and 6, because they
170
read and compare the values written in phases 3/5 before.
171
 
172
 
598 this 173
===============================================================================