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44 tk 1
; $Id: sid_aout_lc.inc 44 2008-01-30 21:39:30Z tk $
1 tk 2
;
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; AOUT LC driver
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;
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; Special Variation of the official "aout_lc.inc" module for
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; MIDIbox SID to achive best performance!
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;
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; This module works with four AOUT_LC modules maximum
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; Prepared for configuration 4 * 12/4 bit (e.g. for 4 * CutOff/Resonance)
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;
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; ==========================================================================
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;
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;  Copyright 1998-2007 Thorsten Klose (tk@midibox.org)
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;  Licensed for personal non-commercial use only.
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;  All other rights reserved.
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;
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; ==========================================================================
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;
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; The pins to which the first MBHP_AOUT_LC module is connected have to be defined here:
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;
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#define SID_AOUT_LC_LAT_RCLK	LATC	; The latch enable input
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#define SID_AOUT_LC_TRIS_RCLK	TRISC	; is connected to Port C.3
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#define SID_AOUT_LC_PIN_RCLK	3	; (CANNOT be shared with other outputs!)
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;
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#define SID_AOUT_LC_LAT_DOUT	LATC	; The data pin
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#define SID_AOUT_LC_TRIS_DOUT	TRISC	; is connected to Port C.1
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#define SID_AOUT_LC_PIN_DOUT	1	; (can be shared with other outputs)
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;
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#define SID_AOUT_LC_LAT_SCLK	LATC	; The shift clock input pin SCLK
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#define SID_AOUT_LC_TRIS_SCLK	TRISC	; is connected to Port C.0
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#define SID_AOUT_LC_PIN_SCLK	0	; (can be shared with other outputs)
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;
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;; --------------------------------------------------------------------------
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;;  FUNCTION: SID_AOUT_LC_Init
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;;  DESCRIPTION: This function initializes all connected 74HC595
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;;  IN:   -
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;;  OUT:  -
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;;  USES: BSR
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;; --------------------------------------------------------------------------
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SID_AOUT_LC_Init
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	;; enable pin drivers
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	bcf	SID_AOUT_LC_TRIS_RCLK, SID_AOUT_LC_PIN_RCLK
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	bcf	SID_AOUT_LC_TRIS_DOUT, SID_AOUT_LC_PIN_DOUT
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	bcf	SID_AOUT_LC_TRIS_SCLK, SID_AOUT_LC_PIN_SCLK
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47
	;; set voltages to 0V
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	lfsr	FSR0, AOUT0_L
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	movlw	8
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	movwf	MIOS_PARAMETER3	; used as loop counter here
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SID_AOUT_LC_InitVoutLoop
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	clrf	POSTINC0	; AOUTx_L
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	clrf	POSTINC0	; AOUTx_H
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	decfsz	MIOS_PARAMETER3, F
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	rgoto	SID_AOUT_LC_InitVoutLoop
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57
	;; update the AOUT pins
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	rcall	SID_AOUT_LC_Update
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60
	return
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;; --------------------------------------------------------------------------
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;;  FUNCTION: SID_AOUT_LC_Load2SR
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;;  DESCRIPTION: This function loads a 16bit value into the shift register
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;;  IN:   o low byte of SR value in TMP1
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;;        o high byte of SR value in TMP2
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;;  OUT:  -
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;;  USES: TMP[12345]
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;; --------------------------------------------------------------------------
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SID_AOUT_LC_Load2SR
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        bcf     SID_AOUT_LC_LAT_SCLK, SID_AOUT_LC_PIN_SCLK	; clear clock
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	;; superfast transfer with unrolled loop (takes some memory, but guarantees the
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	;; lowest system load :)
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SID_AOUT_LC_WRITE_BIT MACRO reg, bit
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	bcf	SID_AOUT_LC_LAT_DOUT, SID_AOUT_LC_PIN_DOUT	; set out pin depending on register content (reg.bit)
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	btfsc	reg, bit
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	bsf	SID_AOUT_LC_LAT_DOUT, SID_AOUT_LC_PIN_DOUT
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	nop
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        bsf     SID_AOUT_LC_LAT_SCLK, SID_AOUT_LC_PIN_SCLK	; rising clock edge
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        bcf     SID_AOUT_LC_LAT_SCLK, SID_AOUT_LC_PIN_SCLK	; falling clock edge
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	ENDM
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	SID_AOUT_LC_WRITE_BIT TMP1, 7
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	SID_AOUT_LC_WRITE_BIT TMP1, 6
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	SID_AOUT_LC_WRITE_BIT TMP1, 5
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	SID_AOUT_LC_WRITE_BIT TMP1, 4
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	SID_AOUT_LC_WRITE_BIT TMP1, 3
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	SID_AOUT_LC_WRITE_BIT TMP1, 2
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	SID_AOUT_LC_WRITE_BIT TMP1, 1
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	SID_AOUT_LC_WRITE_BIT TMP1, 0
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	SID_AOUT_LC_WRITE_BIT TMP2, 7
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	SID_AOUT_LC_WRITE_BIT TMP2, 6
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	SID_AOUT_LC_WRITE_BIT TMP2, 5
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	SID_AOUT_LC_WRITE_BIT TMP2, 4
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	SID_AOUT_LC_WRITE_BIT TMP2, 3
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	SID_AOUT_LC_WRITE_BIT TMP2, 2
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	SID_AOUT_LC_WRITE_BIT TMP2, 1
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	SID_AOUT_LC_WRITE_BIT TMP2, 0
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#if 0
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	;; done at the end of transfer
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        bsf     SID_AOUT_LC_LAT_RCLK, SID_AOUT_LC_PIN_RCLK	; latch SID values
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	bcf	SID_AOUT_LC_LAT_DOUT, SID_AOUT_LC_PIN_DOUT	; clear out pin (standby)
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        bcf     SID_AOUT_LC_LAT_RCLK, SID_AOUT_LC_PIN_RCLK	; release latch
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#endif
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	return
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111
;; --------------------------------------------------------------------------
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;;  FUNCTION: SID_AOUT_LC_Update
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;;  DESCRIPTION: refreshes the AOUT pins if AOUT values have been changed
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;;  OUT:  -
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;;  USES: TMP[12345] and MIOS_PARAMETER[123]
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;; --------------------------------------------------------------------------
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SID_AOUT_LC_UPDATE_MACRO MACRO 	aout_a, aout_b
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	;; take 12bit value from AOUT[0246]_[LH] -> TMP2 and TMP1[7:4]
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	swapf	aout_a+0, W, BANKED
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	andlw	0xf0
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	btfsc	MIOS_PARAMETER3, 6; invert if inversion flag is set
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	xorlw 0xf0
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	movwf	TMP1
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125
	swapf	aout_a+0, W, BANKED
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	andlw	0x0f
127
	movwf	TMP2
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129
	swapf	aout_a+1, W, BANKED
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	andlw	0xf0
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	iorwf	TMP2, F
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133
	btfsc	MIOS_PARAMETER3, 6		; invert if inversion flag is set
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	comf	TMP2, F
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136
	;; take 4bit value from AOUT[1357]_[H] -> TMP1[3:0]
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	movf	aout_b+1, W, BANKED
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	andlw	0x0f
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	btfsc	MIOS_PARAMETER3, 7; invert if inversion flag is set
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	xorlw 0x0f
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	iorwf	TMP1, F
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143
	;; notify that values have been transfered
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	bsf	aout_a+1, 7, BANKED
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	bsf	aout_b+1, 7, BANKED
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147
	rcall	SID_AOUT_LC_Load2SR
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149
	;; leftshift inversion flags
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	rlf	MIOS_PARAMETER3, F
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	rlf	MIOS_PARAMETER3, F
152
	ENDM
153
 
154
SID_AOUT_LC_Update
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156
	IRQ_DISABLE			; disable interrupts to ensure data consistency
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	SET_BSR	AOUT0_L			; use banked accesses
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160
	;; check if any AOUT value has been changed
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	BRA_IFCLR AOUT0_H, 7, BANKED, SID_AOUT_LC_Update_Now
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	BRA_IFCLR AOUT1_H, 7, BANKED, SID_AOUT_LC_Update_Now
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	BRA_IFCLR AOUT2_H, 7, BANKED, SID_AOUT_LC_Update_Now
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	BRA_IFCLR AOUT3_H, 7, BANKED, SID_AOUT_LC_Update_Now
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	BRA_IFCLR AOUT4_H, 7, BANKED, SID_AOUT_LC_Update_Now
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	BRA_IFCLR AOUT5_H, 7, BANKED, SID_AOUT_LC_Update_Now
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	BRA_IFCLR AOUT6_H, 7, BANKED, SID_AOUT_LC_Update_Now
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	BRA_IFCLR AOUT7_H, 7, BANKED, SID_AOUT_LC_Update_Now
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	rgoto	SID_AOUT_LC_Update_Gates
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171
SID_AOUT_LC_Update_Now
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	;; transfer AOUT values
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	movff	SID_LOCAL_ENS+SID_ENSx_AOUT_INVERTED, MIOS_PARAMETER3	; inversion flags for all 8 AOUTs
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	SID_AOUT_LC_UPDATE_MACRO AOUT6_L, AOUT7_L
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	SID_AOUT_LC_UPDATE_MACRO AOUT4_L, AOUT5_L
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	SID_AOUT_LC_UPDATE_MACRO AOUT2_L, AOUT3_L
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	SID_AOUT_LC_UPDATE_MACRO AOUT0_L, AOUT1_L
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179
	;; latch values
180
        bsf     SID_AOUT_LC_LAT_RCLK, SID_AOUT_LC_PIN_RCLK	; latch SID values
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	bcf	SID_AOUT_LC_LAT_DOUT, SID_AOUT_LC_PIN_DOUT	; clear out pin (standby)
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        bcf     SID_AOUT_LC_LAT_RCLK, SID_AOUT_LC_PIN_RCLK	; release latch
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184
	IRQ_ENABLE			; enable interrupts
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186
 
187
SID_AOUT_LC_Update_Gates
188
	;; do nothing if gate bits have not been changed
189
	SET_BSR	AOUT_GATE
190
	movf	AOUT_GATE, W, BANKED
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	xorwf	AOUT_GATE_SHADOW, W, BANKED
192
	bz	SID_AOUT_LC_UpdateGates_End
193
 
194
	IRQ_DISABLE			; disable interrupts to ensure data consistency
195
 
196
	;; optionally forward to DOUT
197
#if DEFAULT_EXT_SWITCH_DOUT
198
	movff	AOUT_GATE, MIOS_PARAMETER1
199
	movlw	(DEFAULT_EXT_SWITCH_DOUT-1) & 0x0f
200
	call	MIOS_DOUT_SRSet
201
#endif
202
 
203
	;; optionally forward to J5
204
	SET_BSR	AOUT_GATE
205
#if DEFAULT_J5_FUNCTION == 3
206
	movf	AOUT_GATE, W, BANKED
207
	call	J5_DOUT_Set
208
#endif
209
 
210
	;; update shadow register
211
	movf	AOUT_GATE, W, BANKED
212
	movwf	AOUT_GATE_SHADOW, BANKED
213
	IRQ_ENABLE			; enable interrupts
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215
SID_AOUT_LC_UpdateGates_End
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SID_AOUT_LC_Update_End
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	return